edac: change the mem allocation scheme to make Documentation/kobject.txt happy
Kernel kobjects have rigid rules: each container object should be dynamically allocated, and can't be allocated into a single kmalloc. EDAC never obeyed this rule: it has a single malloc function that allocates all needed data into a single kzalloc. As this is not accepted anymore, change the allocation schema of the EDAC *_info structs to enforce this Kernel standard. Acked-by: Chris Metcalf <cmetcalf@tilera.com> Cc: Aristeu Rozanski <arozansk@redhat.com> Cc: Doug Thompson <norsk5@yahoo.com> Cc: Greg K H <gregkh@linuxfoundation.org> Cc: Borislav Petkov <borislav.petkov@amd.com> Cc: Mark Gross <mark.gross@intel.com> Cc: Tim Small <tim@buttersideup.com> Cc: Ranganathan Desikan <ravi@jetztechnologies.com> Cc: "Arvind R." <arvino55@gmail.com> Cc: Olof Johansson <olof@lixom.net> Cc: Egor Martovetsky <egor@pasemi.com> Cc: Michal Marek <mmarek@suse.cz> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Hitoshi Mitake <h.mitake@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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22 changed files with 247 additions and 169 deletions
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@ -412,7 +412,44 @@ struct edac_mc_layer {
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#define EDAC_MAX_LAYERS 3
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/**
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* EDAC_DIMM_PTR - Macro responsible to find a pointer inside a pointer array
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* EDAC_DIMM_OFF - Macro responsible to get a pointer offset inside a pointer array
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* for the element given by [layer0,layer1,layer2] position
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*
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* @layers: a struct edac_mc_layer array, describing how many elements
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* were allocated for each layer
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* @n_layers: Number of layers at the @layers array
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* @layer0: layer0 position
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* @layer1: layer1 position. Unused if n_layers < 2
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* @layer2: layer2 position. Unused if n_layers < 3
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*
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* For 1 layer, this macro returns &var[layer0] - &var
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* For 2 layers, this macro is similar to allocate a bi-dimensional array
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* and to return "&var[layer0][layer1] - &var"
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* For 3 layers, this macro is similar to allocate a tri-dimensional array
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* and to return "&var[layer0][layer1][layer2] - &var"
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*
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* A loop could be used here to make it more generic, but, as we only have
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* 3 layers, this is a little faster.
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* By design, layers can never be 0 or more than 3. If that ever happens,
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* a NULL is returned, causing an OOPS during the memory allocation routine,
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* with would point to the developer that he's doing something wrong.
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*/
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#define EDAC_DIMM_OFF(layers, nlayers, layer0, layer1, layer2) ({ \
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int __i; \
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if ((nlayers) == 1) \
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__i = layer0; \
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else if ((nlayers) == 2) \
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__i = (layer1) + ((layers[1]).size * (layer0)); \
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else if ((nlayers) == 3) \
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__i = (layer2) + ((layers[2]).size * ((layer1) + \
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((layers[1]).size * (layer0)))); \
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else \
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__i = -EINVAL; \
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__i; \
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})
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/**
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* EDAC_DIMM_PTR - Macro responsible to get a pointer inside a pointer array
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* for the element given by [layer0,layer1,layer2] position
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*
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* @layers: a struct edac_mc_layer array, describing how many elements
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@ -429,24 +466,14 @@ struct edac_mc_layer {
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* and to return "&var[layer0][layer1]"
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* For 3 layers, this macro is similar to allocate a tri-dimensional array
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* and to return "&var[layer0][layer1][layer2]"
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*
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* A loop could be used here to make it more generic, but, as we only have
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* 3 layers, this is a little faster.
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* By design, layers can never be 0 or more than 3. If that ever happens,
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* a NULL is returned, causing an OOPS during the memory allocation routine,
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* with would point to the developer that he's doing something wrong.
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*/
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#define EDAC_DIMM_PTR(layers, var, nlayers, layer0, layer1, layer2) ({ \
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typeof(var) __p; \
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if ((nlayers) == 1) \
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__p = &var[layer0]; \
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else if ((nlayers) == 2) \
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__p = &var[(layer1) + ((layers[1]).size * (layer0))]; \
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else if ((nlayers) == 3) \
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__p = &var[(layer2) + ((layers[2]).size * ((layer1) + \
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((layers[1]).size * (layer0))))]; \
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else \
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typeof(*var) __p; \
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int ___i = EDAC_DIMM_OFF(layers, nlayers, layer0, layer1, layer2); \
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if (___i < 0) \
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__p = NULL; \
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else \
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__p = (var)[___i]; \
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__p; \
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})
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@ -486,8 +513,6 @@ struct dimm_info {
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* patches in this series will fix this issue.
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*/
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struct rank_info {
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struct device dev;
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int chan_idx;
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struct csrow_info *csrow;
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struct dimm_info *dimm;
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@ -513,7 +538,7 @@ struct csrow_info {
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/* channel information for this csrow */
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u32 nr_channels;
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struct rank_info *channels;
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struct rank_info **channels;
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};
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/*
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@ -572,7 +597,7 @@ struct mem_ctl_info {
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unsigned long (*ctl_page_to_phys) (struct mem_ctl_info * mci,
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unsigned long page);
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int mc_idx;
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struct csrow_info *csrows;
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struct csrow_info **csrows;
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unsigned nr_csrows, num_cschannel;
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/*
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@ -592,7 +617,7 @@ struct mem_ctl_info {
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* DIMM info. Will eventually remove the entire csrows_info some day
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*/
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unsigned tot_dimms;
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struct dimm_info *dimms;
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struct dimm_info **dimms;
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/*
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* FIXME - what about controllers on other busses? - IDs must be
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