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drm/i915: TV mode_set sync up with 2D driver

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Fix TV control save register for untouched bits, and color
knobs different definition for 945 and 965 chips.

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Zhenyu Wang 2009-03-04 19:36:02 +08:00 • committed by Eric Anholt
commit d2d9f23240
2 changed files with 9 additions and 4 deletions
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2
drivers/gpu/drm/i915/i915_reg.h
View file

@ -876,7 +876,7 @@
*/ */
# define TV_ENC_C0_FIX (1 << 10) # define TV_ENC_C0_FIX (1 << 10)
/** Bits that must be preserved by software */ /** Bits that must be preserved by software */
# define TV_CTL_SAVE ((3 << 8) | (3 << 6)) # define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf)
# define TV_FUSE_STATE_MASK (3 << 4) # define TV_FUSE_STATE_MASK (3 << 4)
/** Read-only state that reports all features enabled */ /** Read-only state that reports all features enabled */
# define TV_FUSE_STATE_ENABLED (0 << 4) # define TV_FUSE_STATE_ENABLED (0 << 4)

9
drivers/gpu/drm/i915/intel_tv.c
View file

@ -1135,7 +1135,8 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
if (!tv_mode) if (!tv_mode)
return; /* can't happen (mode_prepare prevents this) */ return; /* can't happen (mode_prepare prevents this) */
tv_ctl = 0; tv_ctl = I915_READ(TV_CTL);
tv_ctl &= TV_CTL_SAVE;
switch (tv_priv->type) { switch (tv_priv->type) {
default: default:
@ -1215,7 +1216,6 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
/* dda1 implies valid video levels */ /* dda1 implies valid video levels */
if (tv_mode->dda1_inc) { if (tv_mode->dda1_inc) {
scctl1 |= TV_SC_DDA1_EN; scctl1 |= TV_SC_DDA1_EN;
scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
} }
if (tv_mode->dda2_inc) if (tv_mode->dda2_inc)
@ -1225,6 +1225,7 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
scctl1 |= TV_SC_DDA3_EN; scctl1 |= TV_SC_DDA3_EN;
scctl1 |= tv_mode->sc_reset; scctl1 |= tv_mode->sc_reset;
scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT; scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT;
scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT | scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT |
@ -1266,7 +1267,11 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
color_conversion->av); color_conversion->av);
} }
if (IS_I965G(dev))
I915_WRITE(TV_CLR_KNOBS, 0x00404000);
else
I915_WRITE(TV_CLR_KNOBS, 0x00606000); I915_WRITE(TV_CLR_KNOBS, 0x00606000);
if (video_levels) if (video_levels)
I915_WRITE(TV_CLR_LEVEL, I915_WRITE(TV_CLR_LEVEL,
((video_levels->black << TV_BLACK_LEVEL_SHIFT) | ((video_levels->black << TV_BLACK_LEVEL_SHIFT) |