drm/radeon/kms/pm: rework power management
- Separate dynpm and profile based power management methods. You can select the pm method
by echoing the selected method ("dynpm" or "profile") to power_method in sysfs.
- Expose basic 4 profile in profile method
"default" - default clocks
"auto" - select between low and high based on ac/dc state
"low" - DC, low power mode
"high" - AC, performance mode
The current base profile is "default", but it should switched to "auto" once we've tested
on more systems. Switching the state is a matter of echoing the requested profile to
power_profile in sysfs. The lowest power states are selected automatically when dpms turns
the monitors off in all states but default.
- Remove dynamic fence-based reclocking for the moment. We can revisit this later once we
have basic pm in.
- Move pm init/fini to modesetting path. pm is tightly coupled with display state. Make sure
display side is initialized before pm.
- Add pm suspend/resume functions to make sure pm state is properly reinitialized on resume.
- Remove dynpm module option. It's now selectable via sysfs.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Alex Deucher
Dave Airlie
parent
d7311171c4
commit
ce8f53709b
19 changed files with 787 additions and 516 deletions
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@ -23,14 +23,98 @@
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#include "drmP.h"
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#include "radeon.h"
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#include "avivod.h"
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#ifdef CONFIG_ACPI
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#include <linux/acpi.h>
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#endif
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#include <linux/power_supply.h>
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#define RADEON_IDLE_LOOP_MS 100
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#define RADEON_RECLOCK_DELAY_MS 200
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#define RADEON_WAIT_VBLANK_TIMEOUT 200
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#define RADEON_WAIT_IDLE_TIMEOUT 200
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static void radeon_pm_idle_work_handler(struct work_struct *work);
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static void radeon_dynpm_idle_work_handler(struct work_struct *work);
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static int radeon_debugfs_pm_init(struct radeon_device *rdev);
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static bool radeon_pm_in_vbl(struct radeon_device *rdev);
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static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish);
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static void radeon_pm_update_profile(struct radeon_device *rdev);
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static void radeon_pm_set_clocks(struct radeon_device *rdev);
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#define ACPI_AC_CLASS "ac_adapter"
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#ifdef CONFIG_ACPI
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static int radeon_acpi_event(struct notifier_block *nb,
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unsigned long val,
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void *data)
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{
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struct radeon_device *rdev = container_of(nb, struct radeon_device, acpi_nb);
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struct acpi_bus_event *entry = (struct acpi_bus_event *)data;
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if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) {
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if (power_supply_is_system_supplied() > 0)
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DRM_INFO("pm: AC\n");
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else
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DRM_INFO("pm: DC\n");
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if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
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if (rdev->pm.profile == PM_PROFILE_AUTO) {
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mutex_lock(&rdev->pm.mutex);
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radeon_pm_update_profile(rdev);
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radeon_pm_set_clocks(rdev);
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mutex_unlock(&rdev->pm.mutex);
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}
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}
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}
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return NOTIFY_OK;
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}
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#endif
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static void radeon_pm_update_profile(struct radeon_device *rdev)
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{
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switch (rdev->pm.profile) {
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case PM_PROFILE_DEFAULT:
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rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX;
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break;
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case PM_PROFILE_AUTO:
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if (power_supply_is_system_supplied() > 0) {
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if (rdev->pm.active_crtc_count > 1)
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rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX;
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else
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rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX;
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} else {
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if (rdev->pm.active_crtc_count > 1)
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rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX;
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else
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rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX;
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}
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break;
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case PM_PROFILE_LOW:
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if (rdev->pm.active_crtc_count > 1)
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rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX;
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else
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rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX;
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break;
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case PM_PROFILE_HIGH:
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if (rdev->pm.active_crtc_count > 1)
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rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX;
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else
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rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX;
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break;
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}
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if (rdev->pm.active_crtc_count == 0) {
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rdev->pm.requested_power_state_index =
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rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx;
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rdev->pm.requested_clock_mode_index =
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rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx;
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} else {
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rdev->pm.requested_power_state_index =
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rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx;
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rdev->pm.requested_clock_mode_index =
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rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx;
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}
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}
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static void radeon_unmap_vram_bos(struct radeon_device *rdev)
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{
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@ -54,40 +138,125 @@ static void radeon_unmap_vram_bos(struct radeon_device *rdev)
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ttm_bo_unmap_virtual(&rdev->r600_blit.shader_obj->tbo);
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}
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static void radeon_pm_set_clocks(struct radeon_device *rdev, int static_switch)
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static void radeon_sync_with_vblank(struct radeon_device *rdev)
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{
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if (rdev->pm.active_crtcs) {
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rdev->pm.vblank_sync = false;
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wait_event_timeout(
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rdev->irq.vblank_queue, rdev->pm.vblank_sync,
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msecs_to_jiffies(RADEON_WAIT_VBLANK_TIMEOUT));
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}
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}
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static void radeon_set_power_state(struct radeon_device *rdev)
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{
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u32 sclk, mclk;
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if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) &&
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(rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index))
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return;
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if (radeon_gui_idle(rdev)) {
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sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].
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clock_info[rdev->pm.requested_clock_mode_index].sclk;
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if (sclk > rdev->clock.default_sclk)
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sclk = rdev->clock.default_sclk;
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mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].
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clock_info[rdev->pm.requested_clock_mode_index].mclk;
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if (mclk > rdev->clock.default_mclk)
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mclk = rdev->clock.default_mclk;
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/* voltage, pcie lanes, etc.*/
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radeon_pm_misc(rdev);
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if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
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radeon_sync_with_vblank(rdev);
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if (!radeon_pm_in_vbl(rdev))
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return;
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radeon_pm_prepare(rdev);
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/* set engine clock */
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if (sclk != rdev->pm.current_sclk) {
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radeon_pm_debug_check_in_vbl(rdev, false);
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radeon_set_engine_clock(rdev, sclk);
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radeon_pm_debug_check_in_vbl(rdev, true);
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rdev->pm.current_sclk = sclk;
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DRM_INFO("Setting: e: %d\n", sclk);
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}
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/* set memory clock */
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if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) {
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radeon_pm_debug_check_in_vbl(rdev, false);
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radeon_set_memory_clock(rdev, mclk);
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radeon_pm_debug_check_in_vbl(rdev, true);
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rdev->pm.current_mclk = mclk;
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DRM_INFO("Setting: m: %d\n", mclk);
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}
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radeon_pm_finish(rdev);
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} else {
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/* set engine clock */
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if (sclk != rdev->pm.current_sclk) {
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radeon_sync_with_vblank(rdev);
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radeon_pm_prepare(rdev);
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radeon_set_engine_clock(rdev, sclk);
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radeon_pm_finish(rdev);
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rdev->pm.current_sclk = sclk;
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DRM_INFO("Setting: e: %d\n", sclk);
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}
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/* set memory clock */
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if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) {
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radeon_sync_with_vblank(rdev);
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radeon_pm_prepare(rdev);
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radeon_set_memory_clock(rdev, mclk);
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radeon_pm_finish(rdev);
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rdev->pm.current_mclk = mclk;
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DRM_INFO("Setting: m: %d\n", mclk);
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}
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}
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rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index;
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rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index;
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} else
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DRM_INFO("pm: GUI not idle!!!\n");
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}
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static void radeon_pm_set_clocks(struct radeon_device *rdev)
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{
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int i;
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if (rdev->pm.state != PM_STATE_DISABLED)
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radeon_get_power_state(rdev, rdev->pm.planned_action);
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mutex_lock(&rdev->ddev->struct_mutex);
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mutex_lock(&rdev->vram_mutex);
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mutex_lock(&rdev->cp.mutex);
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/* gui idle int has issues on older chips it seems */
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if (rdev->family >= CHIP_R600) {
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/* wait for GPU idle */
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rdev->pm.gui_idle = false;
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rdev->irq.gui_idle = true;
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radeon_irq_set(rdev);
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wait_event_interruptible_timeout(
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rdev->irq.idle_queue, rdev->pm.gui_idle,
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msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT));
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rdev->irq.gui_idle = false;
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radeon_irq_set(rdev);
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if (rdev->irq.installed) {
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/* wait for GPU idle */
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rdev->pm.gui_idle = false;
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rdev->irq.gui_idle = true;
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radeon_irq_set(rdev);
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wait_event_interruptible_timeout(
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rdev->irq.idle_queue, rdev->pm.gui_idle,
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msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT));
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rdev->irq.gui_idle = false;
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radeon_irq_set(rdev);
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}
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} else {
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struct radeon_fence *fence;
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radeon_ring_alloc(rdev, 64);
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radeon_fence_create(rdev, &fence);
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radeon_fence_emit(rdev, fence);
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radeon_ring_commit(rdev);
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radeon_fence_wait(fence, false);
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radeon_fence_unref(&fence);
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if (rdev->cp.ready) {
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struct radeon_fence *fence;
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radeon_ring_alloc(rdev, 64);
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radeon_fence_create(rdev, &fence);
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radeon_fence_emit(rdev, fence);
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radeon_ring_commit(rdev);
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radeon_fence_wait(fence, false);
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radeon_fence_unref(&fence);
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}
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}
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radeon_unmap_vram_bos(rdev);
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if (!static_switch) {
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if (rdev->irq.installed) {
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for (i = 0; i < rdev->num_crtc; i++) {
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if (rdev->pm.active_crtcs & (1 << i)) {
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rdev->pm.req_vblank |= (1 << i);
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@ -96,9 +265,9 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev, int static_switch)
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}
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}
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radeon_set_power_state(rdev, static_switch);
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radeon_set_power_state(rdev);
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if (!static_switch) {
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if (rdev->irq.installed) {
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for (i = 0; i < rdev->num_crtc; i++) {
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if (rdev->pm.req_vblank & (1 << i)) {
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rdev->pm.req_vblank &= ~(1 << i);
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@ -112,230 +281,195 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev, int static_switch)
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if (rdev->pm.active_crtc_count)
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radeon_bandwidth_update(rdev);
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rdev->pm.planned_action = PM_ACTION_NONE;
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rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
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mutex_unlock(&rdev->cp.mutex);
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mutex_unlock(&rdev->vram_mutex);
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mutex_unlock(&rdev->ddev->struct_mutex);
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}
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static ssize_t radeon_get_power_state_static(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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static ssize_t radeon_get_pm_profile(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev));
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struct radeon_device *rdev = ddev->dev_private;
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int cp = rdev->pm.profile;
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return snprintf(buf, PAGE_SIZE, "%d.%d\n", rdev->pm.current_power_state_index,
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rdev->pm.current_clock_mode_index);
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return snprintf(buf, PAGE_SIZE, "%s\n",
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(cp == PM_PROFILE_AUTO) ? "auto" :
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(cp == PM_PROFILE_LOW) ? "low" :
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(cp == PM_PROFILE_HIGH) ? "high" : "default");
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}
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static ssize_t radeon_set_power_state_static(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t count)
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static ssize_t radeon_set_pm_profile(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t count)
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{
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struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev));
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struct radeon_device *rdev = ddev->dev_private;
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int ps, cm;
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if (sscanf(buf, "%u.%u", &ps, &cm) != 2) {
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DRM_ERROR("Invalid power state!\n");
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return count;
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}
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mutex_lock(&rdev->pm.mutex);
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if ((ps >= 0) && (ps < rdev->pm.num_power_states) &&
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(cm >= 0) && (cm < rdev->pm.power_state[ps].num_clock_modes)) {
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if ((rdev->pm.active_crtc_count > 0) &&
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(rdev->pm.power_state[ps].clock_info[cm].flags & RADEON_PM_MODE_NO_DISPLAY)) {
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DRM_ERROR("Invalid power state for display: %d.%d\n", ps, cm);
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} else if ((rdev->pm.active_crtc_count > 1) &&
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(rdev->pm.power_state[ps].flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY)) {
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DRM_ERROR("Invalid power state for multi-head: %d.%d\n", ps, cm);
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} else {
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/* disable dynpm */
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rdev->pm.state = PM_STATE_DISABLED;
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rdev->pm.planned_action = PM_ACTION_NONE;
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rdev->pm.requested_power_state_index = ps;
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rdev->pm.requested_clock_mode_index = cm;
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radeon_pm_set_clocks(rdev, true);
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if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
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if (strncmp("default", buf, strlen("default")) == 0)
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rdev->pm.profile = PM_PROFILE_DEFAULT;
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else if (strncmp("auto", buf, strlen("auto")) == 0)
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rdev->pm.profile = PM_PROFILE_AUTO;
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else if (strncmp("low", buf, strlen("low")) == 0)
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rdev->pm.profile = PM_PROFILE_LOW;
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else if (strncmp("high", buf, strlen("high")) == 0)
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rdev->pm.profile = PM_PROFILE_HIGH;
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else {
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DRM_ERROR("invalid power profile!\n");
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goto fail;
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}
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} else
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DRM_ERROR("Invalid power state: %d.%d\n\n", ps, cm);
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radeon_pm_update_profile(rdev);
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radeon_pm_set_clocks(rdev);
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}
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fail:
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mutex_unlock(&rdev->pm.mutex);
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return count;
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}
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static ssize_t radeon_get_dynpm(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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static ssize_t radeon_get_pm_method(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev));
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struct radeon_device *rdev = ddev->dev_private;
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int pm = rdev->pm.pm_method;
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return snprintf(buf, PAGE_SIZE, "%s\n",
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(rdev->pm.state == PM_STATE_DISABLED) ? "disabled" : "enabled");
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(pm == PM_METHOD_DYNPM) ? "dynpm" : "profile");
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}
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static ssize_t radeon_set_dynpm(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t count)
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static ssize_t radeon_set_pm_method(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t count)
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{
|
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struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev));
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struct radeon_device *rdev = ddev->dev_private;
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int tmp = simple_strtoul(buf, NULL, 10);
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if (tmp == 0) {
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/* update power mode info */
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radeon_pm_compute_clocks(rdev);
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/* disable dynpm */
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if (strncmp("dynpm", buf, strlen("dynpm")) == 0) {
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mutex_lock(&rdev->pm.mutex);
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rdev->pm.state = PM_STATE_DISABLED;
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rdev->pm.planned_action = PM_ACTION_NONE;
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rdev->pm.pm_method = PM_METHOD_DYNPM;
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rdev->pm.dynpm_state = DYNPM_STATE_PAUSED;
|
||||
rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
DRM_INFO("radeon: dynamic power management disabled\n");
|
||||
} else if (tmp == 1) {
|
||||
if (rdev->pm.num_power_states > 1) {
|
||||
/* enable dynpm */
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
rdev->pm.state = PM_STATE_PAUSED;
|
||||
rdev->pm.planned_action = PM_ACTION_DEFAULT;
|
||||
radeon_get_power_state(rdev, rdev->pm.planned_action);
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
/* update power mode info */
|
||||
radeon_pm_compute_clocks(rdev);
|
||||
DRM_INFO("radeon: dynamic power management enabled\n");
|
||||
} else
|
||||
DRM_ERROR("dynpm not valid on this system\n");
|
||||
} else
|
||||
DRM_ERROR("Invalid setting: %d\n", tmp);
|
||||
|
||||
} else if (strncmp("profile", buf, strlen("profile")) == 0) {
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
||||
/* disable dynpm */
|
||||
rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
|
||||
rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
|
||||
cancel_delayed_work(&rdev->pm.dynpm_idle_work);
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
} else {
|
||||
DRM_ERROR("invalid power method!\n");
|
||||
goto fail;
|
||||
}
|
||||
radeon_pm_compute_clocks(rdev);
|
||||
fail:
|
||||
return count;
|
||||
}
|
||||
|
||||
static DEVICE_ATTR(power_state, S_IRUGO | S_IWUSR, radeon_get_power_state_static, radeon_set_power_state_static);
|
||||
static DEVICE_ATTR(dynpm, S_IRUGO | S_IWUSR, radeon_get_dynpm, radeon_set_dynpm);
|
||||
static DEVICE_ATTR(power_profile, S_IRUGO | S_IWUSR, radeon_get_pm_profile, radeon_set_pm_profile);
|
||||
static DEVICE_ATTR(power_method, S_IRUGO | S_IWUSR, radeon_get_pm_method, radeon_set_pm_method);
|
||||
|
||||
|
||||
static const char *pm_state_names[4] = {
|
||||
"PM_STATE_DISABLED",
|
||||
"PM_STATE_MINIMUM",
|
||||
"PM_STATE_PAUSED",
|
||||
"PM_STATE_ACTIVE"
|
||||
};
|
||||
|
||||
static const char *pm_state_types[5] = {
|
||||
"",
|
||||
"Powersave",
|
||||
"Battery",
|
||||
"Balanced",
|
||||
"Performance",
|
||||
};
|
||||
|
||||
static void radeon_print_power_mode_info(struct radeon_device *rdev)
|
||||
void radeon_pm_suspend(struct radeon_device *rdev)
|
||||
{
|
||||
int i, j;
|
||||
bool is_default;
|
||||
|
||||
DRM_INFO("%d Power State(s)\n", rdev->pm.num_power_states);
|
||||
for (i = 0; i < rdev->pm.num_power_states; i++) {
|
||||
if (rdev->pm.default_power_state_index == i)
|
||||
is_default = true;
|
||||
else
|
||||
is_default = false;
|
||||
DRM_INFO("State %d %s %s\n", i,
|
||||
pm_state_types[rdev->pm.power_state[i].type],
|
||||
is_default ? "(default)" : "");
|
||||
if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP))
|
||||
DRM_INFO("\t%d PCIE Lanes\n", rdev->pm.power_state[i].pcie_lanes);
|
||||
if (rdev->pm.power_state[i].flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY)
|
||||
DRM_INFO("\tSingle display only\n");
|
||||
DRM_INFO("\t%d Clock Mode(s)\n", rdev->pm.power_state[i].num_clock_modes);
|
||||
for (j = 0; j < rdev->pm.power_state[i].num_clock_modes; j++) {
|
||||
if (rdev->flags & RADEON_IS_IGP)
|
||||
DRM_INFO("\t\t%d engine: %d\n",
|
||||
j,
|
||||
rdev->pm.power_state[i].clock_info[j].sclk * 10);
|
||||
else
|
||||
DRM_INFO("\t\t%d engine/memory: %d/%d\n",
|
||||
j,
|
||||
rdev->pm.power_state[i].clock_info[j].sclk * 10,
|
||||
rdev->pm.power_state[i].clock_info[j].mclk * 10);
|
||||
if (rdev->pm.power_state[i].clock_info[j].flags & RADEON_PM_MODE_NO_DISPLAY)
|
||||
DRM_INFO("\t\tNo display only\n");
|
||||
}
|
||||
}
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
cancel_delayed_work(&rdev->pm.dynpm_idle_work);
|
||||
rdev->pm.current_power_state_index = -1;
|
||||
rdev->pm.current_clock_mode_index = -1;
|
||||
rdev->pm.current_sclk = 0;
|
||||
rdev->pm.current_mclk = 0;
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
}
|
||||
|
||||
void radeon_sync_with_vblank(struct radeon_device *rdev)
|
||||
void radeon_pm_resume(struct radeon_device *rdev)
|
||||
{
|
||||
if (rdev->pm.active_crtcs) {
|
||||
rdev->pm.vblank_sync = false;
|
||||
wait_event_timeout(
|
||||
rdev->irq.vblank_queue, rdev->pm.vblank_sync,
|
||||
msecs_to_jiffies(RADEON_WAIT_VBLANK_TIMEOUT));
|
||||
}
|
||||
radeon_pm_compute_clocks(rdev);
|
||||
}
|
||||
|
||||
int radeon_pm_init(struct radeon_device *rdev)
|
||||
{
|
||||
rdev->pm.state = PM_STATE_DISABLED;
|
||||
rdev->pm.planned_action = PM_ACTION_NONE;
|
||||
rdev->pm.can_upclock = true;
|
||||
rdev->pm.can_downclock = true;
|
||||
/* default to profile method */
|
||||
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
||||
rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
|
||||
rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
|
||||
rdev->pm.dynpm_can_upclock = true;
|
||||
rdev->pm.dynpm_can_downclock = true;
|
||||
rdev->pm.current_sclk = 0;
|
||||
rdev->pm.current_mclk = 0;
|
||||
|
||||
if (rdev->bios) {
|
||||
if (rdev->is_atom_bios)
|
||||
radeon_atombios_get_power_modes(rdev);
|
||||
else
|
||||
radeon_combios_get_power_modes(rdev);
|
||||
radeon_print_power_mode_info(rdev);
|
||||
radeon_pm_init_profile(rdev);
|
||||
rdev->pm.current_power_state_index = -1;
|
||||
rdev->pm.current_clock_mode_index = -1;
|
||||
}
|
||||
|
||||
if (radeon_debugfs_pm_init(rdev)) {
|
||||
DRM_ERROR("Failed to register debugfs file for PM!\n");
|
||||
if (rdev->pm.num_power_states > 1) {
|
||||
if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
rdev->pm.profile = PM_PROFILE_DEFAULT;
|
||||
radeon_pm_update_profile(rdev);
|
||||
radeon_pm_set_clocks(rdev);
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
}
|
||||
|
||||
/* where's the best place to put these? */
|
||||
device_create_file(rdev->dev, &dev_attr_power_profile);
|
||||
device_create_file(rdev->dev, &dev_attr_power_method);
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
rdev->acpi_nb.notifier_call = radeon_acpi_event;
|
||||
register_acpi_notifier(&rdev->acpi_nb);
|
||||
#endif
|
||||
INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler);
|
||||
|
||||
if (radeon_debugfs_pm_init(rdev)) {
|
||||
DRM_ERROR("Failed to register debugfs file for PM!\n");
|
||||
}
|
||||
|
||||
DRM_INFO("radeon: power management initialized\n");
|
||||
}
|
||||
|
||||
/* where's the best place to put this? */
|
||||
device_create_file(rdev->dev, &dev_attr_power_state);
|
||||
device_create_file(rdev->dev, &dev_attr_dynpm);
|
||||
|
||||
INIT_DELAYED_WORK(&rdev->pm.idle_work, radeon_pm_idle_work_handler);
|
||||
|
||||
if ((radeon_dynpm != -1 && radeon_dynpm) && (rdev->pm.num_power_states > 1)) {
|
||||
rdev->pm.state = PM_STATE_PAUSED;
|
||||
DRM_INFO("radeon: dynamic power management enabled\n");
|
||||
}
|
||||
|
||||
DRM_INFO("radeon: power management initialized\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void radeon_pm_fini(struct radeon_device *rdev)
|
||||
{
|
||||
if (rdev->pm.state != PM_STATE_DISABLED) {
|
||||
/* cancel work */
|
||||
cancel_delayed_work_sync(&rdev->pm.idle_work);
|
||||
/* reset default clocks */
|
||||
rdev->pm.state = PM_STATE_DISABLED;
|
||||
rdev->pm.planned_action = PM_ACTION_DEFAULT;
|
||||
radeon_pm_set_clocks(rdev, true);
|
||||
} else if ((rdev->pm.current_power_state_index !=
|
||||
rdev->pm.default_power_state_index) ||
|
||||
(rdev->pm.current_clock_mode_index != 0)) {
|
||||
rdev->pm.requested_power_state_index = rdev->pm.default_power_state_index;
|
||||
rdev->pm.requested_clock_mode_index = 0;
|
||||
if (rdev->pm.num_power_states > 1) {
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
radeon_pm_set_clocks(rdev, true);
|
||||
if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
|
||||
rdev->pm.profile = PM_PROFILE_DEFAULT;
|
||||
radeon_pm_update_profile(rdev);
|
||||
radeon_pm_set_clocks(rdev);
|
||||
} else if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
|
||||
/* cancel work */
|
||||
cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);
|
||||
/* reset default clocks */
|
||||
rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
|
||||
rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;
|
||||
radeon_pm_set_clocks(rdev);
|
||||
}
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
}
|
||||
|
||||
device_remove_file(rdev->dev, &dev_attr_power_state);
|
||||
device_remove_file(rdev->dev, &dev_attr_dynpm);
|
||||
device_remove_file(rdev->dev, &dev_attr_power_profile);
|
||||
device_remove_file(rdev->dev, &dev_attr_power_method);
|
||||
#ifdef CONFIG_ACPI
|
||||
unregister_acpi_notifier(&rdev->acpi_nb);
|
||||
#endif
|
||||
}
|
||||
|
||||
if (rdev->pm.i2c_bus)
|
||||
radeon_i2c_destroy(rdev->pm.i2c_bus);
|
||||
|
|
@ -347,6 +481,9 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev)
|
|||
struct drm_crtc *crtc;
|
||||
struct radeon_crtc *radeon_crtc;
|
||||
|
||||
if (rdev->pm.num_power_states < 2)
|
||||
return;
|
||||
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
|
||||
rdev->pm.active_crtcs = 0;
|
||||
|
|
@ -360,55 +497,56 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev)
|
|||
}
|
||||
}
|
||||
|
||||
if (rdev->pm.state == PM_STATE_DISABLED) {
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
return;
|
||||
}
|
||||
if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
|
||||
radeon_pm_update_profile(rdev);
|
||||
radeon_pm_set_clocks(rdev);
|
||||
} else if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
|
||||
if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) {
|
||||
if (rdev->pm.active_crtc_count > 1) {
|
||||
if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) {
|
||||
cancel_delayed_work(&rdev->pm.dynpm_idle_work);
|
||||
|
||||
/* Note, radeon_pm_set_clocks is called with static_switch set
|
||||
* to true since we always want to statically set the clocks,
|
||||
* not wait for vbl.
|
||||
*/
|
||||
if (rdev->pm.active_crtc_count > 1) {
|
||||
if (rdev->pm.state == PM_STATE_ACTIVE) {
|
||||
cancel_delayed_work(&rdev->pm.idle_work);
|
||||
rdev->pm.dynpm_state = DYNPM_STATE_PAUSED;
|
||||
rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;
|
||||
radeon_pm_get_dynpm_state(rdev);
|
||||
radeon_pm_set_clocks(rdev);
|
||||
|
||||
rdev->pm.state = PM_STATE_PAUSED;
|
||||
rdev->pm.planned_action = PM_ACTION_DEFAULT;
|
||||
radeon_pm_set_clocks(rdev, true);
|
||||
DRM_DEBUG("radeon: dynamic power management deactivated\n");
|
||||
}
|
||||
} else if (rdev->pm.active_crtc_count == 1) {
|
||||
/* TODO: Increase clocks if needed for current mode */
|
||||
|
||||
DRM_DEBUG("radeon: dynamic power management deactivated\n");
|
||||
}
|
||||
} else if (rdev->pm.active_crtc_count == 1) {
|
||||
/* TODO: Increase clocks if needed for current mode */
|
||||
if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) {
|
||||
rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;
|
||||
rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK;
|
||||
radeon_pm_get_dynpm_state(rdev);
|
||||
radeon_pm_set_clocks(rdev);
|
||||
|
||||
if (rdev->pm.state == PM_STATE_MINIMUM) {
|
||||
rdev->pm.state = PM_STATE_ACTIVE;
|
||||
rdev->pm.planned_action = PM_ACTION_UPCLOCK;
|
||||
radeon_pm_set_clocks(rdev, true);
|
||||
queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work,
|
||||
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
|
||||
} else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) {
|
||||
rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;
|
||||
queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work,
|
||||
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
|
||||
DRM_DEBUG("radeon: dynamic power management activated\n");
|
||||
}
|
||||
} else { /* count == 0 */
|
||||
if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) {
|
||||
cancel_delayed_work(&rdev->pm.dynpm_idle_work);
|
||||
|
||||
queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
|
||||
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
|
||||
} else if (rdev->pm.state == PM_STATE_PAUSED) {
|
||||
rdev->pm.state = PM_STATE_ACTIVE;
|
||||
queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
|
||||
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
|
||||
DRM_DEBUG("radeon: dynamic power management activated\n");
|
||||
}
|
||||
} else { /* count == 0 */
|
||||
if (rdev->pm.state != PM_STATE_MINIMUM) {
|
||||
cancel_delayed_work(&rdev->pm.idle_work);
|
||||
|
||||
rdev->pm.state = PM_STATE_MINIMUM;
|
||||
rdev->pm.planned_action = PM_ACTION_MINIMUM;
|
||||
radeon_pm_set_clocks(rdev, true);
|
||||
rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM;
|
||||
rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM;
|
||||
radeon_pm_get_dynpm_state(rdev);
|
||||
radeon_pm_set_clocks(rdev);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
}
|
||||
|
||||
bool radeon_pm_in_vbl(struct radeon_device *rdev)
|
||||
static bool radeon_pm_in_vbl(struct radeon_device *rdev)
|
||||
{
|
||||
u32 stat_crtc = 0, vbl = 0, position = 0;
|
||||
bool in_vbl = true;
|
||||
|
|
@ -480,7 +618,7 @@ bool radeon_pm_in_vbl(struct radeon_device *rdev)
|
|||
return in_vbl;
|
||||
}
|
||||
|
||||
bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish)
|
||||
static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish)
|
||||
{
|
||||
u32 stat_crtc = 0;
|
||||
bool in_vbl = radeon_pm_in_vbl(rdev);
|
||||
|
|
@ -491,16 +629,16 @@ bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish)
|
|||
return in_vbl;
|
||||
}
|
||||
|
||||
static void radeon_pm_idle_work_handler(struct work_struct *work)
|
||||
static void radeon_dynpm_idle_work_handler(struct work_struct *work)
|
||||
{
|
||||
struct radeon_device *rdev;
|
||||
int resched;
|
||||
rdev = container_of(work, struct radeon_device,
|
||||
pm.idle_work.work);
|
||||
pm.dynpm_idle_work.work);
|
||||
|
||||
resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev);
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
if (rdev->pm.state == PM_STATE_ACTIVE) {
|
||||
if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) {
|
||||
unsigned long irq_flags;
|
||||
int not_processed = 0;
|
||||
|
||||
|
|
@ -516,23 +654,23 @@ static void radeon_pm_idle_work_handler(struct work_struct *work)
|
|||
read_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
||||
|
||||
if (not_processed >= 3) { /* should upclock */
|
||||
if (rdev->pm.planned_action == PM_ACTION_DOWNCLOCK) {
|
||||
rdev->pm.planned_action = PM_ACTION_NONE;
|
||||
} else if (rdev->pm.planned_action == PM_ACTION_NONE &&
|
||||
rdev->pm.can_upclock) {
|
||||
rdev->pm.planned_action =
|
||||
PM_ACTION_UPCLOCK;
|
||||
rdev->pm.action_timeout = jiffies +
|
||||
if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) {
|
||||
rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
|
||||
} else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE &&
|
||||
rdev->pm.dynpm_can_upclock) {
|
||||
rdev->pm.dynpm_planned_action =
|
||||
DYNPM_ACTION_UPCLOCK;
|
||||
rdev->pm.dynpm_action_timeout = jiffies +
|
||||
msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
|
||||
}
|
||||
} else if (not_processed == 0) { /* should downclock */
|
||||
if (rdev->pm.planned_action == PM_ACTION_UPCLOCK) {
|
||||
rdev->pm.planned_action = PM_ACTION_NONE;
|
||||
} else if (rdev->pm.planned_action == PM_ACTION_NONE &&
|
||||
rdev->pm.can_downclock) {
|
||||
rdev->pm.planned_action =
|
||||
PM_ACTION_DOWNCLOCK;
|
||||
rdev->pm.action_timeout = jiffies +
|
||||
if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) {
|
||||
rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
|
||||
} else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE &&
|
||||
rdev->pm.dynpm_can_downclock) {
|
||||
rdev->pm.dynpm_planned_action =
|
||||
DYNPM_ACTION_DOWNCLOCK;
|
||||
rdev->pm.dynpm_action_timeout = jiffies +
|
||||
msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
|
||||
}
|
||||
}
|
||||
|
|
@ -540,15 +678,16 @@ static void radeon_pm_idle_work_handler(struct work_struct *work)
|
|||
/* Note, radeon_pm_set_clocks is called with static_switch set
|
||||
* to false since we want to wait for vbl to avoid flicker.
|
||||
*/
|
||||
if (rdev->pm.planned_action != PM_ACTION_NONE &&
|
||||
jiffies > rdev->pm.action_timeout) {
|
||||
radeon_pm_set_clocks(rdev, false);
|
||||
if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE &&
|
||||
jiffies > rdev->pm.dynpm_action_timeout) {
|
||||
radeon_pm_get_dynpm_state(rdev);
|
||||
radeon_pm_set_clocks(rdev);
|
||||
}
|
||||
}
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched);
|
||||
|
||||
queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
|
||||
queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work,
|
||||
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
|
||||
}
|
||||
|
||||
|
|
@ -563,7 +702,6 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
|
|||
struct drm_device *dev = node->minor->dev;
|
||||
struct radeon_device *rdev = dev->dev_private;
|
||||
|
||||
seq_printf(m, "state: %s\n", pm_state_names[rdev->pm.state]);
|
||||
seq_printf(m, "default engine clock: %u0 kHz\n", rdev->clock.default_sclk);
|
||||
seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
|
||||
seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue