drm/radeon/kms: add dynamic engine reclocking (V9)
V2: reorganize functions, fix modesetting calls V3: rebase patch, use radeon's workqueue V4: enable on tested chipsets only, request VBLANK IRQs V5: enable PM on older hardware (IRQs, mode_fixup, dpms) V6: use separate dynpm module parameter V7: drop RADEON_ prefix, set minimum mode for dpms off V8: update legacy encoder call, fix order in rs600 IRQ V9: update compute_clocks call in legacy, not only DPMS_OFF Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Rafał Miłecki
Dave Airlie
parent
18917b60bc
commit
c913e23a14
9 changed files with 314 additions and 4 deletions
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@ -22,17 +22,253 @@
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#include "drmP.h"
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#include "radeon.h"
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int radeon_debugfs_pm_init(struct radeon_device *rdev);
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#define RADEON_IDLE_LOOP_MS 100
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#define RADEON_RECLOCK_DELAY_MS 200
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static void radeon_pm_check_limits(struct radeon_device *rdev);
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static void radeon_pm_set_clocks_locked(struct radeon_device *rdev);
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static void radeon_pm_set_clocks(struct radeon_device *rdev);
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static void radeon_pm_reclock_work_handler(struct work_struct *work);
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static void radeon_pm_idle_work_handler(struct work_struct *work);
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static int radeon_debugfs_pm_init(struct radeon_device *rdev);
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static const char *pm_state_names[4] = {
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"PM_STATE_DISABLED",
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"PM_STATE_MINIMUM",
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"PM_STATE_PAUSED",
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"PM_STATE_ACTIVE"
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};
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int radeon_pm_init(struct radeon_device *rdev)
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{
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rdev->pm.state = PM_STATE_DISABLED;
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rdev->pm.planned_action = PM_ACTION_NONE;
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rdev->pm.downclocked = false;
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rdev->pm.vblank_callback = false;
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radeon_pm_check_limits(rdev);
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if (radeon_debugfs_pm_init(rdev)) {
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DRM_ERROR("Failed to register debugfs file for PM!\n");
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}
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INIT_WORK(&rdev->pm.reclock_work, radeon_pm_reclock_work_handler);
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INIT_DELAYED_WORK(&rdev->pm.idle_work, radeon_pm_idle_work_handler);
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if (radeon_dynpm != -1 && radeon_dynpm) {
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rdev->pm.state = PM_STATE_PAUSED;
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DRM_INFO("radeon: dynamic power management enabled\n");
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}
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DRM_INFO("radeon: power management initialized\n");
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return 0;
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}
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static void radeon_pm_check_limits(struct radeon_device *rdev)
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{
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rdev->pm.min_gpu_engine_clock = rdev->clock.default_sclk - 5000;
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rdev->pm.min_gpu_memory_clock = rdev->clock.default_mclk - 5000;
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}
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void radeon_pm_compute_clocks(struct radeon_device *rdev)
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{
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struct drm_device *ddev = rdev->ddev;
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struct drm_connector *connector;
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struct radeon_crtc *radeon_crtc;
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int count = 0;
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if (rdev->pm.state == PM_STATE_DISABLED)
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return;
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mutex_lock(&rdev->pm.mutex);
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rdev->pm.active_crtcs = 0;
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list_for_each_entry(connector,
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&ddev->mode_config.connector_list, head) {
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if (connector->encoder &&
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connector->dpms != DRM_MODE_DPMS_OFF) {
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radeon_crtc = to_radeon_crtc(connector->encoder->crtc);
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rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id);
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++count;
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}
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}
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if (count > 1) {
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if (rdev->pm.state == PM_STATE_ACTIVE) {
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wait_queue_head_t wait;
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init_waitqueue_head(&wait);
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cancel_delayed_work(&rdev->pm.idle_work);
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rdev->pm.state = PM_STATE_PAUSED;
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rdev->pm.planned_action = PM_ACTION_UPCLOCK;
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rdev->pm.vblank_callback = true;
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mutex_unlock(&rdev->pm.mutex);
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wait_event_timeout(wait, !rdev->pm.downclocked,
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msecs_to_jiffies(300));
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if (!rdev->pm.downclocked)
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radeon_pm_set_clocks(rdev);
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DRM_DEBUG("radeon: dynamic power management deactivated\n");
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} else {
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mutex_unlock(&rdev->pm.mutex);
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}
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} else if (count == 1) {
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rdev->pm.min_mode_engine_clock = rdev->pm.min_gpu_engine_clock;
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rdev->pm.min_mode_memory_clock = rdev->pm.min_gpu_memory_clock;
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/* TODO: Increase clocks if needed for current mode */
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if (rdev->pm.state == PM_STATE_MINIMUM) {
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rdev->pm.state = PM_STATE_ACTIVE;
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rdev->pm.planned_action = PM_ACTION_UPCLOCK;
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radeon_pm_set_clocks_locked(rdev);
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queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
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msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
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}
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else if (rdev->pm.state == PM_STATE_PAUSED) {
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rdev->pm.state = PM_STATE_ACTIVE;
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queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
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msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
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DRM_DEBUG("radeon: dynamic power management activated\n");
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}
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mutex_unlock(&rdev->pm.mutex);
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}
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else { /* count == 0 */
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if (rdev->pm.state != PM_STATE_MINIMUM) {
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cancel_delayed_work(&rdev->pm.idle_work);
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rdev->pm.state = PM_STATE_MINIMUM;
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rdev->pm.planned_action = PM_ACTION_MINIMUM;
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radeon_pm_set_clocks_locked(rdev);
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}
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mutex_unlock(&rdev->pm.mutex);
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}
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}
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static void radeon_pm_set_clocks_locked(struct radeon_device *rdev)
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{
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/*radeon_fence_wait_last(rdev);*/
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switch (rdev->pm.planned_action) {
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case PM_ACTION_UPCLOCK:
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radeon_set_engine_clock(rdev, rdev->clock.default_sclk);
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rdev->pm.downclocked = false;
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break;
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case PM_ACTION_DOWNCLOCK:
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radeon_set_engine_clock(rdev,
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rdev->pm.min_mode_engine_clock);
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rdev->pm.downclocked = true;
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break;
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case PM_ACTION_MINIMUM:
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radeon_set_engine_clock(rdev,
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rdev->pm.min_gpu_engine_clock);
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break;
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case PM_ACTION_NONE:
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DRM_ERROR("%s: PM_ACTION_NONE\n", __func__);
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break;
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}
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rdev->pm.planned_action = PM_ACTION_NONE;
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}
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static void radeon_pm_set_clocks(struct radeon_device *rdev)
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{
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mutex_lock(&rdev->pm.mutex);
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/* new VBLANK irq may come before handling previous one */
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if (rdev->pm.vblank_callback) {
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mutex_lock(&rdev->cp.mutex);
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if (rdev->pm.req_vblank & (1 << 0)) {
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rdev->pm.req_vblank &= ~(1 << 0);
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drm_vblank_put(rdev->ddev, 0);
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}
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if (rdev->pm.req_vblank & (1 << 1)) {
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rdev->pm.req_vblank &= ~(1 << 1);
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drm_vblank_put(rdev->ddev, 1);
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}
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rdev->pm.vblank_callback = false;
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radeon_pm_set_clocks_locked(rdev);
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mutex_unlock(&rdev->cp.mutex);
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}
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mutex_unlock(&rdev->pm.mutex);
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}
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static void radeon_pm_reclock_work_handler(struct work_struct *work)
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{
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struct radeon_device *rdev;
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rdev = container_of(work, struct radeon_device,
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pm.reclock_work);
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radeon_pm_set_clocks(rdev);
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}
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static void radeon_pm_idle_work_handler(struct work_struct *work)
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{
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struct radeon_device *rdev;
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rdev = container_of(work, struct radeon_device,
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pm.idle_work.work);
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mutex_lock(&rdev->pm.mutex);
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if (rdev->pm.state == PM_STATE_ACTIVE &&
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!rdev->pm.vblank_callback) {
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unsigned long irq_flags;
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int not_processed = 0;
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read_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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if (!list_empty(&rdev->fence_drv.emited)) {
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struct list_head *ptr;
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list_for_each(ptr, &rdev->fence_drv.emited) {
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/* count up to 3, that's enought info */
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if (++not_processed >= 3)
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break;
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}
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}
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read_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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if (not_processed >= 3) { /* should upclock */
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if (rdev->pm.planned_action == PM_ACTION_DOWNCLOCK) {
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rdev->pm.planned_action = PM_ACTION_NONE;
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} else if (rdev->pm.planned_action == PM_ACTION_NONE &&
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rdev->pm.downclocked) {
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rdev->pm.planned_action =
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PM_ACTION_UPCLOCK;
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rdev->pm.action_timeout = jiffies +
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msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
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}
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} else if (not_processed == 0) { /* should downclock */
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if (rdev->pm.planned_action == PM_ACTION_UPCLOCK) {
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rdev->pm.planned_action = PM_ACTION_NONE;
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} else if (rdev->pm.planned_action == PM_ACTION_NONE &&
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!rdev->pm.downclocked) {
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rdev->pm.planned_action =
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PM_ACTION_DOWNCLOCK;
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rdev->pm.action_timeout = jiffies +
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msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
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}
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}
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if (rdev->pm.planned_action != PM_ACTION_NONE &&
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jiffies > rdev->pm.action_timeout) {
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if (rdev->pm.active_crtcs & (1 << 0)) {
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rdev->pm.req_vblank |= (1 << 0);
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drm_vblank_get(rdev->ddev, 0);
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}
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if (rdev->pm.active_crtcs & (1 << 1)) {
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rdev->pm.req_vblank |= (1 << 1);
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drm_vblank_get(rdev->ddev, 1);
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}
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rdev->pm.vblank_callback = true;
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}
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}
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mutex_unlock(&rdev->pm.mutex);
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queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
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msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
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}
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/*
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* Debugfs info
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*/
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@ -44,6 +280,7 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
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struct drm_device *dev = node->minor->dev;
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struct radeon_device *rdev = dev->dev_private;
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seq_printf(m, "state: %s\n", pm_state_names[rdev->pm.state]);
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seq_printf(m, "default engine clock: %u0 kHz\n", rdev->clock.default_sclk);
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seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
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seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk);
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@ -58,7 +295,7 @@ static struct drm_info_list radeon_pm_info_list[] = {
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};
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#endif
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int radeon_debugfs_pm_init(struct radeon_device *rdev)
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static int radeon_debugfs_pm_init(struct radeon_device *rdev)
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{
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#if defined(CONFIG_DEBUG_FS)
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return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list));
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