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drm/radeon: add get_allowed_info_register for r6xx/r7xx

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Registers that can be fetched from the info ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2014-10-01 09:36:57 -04:00
parent 18b53e9057
commit c6d2ac2c36
3 changed files with 32 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

26
drivers/gpu/drm/radeon/r600.c
View file

@ -108,6 +108,32 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev);
extern int evergreen_rlc_resume(struct radeon_device *rdev); extern int evergreen_rlc_resume(struct radeon_device *rdev);
extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev); extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev);
/**
* r600_get_allowed_info_register - fetch the register for the info ioctl
*
* @rdev: radeon_device pointer
* @reg: register offset in bytes
* @val: register value
*
* Returns 0 for success or -EINVAL for an invalid register
*
*/
int r600_get_allowed_info_register(struct radeon_device *rdev,
u32 reg, u32 *val)
{
switch (reg) {
case GRBM_STATUS:
case GRBM_STATUS2:
case R_000E50_SRBM_STATUS:
case DMA_STATUS_REG:
case UVD_STATUS:
*val = RREG32(reg);
return 0;
default:
return -EINVAL;
}
}
/** /**
* r600_get_xclk - get the xclk * r600_get_xclk - get the xclk
* *

4
drivers/gpu/drm/radeon/radeon_asic.c
View file

@ -940,6 +940,7 @@ static struct radeon_asic r600_asic = {
.mc_wait_for_idle = &r600_mc_wait_for_idle, .mc_wait_for_idle = &r600_mc_wait_for_idle,
.get_xclk = &r600_get_xclk, .get_xclk = &r600_get_xclk,
.get_gpu_clock_counter = &r600_get_gpu_clock_counter, .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
.get_allowed_info_register = r600_get_allowed_info_register,
.gart = { .gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush, .tlb_flush = &r600_pcie_gart_tlb_flush,
.get_page_entry = &rs600_gart_get_page_entry, .get_page_entry = &rs600_gart_get_page_entry,
@ -1024,6 +1025,7 @@ static struct radeon_asic rv6xx_asic = {
.mc_wait_for_idle = &r600_mc_wait_for_idle, .mc_wait_for_idle = &r600_mc_wait_for_idle,
.get_xclk = &r600_get_xclk, .get_xclk = &r600_get_xclk,
.get_gpu_clock_counter = &r600_get_gpu_clock_counter, .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
.get_allowed_info_register = r600_get_allowed_info_register,
.gart = { .gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush, .tlb_flush = &r600_pcie_gart_tlb_flush,
.get_page_entry = &rs600_gart_get_page_entry, .get_page_entry = &rs600_gart_get_page_entry,
@ -1116,6 +1118,7 @@ static struct radeon_asic rs780_asic = {
.mc_wait_for_idle = &r600_mc_wait_for_idle, .mc_wait_for_idle = &r600_mc_wait_for_idle,
.get_xclk = &r600_get_xclk, .get_xclk = &r600_get_xclk,
.get_gpu_clock_counter = &r600_get_gpu_clock_counter, .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
.get_allowed_info_register = r600_get_allowed_info_register,
.gart = { .gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush, .tlb_flush = &r600_pcie_gart_tlb_flush,
.get_page_entry = &rs600_gart_get_page_entry, .get_page_entry = &rs600_gart_get_page_entry,
@ -1221,6 +1224,7 @@ static struct radeon_asic rv770_asic = {
.mc_wait_for_idle = &r600_mc_wait_for_idle, .mc_wait_for_idle = &r600_mc_wait_for_idle,
.get_xclk = &rv770_get_xclk, .get_xclk = &rv770_get_xclk,
.get_gpu_clock_counter = &r600_get_gpu_clock_counter, .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
.get_allowed_info_register = r600_get_allowed_info_register,
.gart = { .gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush, .tlb_flush = &r600_pcie_gart_tlb_flush,
.get_page_entry = &rs600_gart_get_page_entry, .get_page_entry = &rs600_gart_get_page_entry,

2
drivers/gpu/drm/radeon/radeon_asic.h
View file

@ -384,6 +384,8 @@ u32 r600_gfx_get_wptr(struct radeon_device *rdev,
struct radeon_ring *ring); struct radeon_ring *ring);
void r600_gfx_set_wptr(struct radeon_device *rdev, void r600_gfx_set_wptr(struct radeon_device *rdev,
struct radeon_ring *ring); struct radeon_ring *ring);
int r600_get_allowed_info_register(struct radeon_device *rdev,
u32 reg, u32 *val);
/* r600 irq */ /* r600 irq */
int r600_irq_process(struct radeon_device *rdev); int r600_irq_process(struct radeon_device *rdev);
int r600_irq_init(struct radeon_device *rdev); int r600_irq_init(struct radeon_device *rdev);