[POWERPC] Add general support for mpc7448hpc2 (Taiga) platform
Add support for Freescale mpc7448 (Taiga) board support Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Zang Roy-r61911
Paul Mackerras
parent
1729dc7833
commit
c5d56332fd
7 changed files with 397 additions and 3 deletions
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@ -336,7 +336,7 @@ config PPC_ISERIES
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config EMBEDDED6xx
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bool "Embedded 6xx/7xx/7xxx-based board"
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depends on PPC32 && BROKEN
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depends on PPC32 && (BROKEN||BROKEN_ON_SMP)
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config APUS
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bool "Amiga-APUS"
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@ -436,7 +436,8 @@ config U3_DART
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default n
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config MPIC
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depends on PPC_PSERIES || PPC_PMAC || PPC_MAPLE || PPC_CHRP
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depends on PPC_PSERIES || PPC_PMAC || PPC_MAPLE || PPC_CHRP \
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|| MPC7448HPC2
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bool
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default y
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@ -821,7 +822,8 @@ config MCA
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bool
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config PCI
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bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES)
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bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES) \
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|| MPC7448HPC2
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default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx && !PPC_85xx && !PPC_86xx
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default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
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default PCI_QSPAN if !4xx && !CPM2 && 8xx
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@ -302,6 +302,17 @@ void __init find_legacy_serial_ports(void)
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of_node_put(isa);
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}
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/* First fill our array with tsi-bridge ports */
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for (np = NULL; (np = of_find_compatible_node(np, "serial", "ns16550")) != NULL;) {
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struct device_node *tsi = of_get_parent(np);
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if (tsi && !strcmp(tsi->type, "tsi-bridge")) {
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index = add_legacy_soc_port(np, np);
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if (index >= 0 && np == stdout)
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legacy_serial_console = index;
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}
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of_node_put(tsi);
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}
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#ifdef CONFIG_PCI
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/* Next, try to locate PCI ports */
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for (np = NULL; (np = of_find_all_nodes(np));) {
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@ -14,3 +14,4 @@ obj-$(CONFIG_PPC_PSERIES) += pseries/
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obj-$(CONFIG_PPC_ISERIES) += iseries/
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obj-$(CONFIG_PPC_MAPLE) += maple/
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obj-$(CONFIG_PPC_CELL) += cell/
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obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
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@ -74,6 +74,16 @@ config SANDPOINT
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Select SANDPOINT if configuring for a Motorola Sandpoint X3
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(any flavor).
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config MPC7448HPC2
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bool "Freescale MPC7448HPC2(Taiga)"
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select TSI108_BRIDGE
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select DEFAULT_UIMAGE
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select PPC_UDBG_16550
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select MPIC
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help
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Select MPC7448HPC2 if configuring for Freescale MPC7448HPC2 (Taiga)
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platform
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config RADSTONE_PPC7D
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bool "Radstone Technology PPC7D board"
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select PPC_I8259
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@ -221,6 +231,11 @@ config MV64X60
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select PPC_INDIRECT_PCI
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default y
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config TSI108_BRIDGE
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bool
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depends on MPC7448HPC2
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default y
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menu "Set bridge options"
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depends on MV64X60
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4
arch/powerpc/platforms/embedded6xx/Makefile
Normal file
4
arch/powerpc/platforms/embedded6xx/Makefile
Normal file
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@ -0,0 +1,4 @@
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#
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# Makefile for the 6xx/7xx/7xxxx linux kernel.
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#
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obj-$(CONFIG_MPC7448HPC2) += mpc7448_hpc2.o
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335
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
Normal file
335
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
Normal file
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@ -0,0 +1,335 @@
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/*
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* mpc7448_hpc2.c
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*
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* Board setup routines for the Freescale Taiga platform
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*
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* Author: Jacob Pan
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* jacob.pan@freescale.com
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* Author: Xianghua Xiao
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* x.xiao@freescale.com
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* Maintainer: Roy Zang <tie-fei.zang@freescale.com>
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* Add Flat Device Tree support fot mpc7448hpc2 board
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*
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* Copyright 2004-2006 Freescale Semiconductor, Inc.
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*
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* This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/config.h>
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/ide.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_core.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/tsi108.h>
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#include <asm/pci-bridge.h>
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#include <asm/reg.h>
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#include <mm/mmu_decl.h>
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#include "mpc7448_hpc2.h"
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#include <asm/tsi108_irq.h>
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#include <asm/mpic.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(fmt...) do { printk(fmt); } while(0)
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#else
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#define DBG(fmt...) do { } while(0)
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#endif
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#ifndef CONFIG_PCI
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isa_io_base = MPC7448_HPC2_ISA_IO_BASE;
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isa_mem_base = MPC7448_HPC2_ISA_MEM_BASE;
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pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET;
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#endif
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extern int tsi108_setup_pci(struct device_node *dev);
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extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
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extern void tsi108_pci_int_init(void);
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extern int tsi108_irq_cascade(struct pt_regs *regs, void *unused);
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/*
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* Define all of the IRQ senses and polarities. Taken from the
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* mpc7448hpc manual.
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* Note: Likely, this table and the following function should be
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* obtained and derived from the OF Device Tree.
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*/
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static u_char mpc7448_hpc2_pic_initsenses[] __initdata = {
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/* External on-board sources */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[0] XINT0 from FPGA */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[1] XINT1 from FPGA */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[2] PHY_INT from both GIGE */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[3] RESERVED */
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/* Internal Tsi108/109 interrupt sources */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA0 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA1 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA2 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA3 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART0 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART1 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* I2C */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* GPIO */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE0 */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE1 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* HLP */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* SDC */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Processor IF */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* PCI/X block */
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};
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int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn)
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{
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if (bus == 0 && PCI_SLOT(devfn) == 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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else
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return PCIBIOS_SUCCESSFUL;
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}
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/*
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* find pci slot by devfn in interrupt map of OF tree
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*/
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u8 find_slot_by_devfn(unsigned int *interrupt_map, unsigned int devfn)
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{
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int i;
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unsigned int tmp;
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for (i = 0; i < 4; i++){
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tmp = interrupt_map[i*4*7];
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if ((tmp >> 11) == (devfn >> 3))
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return i;
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}
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return i;
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}
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/*
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* Scans the interrupt map for pci device
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*/
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void mpc7448_hpc2_fixup_irq(struct pci_dev *dev)
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{
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struct pci_controller *hose;
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struct device_node *node;
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unsigned int *interrupt;
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int busnr;
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int len;
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u8 slot;
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u8 pin;
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/* Lookup the hose */
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busnr = dev->bus->number;
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hose = pci_bus_to_hose(busnr);
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if (!hose)
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printk(KERN_ERR "No pci hose found\n");
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/* Check it has an OF node associated */
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node = (struct device_node *) hose->arch_data;
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if (!node)
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printk(KERN_ERR "No pci node found\n");
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interrupt = (unsigned int *) get_property(node, "interrupt-map", &len);
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slot = find_slot_by_devfn(interrupt, dev->devfn);
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pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
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if (pin == 0 || pin > 4)
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pin = 1;
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pin--;
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dev->irq = interrupt[slot*4*7 + pin*7 + 5];
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DBG("TSI_PCI: dev->irq = 0x%x\n", dev->irq);
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}
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/* temporary pci irq map fixup*/
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void __init mpc7448_hpc2_pcibios_fixup(void)
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{
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struct pci_dev *dev = NULL;
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for_each_pci_dev(dev) {
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mpc7448_hpc2_fixup_irq(dev);
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
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}
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}
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static void __init mpc7448_hpc2_setup_arch(void)
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{
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struct device_node *cpu;
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struct device_node *np;
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if (ppc_md.progress)
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ppc_md.progress("mpc7448_hpc2_setup_arch():set_bridge", 0);
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cpu = of_find_node_by_type(NULL, "cpu");
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if (cpu != 0) {
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unsigned int *fp;
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fp = (int *)get_property(cpu, "clock-frequency", NULL);
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if (fp != 0)
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loops_per_jiffy = *fp / HZ;
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else
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loops_per_jiffy = 50000000 / HZ;
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of_node_put(cpu);
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}
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tsi108_csr_vir_base = get_vir_csrbase();
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#ifdef CONFIG_ROOT_NFS
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ROOT_DEV = Root_NFS;
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#else
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ROOT_DEV = Root_HDA1;
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#endif
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#ifdef CONFIG_BLK_DEV_INITRD
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ROOT_DEV = Root_RAM0;
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#endif
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/* setup PCI host bridge */
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#ifdef CONFIG_PCI
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for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
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tsi108_setup_pci(np);
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ppc_md.pci_exclude_device = mpc7448_hpc2_exclude_device;
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if (ppc_md.progress)
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ppc_md.progress("tsi108: resources set", 0x100);
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#endif
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printk(KERN_INFO "MPC7448HPC2 (TAIGA) Platform\n");
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printk(KERN_INFO
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"Jointly ported by Freescale and Tundra Semiconductor\n");
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printk(KERN_INFO
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"Enabling L2 cache then enabling the HID0 prefetch engine.\n");
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}
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/*
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* Interrupt setup and service. Interrrupts on the mpc7448_hpc2 come
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* from the four external INT pins, PCI interrupts are routed via
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* PCI interrupt control registers, it generates internal IRQ23
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*
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* Interrupt routing on the Taiga Board:
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* TSI108:PB_INT[0] -> CPU0:INT#
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* TSI108:PB_INT[1] -> CPU0:MCP#
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* TSI108:PB_INT[2] -> N/C
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* TSI108:PB_INT[3] -> N/C
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*/
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static void __init mpc7448_hpc2_init_IRQ(void)
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{
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struct mpic *mpic;
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phys_addr_t mpic_paddr = 0;
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struct device_node *tsi_pic;
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tsi_pic = of_find_node_by_type(NULL, "open-pic");
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if (tsi_pic) {
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unsigned int size;
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void *prop = get_property(tsi_pic, "reg", &size);
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mpic_paddr = of_translate_address(tsi_pic, prop);
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}
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if (mpic_paddr == 0) {
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printk("%s: No tsi108 PIC found !\n", __FUNCTION__);
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return;
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}
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DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__,
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(u32) mpic_paddr);
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mpic = mpic_alloc(mpic_paddr,
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MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
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MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108),
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0, /* num_sources used */
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TSI108_IRQ_BASE,
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0, /* num_sources used */
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NR_IRQS - 4 /* XXXX */,
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mpc7448_hpc2_pic_initsenses,
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sizeof(mpc7448_hpc2_pic_initsenses), "Tsi108_PIC");
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BUG_ON(mpic == NULL); /* XXXX */
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mpic_init(mpic);
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mpic_setup_cascade(IRQ_TSI108_PCI, tsi108_irq_cascade, mpic);
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tsi108_pci_int_init();
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/* Configure MPIC outputs to CPU0 */
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tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
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}
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void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
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{
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seq_printf(m, "vendor\t\t: Freescale Semiconductor\n");
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seq_printf(m, "machine\t\t: MPC7448hpc2\n");
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}
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void mpc7448_hpc2_restart(char *cmd)
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{
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local_irq_disable();
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/* Set exception prefix high - to the firmware */
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_nmask_and_or_msr(0, MSR_IP);
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for (;;) ; /* Spin until reset happens */
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}
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void mpc7448_hpc2_power_off(void)
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{
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local_irq_disable();
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for (;;) ; /* No way to shut power off with software */
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}
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void mpc7448_hpc2_halt(void)
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{
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mpc7448_hpc2_power_off();
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init mpc7448_hpc2_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (!of_flat_dt_is_compatible(root, "mpc74xx"))
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return 0;
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return 1;
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}
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static int mpc7448_machine_check_exception(struct pt_regs *regs)
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{
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extern void tsi108_clear_pci_cfg_error(void);
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const struct exception_table_entry *entry;
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/* Are we prepared to handle this fault */
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if ((entry = search_exception_tables(regs->nip)) != NULL) {
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tsi108_clear_pci_cfg_error();
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regs->msr |= MSR_RI;
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regs->nip = entry->fixup;
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return 1;
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}
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return 0;
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}
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define_machine(mpc7448_hpc2){
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.name = "MPC7448 HPC2",
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.probe = mpc7448_hpc2_probe,
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.setup_arch = mpc7448_hpc2_setup_arch,
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.init_IRQ = mpc7448_hpc2_init_IRQ,
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.show_cpuinfo = mpc7448_hpc2_show_cpuinfo,
|
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.get_irq = mpic_get_irq,
|
||||
.pcibios_fixup = mpc7448_hpc2_pcibios_fixup,
|
||||
.restart = mpc7448_hpc2_restart,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.machine_check_exception= mpc7448_machine_check_exception,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
26
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h
Normal file
26
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h
Normal file
|
|
@ -0,0 +1,26 @@
|
|||
/*
|
||||
* mpc7448_hpc2.h
|
||||
*
|
||||
* Definitions for Freescale MPC7448_HPC2 platform
|
||||
*
|
||||
* Author: Jacob Pan
|
||||
* jacob.pan@freescale.com
|
||||
* Maintainer: Roy Zang <roy.zang@freescale.com>
|
||||
*
|
||||
* 2006 (c) Freescale Semiconductor, Inc. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*/
|
||||
|
||||
#ifndef __PPC_PLATFORMS_MPC7448_HPC2_H
|
||||
#define __PPC_PLATFORMS_MPC7448_HPC2_H
|
||||
|
||||
#include <asm/ppcboot.h>
|
||||
|
||||
/* Base Addresses for the PCI bus
|
||||
*/
|
||||
#define MPC7448_HPC2_PCI_MEM_OFFSET (0x00000000)
|
||||
#define MPC7448_HPC2_ISA_IO_BASE (0x00000000)
|
||||
#define MPC7448_HPC2_ISA_MEM_BASE (0x00000000)
|
||||
#endif /* __PPC_PLATFORMS_MPC7448_HPC2_H */
|
||||
Loading…
Add table
Add a link
Reference in a new issue