MIPS: Netlogic: Move cores per node out of multi-node.h
Use the current_cpu_data package field to get the node of the current CPU. This allows us to remove xlp_cores_per_node and move nlm_threads_per_node() and nlm_cores_per_node() to netlogic/common.h, which simplifies code. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8889/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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					 6 changed files with 43 additions and 36 deletions
				
			
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			@ -48,15 +48,6 @@
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#endif
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#define NLM_THREADS_PER_CORE	4
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#ifdef CONFIG_CPU_XLR
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#define nlm_cores_per_node()	8
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#else
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extern unsigned int xlp_cores_per_node;
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#define nlm_cores_per_node()	xlp_cores_per_node
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#endif
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#define nlm_threads_per_node()	(nlm_cores_per_node() * NLM_THREADS_PER_CORE)
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#define nlm_cpuid_to_node(c)	((c) / nlm_threads_per_node())
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struct nlm_soc_info {
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	unsigned long	coremask;	/* cores enabled on the soc */
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			@ -111,6 +111,25 @@ static inline int nlm_irq_to_xirq(int node, int irq)
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	return node * NR_IRQS / NLM_NR_NODES + irq;
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}
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extern int nlm_cpu_ready[];
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#ifdef CONFIG_CPU_XLR
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#define nlm_cores_per_node()	8
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#else
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static inline int nlm_cores_per_node(void)
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{
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	return ((read_c0_prid() & PRID_IMP_MASK)
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				== PRID_IMP_NETLOGIC_XLP9XX) ? 32 : 8;
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}
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#endif
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static inline int nlm_threads_per_node(void)
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{
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	return nlm_cores_per_node() * NLM_THREADS_PER_CORE;
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}
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static inline int nlm_hwtid_to_node(int hwtid)
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{
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	return hwtid / nlm_threads_per_node();
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}
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extern int nlm_cpu_ready[];
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#endif /* __ASSEMBLY__ */
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#endif /* _NETLOGIC_COMMON_H_ */
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			@ -230,16 +230,16 @@ static void nlm_init_node_irqs(int node)
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	}
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}
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void nlm_smp_irq_init(int hwcpuid)
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void nlm_smp_irq_init(int hwtid)
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{
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	int node, cpu;
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	int cpu, node;
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	node = nlm_cpuid_to_node(hwcpuid);
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	cpu  = hwcpuid % nlm_threads_per_node();
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	cpu = hwtid % nlm_threads_per_node();
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	node = hwtid / nlm_threads_per_node();
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	if (cpu == 0 && node != 0)
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		nlm_init_node_irqs(node);
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	write_c0_eimr(nlm_current_node()->irqmask);
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	write_c0_eimr(nlm_get_node(node)->irqmask);
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}
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asmlinkage void plat_irq_dispatch(void)
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			@ -59,17 +59,17 @@
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void nlm_send_ipi_single(int logical_cpu, unsigned int action)
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{
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	int cpu, node;
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	unsigned int hwtid;
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	uint64_t picbase;
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	cpu = cpu_logical_map(logical_cpu);
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	node = nlm_cpuid_to_node(cpu);
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	picbase = nlm_get_node(node)->picbase;
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	/* node id is part of hwtid, and needed for send_ipi */
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	hwtid = cpu_logical_map(logical_cpu);
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	picbase = nlm_get_node(nlm_hwtid_to_node(hwtid))->picbase;
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	if (action & SMP_CALL_FUNCTION)
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		nlm_pic_send_ipi(picbase, cpu, IRQ_IPI_SMP_FUNCTION, 0);
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		nlm_pic_send_ipi(picbase, hwtid, IRQ_IPI_SMP_FUNCTION, 0);
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	if (action & SMP_RESCHEDULE_YOURSELF)
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		nlm_pic_send_ipi(picbase, cpu, IRQ_IPI_SMP_RESCHEDULE, 0);
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		nlm_pic_send_ipi(picbase, hwtid, IRQ_IPI_SMP_RESCHEDULE, 0);
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}
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void nlm_send_ipi_mask(const struct cpumask *mask, unsigned int action)
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			@ -120,7 +120,7 @@ static void nlm_init_secondary(void)
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	hwtid = hard_smp_processor_id();
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	current_cpu_data.core = hwtid / NLM_THREADS_PER_CORE;
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	current_cpu_data.package = nlm_cpuid_to_node(hwtid);
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	current_cpu_data.package = nlm_nodeid();
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	nlm_percpu_init(hwtid);
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	nlm_smp_irq_init(hwtid);
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}
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			@ -146,16 +146,18 @@ static cpumask_t phys_cpu_present_mask;
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void nlm_boot_secondary(int logical_cpu, struct task_struct *idle)
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{
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	int cpu, node;
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	uint64_t picbase;
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	int hwtid;
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	hwtid = cpu_logical_map(logical_cpu);
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	picbase = nlm_get_node(nlm_hwtid_to_node(hwtid))->picbase;
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	cpu = cpu_logical_map(logical_cpu);
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	node = nlm_cpuid_to_node(logical_cpu);
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	nlm_next_sp = (unsigned long)__KSTK_TOS(idle);
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	nlm_next_gp = (unsigned long)task_thread_info(idle);
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	/* barrier for sp/gp store above */
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	__sync();
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	nlm_pic_send_ipi(nlm_get_node(node)->picbase, cpu, 1, 1);  /* NMI */
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	nlm_pic_send_ipi(picbase, hwtid, 1, 1);  /* NMI */
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}
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void __init nlm_smp_setup(void)
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			@ -183,7 +185,7 @@ void __init nlm_smp_setup(void)
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			__cpu_number_map[i] = num_cpus;
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			__cpu_logical_map[num_cpus] = i;
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			set_cpu_possible(num_cpus, true);
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			node = nlm_cpuid_to_node(i);
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			node = nlm_hwtid_to_node(i);
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			cpumask_set_cpu(num_cpus, &nlm_get_node(node)->cpumask);
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			++num_cpus;
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		}
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			@ -51,7 +51,6 @@ uint64_t nlm_io_base;
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struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
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cpumask_t nlm_cpumask = CPU_MASK_CPU0;
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unsigned int nlm_threads_per_core;
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unsigned int xlp_cores_per_node;
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static void nlm_linux_exit(void)
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{
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			@ -163,10 +162,6 @@ void __init prom_init(void)
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	void *reset_vec;
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	nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
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	if (cpu_is_xlp9xx())
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		xlp_cores_per_node = 32;
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	else
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		xlp_cores_per_node = 8;
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	nlm_init_boot_cpu();
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	xlp_mmu_init();
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	nlm_node_init(0);
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			@ -111,7 +111,7 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
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	struct nlm_soc_info *nodep;
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	uint64_t syspcibase, fusebase;
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	uint32_t syscoremask, mask, fusemask;
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	int core, n, cpu;
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	int core, n, cpu, ncores;
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	for (n = 0; n < NLM_NR_NODES; n++) {
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		if (n != 0) {
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			@ -168,7 +168,8 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
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		syscoremask = (1 << hweight32(~fusemask & mask)) - 1;
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		pr_info("Node %d - SYS/FUSE coremask %x\n", n, syscoremask);
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		for (core = 0; core < nlm_cores_per_node(); core++) {
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		ncores = nlm_cores_per_node();
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		for (core = 0; core < ncores; core++) {
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			/* we will be on node 0 core 0 */
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			if (n == 0 && core == 0)
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				continue;
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			@ -178,8 +179,7 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
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				continue;
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			/* see if at least the first hw thread is enabled */
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			cpu = (n * nlm_cores_per_node() + core)
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						* NLM_THREADS_PER_CORE;
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			cpu = (n * ncores + core) * NLM_THREADS_PER_CORE;
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			if (!cpumask_test_cpu(cpu, wakeup_mask))
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				continue;
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