Adds basic support for Rockchip Cortex-A9 SoCs.
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQEcBAABCAAGBQJRw/9tAAoJEPOmecmc0R2B3NMH/A609NR5Yag2vftml8Gl+Iya 2k/dligAPxx/WEogXwxrCcEwFvxA3iNvD9M7MuXZ25ffFL6SgYLnxNYCU53rXRmE UBQP3OTW/5FyR3N/JGCLW4G8f6LoNWGtOaZqpMC97J4ucnWV/DtbEpoO7qlET/p0 zUsqIpFc9RGroRAmDuRRKpOuArBX5N9utH4fvpZ1XiXztIaESdCiGDFx4AN5g7Iq uujcKK1NOoj4X/LXj0j4A1ECAhpJ5W8exacdwZZnKVVwA1CpEFxQLu9ekvCYYMNC 6LWhp2/ptgRj7Tv5uVqbHJn4jKd/OM+X0Rn6HcMY1Dwhf37Oa2wPEuQ2qMzcE6A= =4BBI -----END PGP SIGNATURE----- Merge tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc From Heiko Stuebner: Adds basic support for Rockchip Cortex-A9 SoCs. * tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm: add basic support for Rockchip RK3066a boards arm: add debug uarts for rockchip rk29xx and rk3xxx series arm: Add basic clocks for Rockchip rk3066a SoCs clocksource: dw_apb_timer_of: use clocksource_of_init clocksource: dw_apb_timer_of: select DW_APB_TIMER clocksource: dw_apb_timer_of: add clock-handling clocksource: dw_apb_timer_of: enable the use the clocksource as sched clock Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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c20e459fcc
17 changed files with 920 additions and 38 deletions
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arch/arm/include/debug/rockchip.S
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arch/arm/include/debug/rockchip.S
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/*
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* Early serial output macro for Rockchip SoCs
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*
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* Copyright (C) 2012 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#if defined(CONFIG_DEBUG_RK29_UART0)
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#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20060000
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#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed60000
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#elif defined(CONFIG_DEBUG_RK29_UART1)
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#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20064000
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#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed64000
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#elif defined(CONFIG_DEBUG_RK29_UART2)
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#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20068000
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#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed68000
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#elif defined(CONFIG_DEBUG_RK3X_UART0)
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#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x10124000
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#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfeb24000
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#elif defined(CONFIG_DEBUG_RK3X_UART1)
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#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x10126000
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#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfeb26000
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#elif defined(CONFIG_DEBUG_RK3X_UART2)
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#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20064000
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#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed64000
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#elif defined(CONFIG_DEBUG_RK3X_UART3)
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#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20068000
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#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed68000
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#endif
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.macro addruart, rp, rv, tmp
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ldr \rp, =ROCKCHIP_UART_DEBUG_PHYS_BASE
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ldr \rv, =ROCKCHIP_UART_DEBUG_VIRT_BASE
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.endm
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#define UART_SHIFT 2
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#include <asm/hardware/debug-8250.S>
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