Adds basic support for Rockchip Cortex-A9 SoCs.

-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQEcBAABCAAGBQJRw/9tAAoJEPOmecmc0R2B3NMH/A609NR5Yag2vftml8Gl+Iya
 2k/dligAPxx/WEogXwxrCcEwFvxA3iNvD9M7MuXZ25ffFL6SgYLnxNYCU53rXRmE
 UBQP3OTW/5FyR3N/JGCLW4G8f6LoNWGtOaZqpMC97J4ucnWV/DtbEpoO7qlET/p0
 zUsqIpFc9RGroRAmDuRRKpOuArBX5N9utH4fvpZ1XiXztIaESdCiGDFx4AN5g7Iq
 uujcKK1NOoj4X/LXj0j4A1ECAhpJ5W8exacdwZZnKVVwA1CpEFxQLu9ekvCYYMNC
 6LWhp2/ptgRj7Tv5uVqbHJn4jKd/OM+X0Rn6HcMY1Dwhf37Oa2wPEuQ2qMzcE6A=
 =4BBI
 -----END PGP SIGNATURE-----

Merge tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc

From Heiko Stuebner:

Adds basic support for Rockchip Cortex-A9 SoCs.

* tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm: add basic support for Rockchip RK3066a boards
  arm: add debug uarts for rockchip rk29xx and rk3xxx series
  arm: Add basic clocks for Rockchip rk3066a SoCs
  clocksource: dw_apb_timer_of: use clocksource_of_init
  clocksource: dw_apb_timer_of: select DW_APB_TIMER
  clocksource: dw_apb_timer_of: add clock-handling
  clocksource: dw_apb_timer_of: enable the use the clocksource as sched clock

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2013-06-21 11:46:56 +02:00
commit c20e459fcc
17 changed files with 920 additions and 38 deletions

View file

@ -0,0 +1,42 @@
/*
* Early serial output macro for Rockchip SoCs
*
* Copyright (C) 2012 Maxime Ripard
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#if defined(CONFIG_DEBUG_RK29_UART0)
#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20060000
#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed60000
#elif defined(CONFIG_DEBUG_RK29_UART1)
#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20064000
#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed64000
#elif defined(CONFIG_DEBUG_RK29_UART2)
#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20068000
#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed68000
#elif defined(CONFIG_DEBUG_RK3X_UART0)
#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x10124000
#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfeb24000
#elif defined(CONFIG_DEBUG_RK3X_UART1)
#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x10126000
#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfeb26000
#elif defined(CONFIG_DEBUG_RK3X_UART2)
#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20064000
#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed64000
#elif defined(CONFIG_DEBUG_RK3X_UART3)
#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x20068000
#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfed68000
#endif
.macro addruart, rp, rv, tmp
ldr \rp, =ROCKCHIP_UART_DEBUG_PHYS_BASE
ldr \rv, =ROCKCHIP_UART_DEBUG_VIRT_BASE
.endm
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>