IB/mlx5: Fix micro UAR allocator
The micro UAR (uuar) allocator had a bug which resulted from the fact that in each UAR we only have two micro UARs avaialable, those at index 0 and 1. This patch defines iterators to aid in traversing the list of available micro UARs when allocating a uuar. In addition, change the logic in create_user_qp() so that if high class allocation fails (high class means lower latency), we revert to medium class and not to the low class. Signed-off-by: Eli Cohen <eli@mellanox.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
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3 changed files with 70 additions and 27 deletions
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@ -104,9 +104,10 @@ enum {
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};
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enum {
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MLX5_BF_REGS_PER_PAGE = 4,
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MLX5_MAX_UAR_PAGES = 1 << 8,
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MLX5_MAX_UUARS = MLX5_MAX_UAR_PAGES * MLX5_BF_REGS_PER_PAGE,
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MLX5_BF_REGS_PER_PAGE = 4,
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MLX5_MAX_UAR_PAGES = 1 << 8,
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MLX5_NON_FP_BF_REGS_PER_PAGE = 2,
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MLX5_MAX_UUARS = MLX5_MAX_UAR_PAGES * MLX5_NON_FP_BF_REGS_PER_PAGE,
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};
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enum {
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