i7core_edac: CodingSyle fixes/cleanups
No functional changes. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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31983a04d6
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b990538a78
1 changed files with 23 additions and 27 deletions
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@ -38,10 +38,6 @@
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#define I7CORE_REVISION " Ver: 1.0.0 " __DATE__
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#define EDAC_MOD_STR "i7core_edac"
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/* HACK: temporary, just to enable all logs, for now */
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#undef debugf0
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#define debugf0(fmt, arg...) edac_printk(KERN_INFO, "i7core", fmt, ##arg)
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/*
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* Debug macros
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*/
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@ -105,6 +101,7 @@
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#define REPEAT_EN 0x01
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/* OFFSETS for Devices 4,5 and 6 Function 1 */
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#define MC_DOD_CH_DIMM0 0x48
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#define MC_DOD_CH_DIMM1 0x4c
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#define MC_DOD_CH_DIMM2 0x50
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@ -227,7 +224,7 @@ struct pci_id_descr pci_devs[] = {
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/* Memory controller */
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{ PCI_DESCR(3, 0, PCI_DEVICE_ID_INTEL_I7_MCR) },
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{ PCI_DESCR(3, 1, PCI_DEVICE_ID_INTEL_I7_MC_TAD) },
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{ PCI_DESCR(3, 2, PCI_DEVICE_ID_INTEL_I7_MC_RAS) }, /* if RDIMM is supported */
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{ PCI_DESCR(3, 2, PCI_DEVICE_ID_INTEL_I7_MC_RAS) }, /* if RDIMM */
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{ PCI_DESCR(3, 4, PCI_DEVICE_ID_INTEL_I7_MC_TEST) },
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/* Channel 0 */
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@ -894,7 +891,6 @@ static int write_and_test(struct pci_dev *dev, int where, u32 val)
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return -EINVAL;
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}
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/*
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* This routine prepares the Memory Controller for error injection.
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* The error will be injected when some process tries to write to the
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