drm/radeon: fix VGT_GS_INSTANCE_CNT register
This register was incorrect for evergreen and cayman. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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					 3 changed files with 4 additions and 3 deletions
				
			
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			@ -108,9 +108,10 @@
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 * 1.31- Add support for num Z pipes from GET_PARAM
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 * 1.32- fixes for rv740 setup
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 * 1.33- Add r6xx/r7xx const buffer support
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 * 1.34- fix evergreen/cayman GS register
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 */
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#define DRIVER_MAJOR		1
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#define DRIVER_MINOR		33
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#define DRIVER_MINOR		34
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#define DRIVER_PATCHLEVEL	0
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long radeon_drm_ioctl(struct file *filp,
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			@ -532,7 +532,7 @@ cayman 0x9400
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0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET
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0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE
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0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET
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0x00028B74 VGT_GS_INSTANCE_CNT
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0x00028B90 VGT_GS_INSTANCE_CNT
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0x00028BD4 PA_SC_CENTROID_PRIORITY_0
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0x00028BD8 PA_SC_CENTROID_PRIORITY_1
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0x00028BDC PA_SC_LINE_CNTL
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			@ -545,7 +545,7 @@ evergreen 0x9400
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0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET
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0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE
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0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET
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0x00028B74 VGT_GS_INSTANCE_CNT
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0x00028B90 VGT_GS_INSTANCE_CNT
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0x00028C00 PA_SC_LINE_CNTL
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0x00028C08 PA_SU_VTX_CNTL
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0x00028C0C PA_CL_GB_VERT_CLIP_ADJ
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