cxgb4: Added support in debugfs to dump PM module stats
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Hariprasad Shenai
David S. Miller
parent
c778af7d18
commit
b3bbe36a26
5 changed files with 135 additions and 0 deletions
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@ -1054,6 +1054,8 @@ int t4_mc_read(struct adapter *adap, int idx, u32 addr, __be32 *data,
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u64 *parity);
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int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data,
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u64 *parity);
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void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
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void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
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int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data,
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size_t n);
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int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data,
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@ -315,6 +315,71 @@ static const struct file_operations cim_obq_fops = {
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.release = seq_release_private
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};
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/* Show the PM memory stats. These stats include:
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*
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* TX:
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* Read: memory read operation
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* Write Bypass: cut-through
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* Bypass + mem: cut-through and save copy
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*
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* RX:
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* Read: memory read
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* Write Bypass: cut-through
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* Flush: payload trim or drop
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*/
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static int pm_stats_show(struct seq_file *seq, void *v)
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{
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static const char * const tx_pm_stats[] = {
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"Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
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};
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static const char * const rx_pm_stats[] = {
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"Read:", "Write bypass:", "Write mem:", "Flush:"
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};
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int i;
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u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
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u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
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struct adapter *adap = seq->private;
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t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
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t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
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seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
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for (i = 0; i < PM_NSTATS - 1; i++)
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seq_printf(seq, "%-13s %10u %20llu\n",
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tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
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seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
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for (i = 0; i < PM_NSTATS - 1; i++)
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seq_printf(seq, "%-13s %10u %20llu\n",
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rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
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return 0;
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}
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static int pm_stats_open(struct inode *inode, struct file *file)
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{
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return single_open(file, pm_stats_show, inode->i_private);
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}
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static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
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size_t count, loff_t *pos)
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{
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struct adapter *adap = FILE_DATA(file)->i_private;
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t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
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t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
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return count;
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}
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static const struct file_operations pm_stats_debugfs_fops = {
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.owner = THIS_MODULE,
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.open = pm_stats_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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.write = pm_stats_clear
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};
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/* Firmware Device Log dump. */
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static const char * const devlog_level_strings[] = {
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[FW_DEVLOG_LEVEL_EMERG] = "EMERG",
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@ -1434,6 +1499,7 @@ int t4_setup_debugfs(struct adapter *adap)
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{ "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
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{ "obq_sge", &cim_obq_fops, S_IRUSR, 4 },
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{ "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
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{ "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
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#if IS_ENABLED(CONFIG_IPV6)
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{ "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
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#endif
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@ -2511,6 +2511,60 @@ void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
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}
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}
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/**
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* t4_pmtx_get_stats - returns the HW stats from PMTX
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* @adap: the adapter
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* @cnt: where to store the count statistics
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* @cycles: where to store the cycle statistics
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*
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* Returns performance statistics from PMTX.
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*/
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void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[])
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{
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int i;
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u32 data[2];
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for (i = 0; i < PM_NSTATS; i++) {
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t4_write_reg(adap, PM_TX_STAT_CONFIG_A, i + 1);
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cnt[i] = t4_read_reg(adap, PM_TX_STAT_COUNT_A);
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if (is_t4(adap->params.chip)) {
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cycles[i] = t4_read_reg64(adap, PM_TX_STAT_LSB_A);
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} else {
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t4_read_indirect(adap, PM_TX_DBG_CTRL_A,
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PM_TX_DBG_DATA_A, data, 2,
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PM_TX_DBG_STAT_MSB_A);
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cycles[i] = (((u64)data[0] << 32) | data[1]);
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}
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}
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}
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/**
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* t4_pmrx_get_stats - returns the HW stats from PMRX
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* @adap: the adapter
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* @cnt: where to store the count statistics
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* @cycles: where to store the cycle statistics
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*
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* Returns performance statistics from PMRX.
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*/
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void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[])
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{
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int i;
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u32 data[2];
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for (i = 0; i < PM_NSTATS; i++) {
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t4_write_reg(adap, PM_RX_STAT_CONFIG_A, i + 1);
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cnt[i] = t4_read_reg(adap, PM_RX_STAT_COUNT_A);
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if (is_t4(adap->params.chip)) {
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cycles[i] = t4_read_reg64(adap, PM_RX_STAT_LSB_A);
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} else {
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t4_read_indirect(adap, PM_RX_DBG_CTRL_A,
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PM_RX_DBG_DATA_A, data, 2,
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PM_RX_DBG_STAT_MSB_A);
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cycles[i] = (((u64)data[0] << 32) | data[1]);
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}
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}
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}
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/**
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* get_mps_bg_map - return the buffer groups associated with a port
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* @adap: the adapter
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@ -48,6 +48,7 @@ enum {
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NMTUS = 16, /* size of MTU table */
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NCCTRL_WIN = 32, /* # of congestion control windows */
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L2T_SIZE = 4096, /* # of L2T entries */
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PM_NSTATS = 5, /* # of PM stats */
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MBOX_LEN = 64, /* mailbox size in bytes */
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TRACE_LEN = 112, /* length of trace data and mask */
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FILTER_OPT_LEN = 36, /* filter tuple width for optional components */
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@ -1380,6 +1380,12 @@
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#define PBL_BOUND_ERR_CH0_F PBL_BOUND_ERR_CH0_V(1U)
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#define PM_RX_INT_CAUSE_A 0x8fdc
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#define PM_RX_STAT_CONFIG_A 0x8fc8
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#define PM_RX_STAT_COUNT_A 0x8fcc
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#define PM_RX_STAT_LSB_A 0x8fd0
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#define PM_RX_DBG_CTRL_A 0x8fd0
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#define PM_RX_DBG_DATA_A 0x8fd4
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#define PM_RX_DBG_STAT_MSB_A 0x10013
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#define PMRX_FRAMING_ERROR_F 0x003ffff0U
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@ -1404,6 +1410,12 @@
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#define PMRX_E_PCMD_PAR_ERROR_F PMRX_E_PCMD_PAR_ERROR_V(1U)
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#define PM_TX_INT_CAUSE_A 0x8ffc
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#define PM_TX_STAT_CONFIG_A 0x8fe8
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#define PM_TX_STAT_COUNT_A 0x8fec
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#define PM_TX_STAT_LSB_A 0x8ff0
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#define PM_TX_DBG_CTRL_A 0x8ff0
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#define PM_TX_DBG_DATA_A 0x8ff4
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#define PM_TX_DBG_STAT_MSB_A 0x1001a
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#define PCMD_LEN_OVFL0_S 31
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#define PCMD_LEN_OVFL0_V(x) ((x) << PCMD_LEN_OVFL0_S)
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