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ARM: shmobile: r8a7791: add ADSP clocks

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Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree.

Based on the original patch by Konstantin Kozhevnikov
<konstantin.kozhevnikov@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Sergei Shtylyov 2014-12-30 23:20:34 +03:00 • committed by Simon Horman
commit ae65a8ae4c
2 changed files with 9 additions and 4 deletions
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11
arch/arm/boot/dts/r8a7791.dtsi
View file

@ -909,7 +909,7 @@
#clock-cells = <1>; #clock-cells = <1>;
clock-output-names = "main", "pll0", "pll1", "pll3", clock-output-names = "main", "pll0", "pll1", "pll3",
"lb", "qspi", "sdh", "sd0", "z", "lb", "qspi", "sdh", "sd0", "z",
"rcan"; "rcan", "adsp";
}; };
/* Variable factor clocks */ /* Variable factor clocks */
@ -1164,13 +1164,16 @@
mstp5_clks: mstp5_clks@e6150144 { mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>,
<&extal_clk>, <&p_clk>;
#clock-cells = <1>; #clock-cells = <1>;
clock-indices = < clock-indices = <
R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1 R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
R8A7791_CLK_THERMAL R8A7791_CLK_PWM R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL
R8A7791_CLK_PWM
>; >;
clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; clock-output-names = "audmac0", "audmac1", "adsp_mod",
"thermal", "pwm";
}; };
mstp7_clks: mstp7_clks@e615014c { mstp7_clks: mstp7_clks@e615014c {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";

2
include/dt-bindings/clock/r8a7791-clock.h
View file

@ -21,6 +21,7 @@
#define R8A7791_CLK_SD0 7 #define R8A7791_CLK_SD0 7
#define R8A7791_CLK_Z 8 #define R8A7791_CLK_Z 8
#define R8A7791_CLK_RCAN 9 #define R8A7791_CLK_RCAN 9
#define R8A7791_CLK_ADSP 10
/* MSTP0 */ /* MSTP0 */
#define R8A7791_CLK_MSIOF0 0 #define R8A7791_CLK_MSIOF0 0
@ -72,6 +73,7 @@
/* MSTP5 */ /* MSTP5 */
#define R8A7791_CLK_AUDIO_DMAC1 1 #define R8A7791_CLK_AUDIO_DMAC1 1
#define R8A7791_CLK_AUDIO_DMAC0 2 #define R8A7791_CLK_AUDIO_DMAC0 2
#define R8A7791_CLK_ADSP_MOD 6
#define R8A7791_CLK_THERMAL 22 #define R8A7791_CLK_THERMAL 22
#define R8A7791_CLK_PWM 23 #define R8A7791_CLK_PWM 23