Use physical addresses at the interface level, letting drivers remap
them as appropriate. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
7d7ee22121
commit
a5fc9c0bbe
18 changed files with 152 additions and 167 deletions
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@ -45,7 +45,8 @@
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/*
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* Offsets for I/O ASIC registers (relative to (system_base + IOASIC_IOCTL)).
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* Offsets for I/O ASIC registers
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* (relative to (dec_kn_slot_base + IOASIC_IOCTL)).
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*/
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/* all systems */
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#define IO_REG_SCSI_DMA_P 0x00 /* SCSI DMA Pointer */
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@ -13,9 +13,7 @@
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#ifndef __ASM_MIPS_DEC_KN01_H
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#define __ASM_MIPS_DEC_KN01_H
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#include <asm/addrspace.h>
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#define KN01_SLOT_BASE CKSEG1ADDR(0x10000000)
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#define KN01_SLOT_BASE 0x10000000
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#define KN01_SLOT_SIZE 0x01000000
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/*
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@ -40,18 +38,10 @@
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#define KN01_SYS_ROM (15*KN01_SLOT_SIZE) /* system board ROM */
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/*
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* Some port addresses...
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*/
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#define KN01_LANCE_BASE (KN01_SLOT_BASE + KN01_LANCE) /* 0xB8000000 */
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#define KN01_DZ11_BASE (KN01_SLOT_BASE + KN01_DZ11) /* 0xBC000000 */
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#define KN01_RTC_BASE (KN01_SLOT_BASE + KN01_RTC) /* 0xBD000000 */
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/*
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* Frame buffer memory address.
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*/
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#define KN01_VFB_MEM CKSEG1ADDR(0x0fc00000)
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#define KN01_VFB_MEM 0x0fc00000
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/*
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* CPU interrupt bits.
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@ -13,11 +13,7 @@
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#ifndef __ASM_MIPS_DEC_KN02_H
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#define __ASM_MIPS_DEC_KN02_H
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#include <asm/addrspace.h>
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#include <asm/dec/ecc.h>
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#define KN02_SLOT_BASE CKSEG1ADDR(0x1fc00000)
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#define KN02_SLOT_BASE 0x1fc00000
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#define KN02_SLOT_SIZE 0x00080000
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/*
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@ -33,14 +29,6 @@
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#define KN02_SYS_ROM_7 (7*KN02_SLOT_SIZE) /* system board ROM (alias) */
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/*
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* Some port addresses...
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*/
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#define KN02_DZ11_BASE (KN02_SLOT_BASE + KN02_DZ11) /* DZ11 */
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#define KN02_RTC_BASE (KN02_SLOT_BASE + KN02_RTC) /* RTC */
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#define KN02_CSR_BASE (KN02_SLOT_BASE + KN02_CSR) /* CSR */
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/*
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* System Control & Status Register bits.
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*/
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@ -17,31 +17,23 @@
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#ifndef __ASM_MIPS_DEC_KN02XA_H
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#define __ASM_MIPS_DEC_KN02XA_H
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#include <asm/addrspace.h>
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#include <asm/dec/ioasic_addrs.h>
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#define KN02XA_SLOT_BASE CKSEG1ADDR(0x1c000000)
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/*
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* Some port addresses...
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*/
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#define KN02XA_IOASIC_BASE (KN02XA_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */
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#define KN02XA_RTC_BASE (KN02XA_SLOT_BASE + IOASIC_TOY) /* RTC */
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#define KN02XA_SLOT_BASE 0x1c000000
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/*
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* Memory control ASIC registers.
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*/
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#define KN02XA_MER CKSEG1ADDR(0x0c400000) /* memory error register */
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#define KN02XA_MSR CKSEG1ADDR(0x0c800000) /* memory size register */
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#define KN02XA_MER 0x0c400000 /* memory error register */
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#define KN02XA_MSR 0x0c800000 /* memory size register */
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/*
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* CPU control ASIC registers.
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*/
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#define KN02XA_MEM_CONF CKSEG1ADDR(0x0e000000) /* write timeout config */
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#define KN02XA_EAR CKSEG1ADDR(0x0e000004) /* error address register */
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#define KN02XA_BOOT0 CKSEG1ADDR(0x0e000008) /* boot 0 register */
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#define KN02XA_MEM_INTR CKSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */
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#define KN02XA_MEM_CONF 0x0e000000 /* write timeout config */
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#define KN02XA_EAR 0x0e000004 /* error address register */
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#define KN02XA_BOOT0 0x0e000008 /* boot 0 register */
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#define KN02XA_MEM_INTR 0x0e00000c /* write err IRQ stat & ack */
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/*
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* Memory Error Register bits, common definitions.
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@ -10,24 +10,15 @@
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*
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* Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
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* are by courtesy of Chris Fraser.
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* Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki
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* Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki
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*/
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#ifndef __ASM_MIPS_DEC_KN03_H
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#define __ASM_MIPS_DEC_KN03_H
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#include <asm/addrspace.h>
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#include <asm/dec/ecc.h>
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#include <asm/dec/ioasic_addrs.h>
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#define KN03_SLOT_BASE CKSEG1ADDR(0x1f800000)
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/*
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* Some port addresses...
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*/
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#define KN03_IOASIC_BASE (KN03_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */
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#define KN03_RTC_BASE (KN03_SLOT_BASE + IOASIC_TOY) /* RTC */
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#define KN03_MCR_BASE (KN03_SLOT_BASE + IOASIC_MCR) /* MCR */
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#define KN03_SLOT_BASE 0x1f800000
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/*
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* CPU interrupt bits.
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@ -21,7 +21,6 @@
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#ifndef __ASM_MIPS_DEC_KN05_H
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#define __ASM_MIPS_DEC_KN05_H
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#include <asm/addrspace.h>
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#include <asm/dec/ioasic_addrs.h>
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/*
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* passed to the I/O ASIC's decoder like with the KN03 or KN02-BA/CA.
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* Others are handled locally. "Low" slots are always passed.
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*/
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#define KN4K_SLOT_BASE KSEG1ADDR(0x1fc00000)
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#define KN4K_SLOT_BASE 0x1fc00000
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#define KN4K_MB_ROM (0*IOASIC_SLOT_SIZE) /* KN05/KN04 card ROM */
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#define KN4K_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */
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18
include/asm-mips/dec/system.h
Normal file
18
include/asm-mips/dec/system.h
Normal file
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@ -0,0 +1,18 @@
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/*
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* include/asm-mips/dec/system.h
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*
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* Generic DECstation/DECsystem bits.
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*
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* Copyright (C) 2005 Maciej W. Rozycki
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef __ASM_DEC_SYSTEM_H
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#define __ASM_DEC_SYSTEM_H
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extern unsigned long dec_kn_slot_base, dec_kn_slot_size;
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#endif /* __ASM_DEC_SYSTEM_H */
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@ -7,10 +7,8 @@
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*
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* Copyright (c) 1998 Harald Koerfgen
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*/
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#ifndef ASM_TC_H
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#define ASM_TC_H
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extern unsigned long system_base;
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#ifndef __ASM_DEC_TC_H
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#define __ASM_DEC_TC_H
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/*
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* Search for a TURBOchannel Option Module
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*/
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extern unsigned long get_tc_irq_nr(int);
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/*
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* Return TURBOchannel clock frequency in hz
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* Return TURBOchannel clock frequency in Hz
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*/
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extern unsigned long get_tc_speed(void);
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#endif
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#endif /* __ASM_DEC_TC_H */
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@ -3,7 +3,7 @@
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*
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* Copyright (C) 1998, 2001 by Ralf Baechle
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* Copyright (C) 1998 by Harald Koerfgen
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* Copyright (C) 2002 Maciej W. Rozycki
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* Copyright (C) 2002, 2005 Maciej W. Rozycki
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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#define __ASM_MIPS_DEC_RTC_DEC_H
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#include <linux/types.h>
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#include <asm/addrspace.h>
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#include <asm/dec/system.h>
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extern volatile u8 *dec_rtc_base;
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extern unsigned long dec_kn_slot_size;
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#define RTC_PORT(x) CPHYSADDR(dec_rtc_base)
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#define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base)
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#define RTC_IO_EXTENT dec_kn_slot_size
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#define RTC_IOMAPPED 0
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#undef RTC_IRQ
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#define RTC_DEC_YEAR 0x3f /* Where we store the real year on DECs. */
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#include <linux/mc146818rtc.h>
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#include <linux/module.h>
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#include <linux/types.h>
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static inline unsigned char CMOS_READ(unsigned long addr)
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{
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return dec_rtc_base[addr * 4];
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