Merge remote-tracking branch 'wireless-next/master' into mac80211-next

This commit is contained in:
Johannes Berg 2013-04-22 15:31:43 +02:00
commit a42c74ee60
519 changed files with 36506 additions and 8320 deletions

View file

@ -134,6 +134,7 @@ struct bcma_host_ops {
#define BCMA_CORE_I2S 0x834
#define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
#define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
#define BCMA_CORE_ARM_CR4 0x83e
#define BCMA_CORE_DEFAULT 0xFFF
#define BCMA_MAX_NR_CORES 16
@ -173,6 +174,60 @@ struct bcma_host_ops {
#define BCMA_CHIP_ID_BCM53572 53572
#define BCMA_PKG_ID_BCM47188 9
/* Board types (on PCI usually equals to the subsystem dev id) */
/* BCM4313 */
#define BCMA_BOARD_TYPE_BCM94313BU 0X050F
#define BCMA_BOARD_TYPE_BCM94313HM 0X0510
#define BCMA_BOARD_TYPE_BCM94313EPA 0X0511
#define BCMA_BOARD_TYPE_BCM94313HMG 0X051C
/* BCM4716 */
#define BCMA_BOARD_TYPE_BCM94716NR2 0X04CD
/* BCM43224 */
#define BCMA_BOARD_TYPE_BCM943224X21 0X056E
#define BCMA_BOARD_TYPE_BCM943224X21_FCC 0X00D1
#define BCMA_BOARD_TYPE_BCM943224X21B 0X00E9
#define BCMA_BOARD_TYPE_BCM943224M93 0X008B
#define BCMA_BOARD_TYPE_BCM943224M93A 0X0090
#define BCMA_BOARD_TYPE_BCM943224X16 0X0093
#define BCMA_BOARD_TYPE_BCM94322X9 0X008D
#define BCMA_BOARD_TYPE_BCM94322M35E 0X008E
/* BCM43228 */
#define BCMA_BOARD_TYPE_BCM943228BU8 0X0540
#define BCMA_BOARD_TYPE_BCM943228BU9 0X0541
#define BCMA_BOARD_TYPE_BCM943228BU 0X0542
#define BCMA_BOARD_TYPE_BCM943227HM4L 0X0543
#define BCMA_BOARD_TYPE_BCM943227HMB 0X0544
#define BCMA_BOARD_TYPE_BCM943228HM4L 0X0545
#define BCMA_BOARD_TYPE_BCM943228SD 0X0573
/* BCM4331 */
#define BCMA_BOARD_TYPE_BCM94331X19 0X00D6
#define BCMA_BOARD_TYPE_BCM94331X28 0X00E4
#define BCMA_BOARD_TYPE_BCM94331X28B 0X010E
#define BCMA_BOARD_TYPE_BCM94331PCIEBT3AX 0X00E4
#define BCMA_BOARD_TYPE_BCM94331X12_2G 0X00EC
#define BCMA_BOARD_TYPE_BCM94331X12_5G 0X00ED
#define BCMA_BOARD_TYPE_BCM94331X29B 0X00EF
#define BCMA_BOARD_TYPE_BCM94331CSAX 0X00EF
#define BCMA_BOARD_TYPE_BCM94331X19C 0X00F5
#define BCMA_BOARD_TYPE_BCM94331X33 0X00F4
#define BCMA_BOARD_TYPE_BCM94331BU 0X0523
#define BCMA_BOARD_TYPE_BCM94331S9BU 0X0524
#define BCMA_BOARD_TYPE_BCM94331MC 0X0525
#define BCMA_BOARD_TYPE_BCM94331MCI 0X0526
#define BCMA_BOARD_TYPE_BCM94331PCIEBT4 0X0527
#define BCMA_BOARD_TYPE_BCM94331HM 0X0574
#define BCMA_BOARD_TYPE_BCM94331PCIEDUAL 0X059B
#define BCMA_BOARD_TYPE_BCM94331MCH5 0X05A9
#define BCMA_BOARD_TYPE_BCM94331CS 0X05C6
#define BCMA_BOARD_TYPE_BCM94331CD 0X05DA
/* BCM53572 */
#define BCMA_BOARD_TYPE_BCM953572BU 0X058D
#define BCMA_BOARD_TYPE_BCM953572NR2 0X058E
#define BCMA_BOARD_TYPE_BCM947188NR2 0X058F
#define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590
/* BCM43142 */
#define BCMA_BOARD_TYPE_BCM943142HM 0X05E0
struct bcma_device {
struct bcma_bus *bus;
struct bcma_device_id id;

View file

@ -104,6 +104,7 @@
#define BCMA_CC_CHIPST_4706_MIPS_BENDIAN BIT(3) /* 0: little, 1: big endian */
#define BCMA_CC_CHIPST_4706_PCIE1_DISABLE BIT(5) /* PCIE1 enable strap pin */
#define BCMA_CC_CHIPST_5357_NAND_BOOT BIT(4) /* NAND boot, valid for CC rev 38 and/or BCM5357 */
#define BCMA_CC_CHIPST_4360_XTAL_40MZ 0x00000001
#define BCMA_CC_JCMD 0x0030 /* Rev >= 10 only */
#define BCMA_CC_JCMD_START 0x80000000
#define BCMA_CC_JCMD_BUSY 0x80000000
@ -315,6 +316,9 @@
#define BCMA_CC_PMU_CTL 0x0600 /* PMU control */
#define BCMA_CC_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */
#define BCMA_CC_PMU_CTL_ILP_DIV_SHIFT 16
#define BCMA_CC_PMU_CTL_RES 0x00006000 /* reset control mask */
#define BCMA_CC_PMU_CTL_RES_SHIFT 13
#define BCMA_CC_PMU_CTL_RES_RELOAD 0x2 /* reload POR values */
#define BCMA_CC_PMU_CTL_PLL_UPD 0x00000400
#define BCMA_CC_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */
#define BCMA_CC_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */
@ -607,6 +611,8 @@ void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable);
extern u32 bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks);
extern u32 bcma_chipco_get_alp_clock(struct bcma_drv_cc *cc);
void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value);
u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask);

View file

@ -37,6 +37,7 @@
#define BCMA_IOST_BIST_DONE 0x8000
#define BCMA_RESET_CTL 0x0800
#define BCMA_RESET_CTL_RESET 0x0001
#define BCMA_RESET_ST 0x0804
/* BCMA PCI config space registers. */
#define BCMA_PCI_PMCSR 0x44

View file

@ -118,10 +118,8 @@
#ifdef CONFIG_PREEMPT_COUNT
# define preemptible() (preempt_count() == 0 && !irqs_disabled())
# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
#else
# define preemptible() 0
# define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
#endif
#if defined(CONFIG_SMP) || defined(CONFIG_GENERIC_HARDIRQS)

View file

@ -854,6 +854,8 @@ type_pf_tresize(struct ip_set *set, bool retried)
retry:
ret = 0;
htable_bits++;
pr_debug("attempt to resize set %s from %u to %u, t %p\n",
set->name, orig->htable_bits, htable_bits, orig);
if (!htable_bits) {
/* In case we have plenty of memory :-) */
pr_warning("Cannot increase the hashsize of set %s further\n",
@ -873,7 +875,7 @@ retry:
data = ahash_tdata(n, j);
m = hbucket(t, HKEY(data, h->initval, htable_bits));
ret = type_pf_elem_tadd(m, data, AHASH_MAX(h), 0,
type_pf_data_timeout(data));
ip_set_timeout_get(type_pf_data_timeout(data)));
if (ret < 0) {
read_unlock_bh(&set->lock);
ahash_destroy(t);

View file

@ -0,0 +1,124 @@
/*
* Copyright (c) 2013 Broadcom Corporation
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _LINUX_BRCMFMAC_PLATFORM_H
#define _LINUX_BRCMFMAC_PLATFORM_H
/*
* Platform specific driver functions and data. Through the platform specific
* device data functions can be provided to help the brcmfmac driver to
* operate with the device in combination with the used platform.
*
* Use the platform data in the following (similar) way:
*
*
#include <brcmfmac_platform.h>
static void brcmfmac_power_on(void)
{
}
static void brcmfmac_power_off(void)
{
}
static void brcmfmac_reset(void)
{
}
static struct brcmfmac_sdio_platform_data brcmfmac_sdio_pdata = {
.power_on = brcmfmac_power_on,
.power_off = brcmfmac_power_off,
.reset = brcmfmac_reset
};
static struct platform_device brcmfmac_device = {
.name = BRCMFMAC_SDIO_PDATA_NAME,
.id = PLATFORM_DEVID_NONE,
.dev.platform_data = &brcmfmac_sdio_pdata
};
void __init brcmfmac_init_pdata(void)
{
brcmfmac_sdio_pdata.oob_irq_supported = true;
brcmfmac_sdio_pdata.oob_irq_nr = gpio_to_irq(GPIO_BRCMF_SDIO_OOB);
brcmfmac_sdio_pdata.oob_irq_flags = IORESOURCE_IRQ |
IORESOURCE_IRQ_HIGHLEVEL;
platform_device_register(&brcmfmac_device);
}
*
*
* Note: the brcmfmac can be loaded as module or be statically built-in into
* the kernel. If built-in then do note that it uses module_init (and
* module_exit) routines which equal device_initcall. So if you intend to
* create a module with the platform specific data for the brcmfmac and have
* it built-in to the kernel then use a higher initcall then device_initcall
* (see init.h). If this is not done then brcmfmac will load without problems
* but will not pickup the platform data.
*
* When the driver does not "detect" platform driver data then it will continue
* without reporting anything and just assume there is no data needed. Which is
* probably true for most platforms.
*
* Explanation of the platform_data fields:
*
* drive_strength: is the preferred drive_strength to be used for the SDIO
* pins. If 0 then a default value will be used. This is the target drive
* strength, the exact drive strength which will be used depends on the
* capabilities of the device.
*
* oob_irq_supported: does the board have support for OOB interrupts. SDIO
* in-band interrupts are relatively slow and for having less overhead on
* interrupt processing an out of band interrupt can be used. If the HW
* supports this then enable this by setting this field to true and configure
* the oob related fields.
*
* oob_irq_nr, oob_irq_flags: the OOB interrupt information. The values are
* used for registering the irq using request_irq function.
*
* power_on: This function is called by the brcmfmac when the module gets
* loaded. This can be particularly useful for low power devices. The platform
* spcific routine may for example decide to power up the complete device.
* If there is no use-case for this function then provide NULL.
*
* power_off: This function is called by the brcmfmac when the module gets
* unloaded. At this point the device can be powered down or otherwise be reset.
* So if an actual power_off is not supported but reset is then reset the device
* when this function gets called. This can be particularly useful for low power
* devices. If there is no use-case for this function (either power-down or
* reset) then provide NULL.
*
* reset: This function can get called if the device communication broke down.
* This functionality is particularly useful in case of SDIO type devices. It is
* possible to reset a dongle via sdio data interface, but it requires that
* this is fully functional. This function is chip/module specific and this
* function should return only after the complete reset has completed.
*/
#define BRCMFMAC_SDIO_PDATA_NAME "brcmfmac_sdio"
struct brcmfmac_sdio_platform_data {
unsigned int drive_strength;
bool oob_irq_supported;
unsigned int oob_irq_nr;
unsigned long oob_irq_flags;
void (*power_on)(void);
void (*power_off)(void);
void (*reset)(void);
};
#endif /* _LINUX_BRCMFMAC_PLATFORM_H */

View file

@ -24,6 +24,9 @@ struct smpboot_thread_data;
* parked (cpu offline)
* @unpark: Optional unpark function, called when the thread is
* unparked (cpu online)
* @pre_unpark: Optional unpark function, called before the thread is
* unparked (cpu online). This is not guaranteed to be
* called on the target cpu of the thread. Careful!
* @selfparking: Thread is not parked by the park function.
* @thread_comm: The base name of the thread
*/
@ -37,6 +40,7 @@ struct smp_hotplug_thread {
void (*cleanup)(unsigned int cpu, bool online);
void (*park)(unsigned int cpu);
void (*unpark)(unsigned int cpu);
void (*pre_unpark)(unsigned int cpu);
bool selfparking;
const char *thread_comm;
};

View file

@ -298,6 +298,7 @@ struct ucred {
#define SOL_IUCV 277
#define SOL_CAIF 278
#define SOL_ALG 279
#define SOL_NFC 280
/* IPX options */
#define IPX_TYPE 1

View file

@ -26,9 +26,9 @@ struct ssb_sprom_core_pwr_info {
struct ssb_sprom {
u8 revision;
u8 il0mac[6]; /* MAC address for 802.11b/g */
u8 et0mac[6]; /* MAC address for Ethernet */
u8 et1mac[6]; /* MAC address for 802.11a */
u8 il0mac[6] __aligned(sizeof(u16)); /* MAC address for 802.11b/g */
u8 et0mac[6] __aligned(sizeof(u16)); /* MAC address for Ethernet */
u8 et1mac[6] __aligned(sizeof(u16)); /* MAC address for 802.11a */
u8 et0phyaddr; /* MII address for enet0 */
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
@ -340,13 +340,61 @@ enum ssb_bustype {
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */
#define SSB_BOARD_BCM94301CB 0x0406
#define SSB_BOARD_BCM94301MP 0x0407
#define SSB_BOARD_BU4309 0x040A
#define SSB_BOARD_BCM94309CB 0x040B
#define SSB_BOARD_BCM4309MP 0x040C
#define SSB_BOARD_BU4306 0x0416
#define SSB_BOARD_BCM94306MP 0x0418
#define SSB_BOARD_BCM4309G 0x0421
#define SSB_BOARD_BCM4306CB 0x0417
#define SSB_BOARD_BCM4309MP 0x040C
#define SSB_BOARD_BCM94306PC 0x0425 /* pcmcia 3.3v 4306 card */
#define SSB_BOARD_BCM94306CBSG 0x042B /* with SiGe PA */
#define SSB_BOARD_PCSG94306 0x042D /* with SiGe PA */
#define SSB_BOARD_BU4704SD 0x042E /* with sdram */
#define SSB_BOARD_BCM94704AGR 0x042F /* dual 11a/11g Router */
#define SSB_BOARD_BCM94308MP 0x0430 /* 11a-only minipci */
#define SSB_BOARD_BU4318 0x0447
#define SSB_BOARD_CB4318 0x0448
#define SSB_BOARD_MPG4318 0x0449
#define SSB_BOARD_MP4318 0x044A
#define SSB_BOARD_BU4306 0x0416
#define SSB_BOARD_BU4309 0x040A
#define SSB_BOARD_SD4318 0x044B
#define SSB_BOARD_BCM94306P 0x044C /* with SiGe */
#define SSB_BOARD_BCM94303MP 0x044E
#define SSB_BOARD_BCM94306MPM 0x0450
#define SSB_BOARD_BCM94306MPL 0x0453
#define SSB_BOARD_PC4303 0x0454 /* pcmcia */
#define SSB_BOARD_BCM94306MPLNA 0x0457
#define SSB_BOARD_BCM94306MPH 0x045B
#define SSB_BOARD_BCM94306PCIV 0x045C
#define SSB_BOARD_BCM94318MPGH 0x0463
#define SSB_BOARD_BU4311 0x0464
#define SSB_BOARD_BCM94311MC 0x0465
#define SSB_BOARD_BCM94311MCAG 0x0466
/* 4321 boards */
#define SSB_BOARD_BU4321 0x046B
#define SSB_BOARD_BU4321E 0x047C
#define SSB_BOARD_MP4321 0x046C
#define SSB_BOARD_CB2_4321 0x046D
#define SSB_BOARD_CB2_4321_AG 0x0066
#define SSB_BOARD_MC4321 0x046E
/* 4325 boards */
#define SSB_BOARD_BCM94325DEVBU 0x0490
#define SSB_BOARD_BCM94325BGABU 0x0491
#define SSB_BOARD_BCM94325SDGWB 0x0492
#define SSB_BOARD_BCM94325SDGMDL 0x04AA
#define SSB_BOARD_BCM94325SDGMDL2 0x04C6
#define SSB_BOARD_BCM94325SDGMDL3 0x04C9
#define SSB_BOARD_BCM94325SDABGWBA 0x04E1
/* 4322 boards */
#define SSB_BOARD_BCM94322MC 0x04A4
#define SSB_BOARD_BCM94322USB 0x04A8 /* dualband */
#define SSB_BOARD_BCM94322HM 0x04B0
#define SSB_BOARD_BCM94322USB2D 0x04Bf /* single band discrete front end */
/* 4312 boards */
#define SSB_BOARD_BU4312 0x048A
#define SSB_BOARD_BCM4312MCGSG 0x04B5
/* chip_package */
#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */

View file

@ -289,11 +289,11 @@
#define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5
#define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
#define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
#define SSB_SPROM4_ANTAVAIL 0x005D /* Antenna available bitfields */
#define SSB_SPROM4_ANTAVAIL_A 0x00FF /* A-PHY bitfield */
#define SSB_SPROM4_ANTAVAIL_A_SHIFT 0
#define SSB_SPROM4_ANTAVAIL_BG 0xFF00 /* B-PHY and G-PHY bitfield */
#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 8
#define SSB_SPROM4_ANTAVAIL 0x005C /* Antenna available bitfields */
#define SSB_SPROM4_ANTAVAIL_BG 0x00FF /* B-PHY and G-PHY bitfield */
#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 0
#define SSB_SPROM4_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
#define SSB_SPROM4_ANTAVAIL_A_SHIFT 8
#define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
#define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
#define SSB_SPROM4_AGAIN0_SHIFT 0