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clk: samsung: exynos7: Correct CMU_FSYS0 clocks names

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This patch renames CMU_FSYS0 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys0_200.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Alim Akhtar 2015-09-10 14:14:34 +05:30 • committed by Sylwester Nawrocki
parent 6ce0f5cf11
commit a259a61be1
2 changed files with 16 additions and 11 deletions
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3
include/dt-bindings/clock/exynos7-clk.h
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@ -62,7 +62,8 @@
#define CLK_SCLK_MMC2 6
#define CLK_SCLK_MMC1 7
#define CLK_SCLK_MMC0 8
#define TOP1_NR_CLK 9
#define CLK_ACLK_FSYS0_200 9
#define TOP1_NR_CLK 10
/* CCORE */
#define PCLK_RTC 1