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[S390] use inline assembly contraints available with gcc 3.3.3

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Drop support to compile the kernel with gcc versions older than 3.3.3.
This allows us to use the "Q" inline assembly contraint on some more
inline assemblies without duplicating a lot of complex code (e.g. __xchg
and __cmpxchg). The distinction for older gcc versions can be removed
which saves a few lines and simplifies the code.

Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Martin Schwidefsky 2010-02-26 22:37:31 +01:00 • committed by Martin Schwidefsky
parent d1bf85902c
commit 987bcdacb1
11 changed files with 226 additions and 388 deletions
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18
arch/s390/include/asm/processor.h
View file

@ -28,7 +28,7 @@
static inline void get_cpu_id(struct cpuid *ptr)
{
asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
asm volatile("stidp %0" : "=Q" (*ptr));
}
extern void s390_adjust_jiffies(void);
@ -184,9 +184,9 @@ static inline void psw_set_key(unsigned int key)
static inline void __load_psw(psw_t psw)
{
#ifndef __s390x__
asm volatile("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
asm volatile("lpsw %0" : : "Q" (psw) : "cc");
#else
asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
asm volatile("lpswe %0" : : "Q" (psw) : "cc");
#endif
}
@ -206,17 +206,17 @@ static inline void __load_psw_mask (unsigned long mask)
asm volatile(
" basr %0,0\n"
"0: ahi %0,1f-0b\n"
" st %0,4(%1)\n"
" lpsw 0(%1)\n"
" st %0,%O1+4(%R1)\n"
" lpsw %1\n"
"1:"
: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
#else /* __s390x__ */
asm volatile(
" larl %0,1f\n"
" stg %0,8(%1)\n"
" lpswe 0(%1)\n"
" stg %0,%O1+8(%R1)\n"
" lpswe %1\n"
"1:"
: "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
#endif /* __s390x__ */
}