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sh: clkfwk: Use shared sh_clk_div_enable/disable().

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This introduces a new flag for clocks that need to have their divisor
ratio set back to their initial mask at disable time to prevent
interactivity problems with the clock stop bit (presently div6 only).
With this in place it's possible to handle the corner case on top of the
div4 op without any particular need for leaving things split out.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2012-05-25 16:34:48 +09:00
parent 0fa22168e0
commit 764f4e4e33
2 changed files with 38 additions and 45 deletions
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6
include/linux/sh_clk.h
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@ -69,6 +69,8 @@ struct clk {
#define CLK_ENABLE_REG_16BIT BIT(2)
#define CLK_ENABLE_REG_8BIT BIT(3)
#define CLK_MASK_DIV_ON_DISABLE BIT(4)
#define CLK_ENABLE_REG_MASK (CLK_ENABLE_REG_32BIT | \
CLK_ENABLE_REG_16BIT | \
CLK_ENABLE_REG_8BIT)
@ -173,7 +175,7 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
{ \
.enable_reg = (void __iomem *)_reg, \
.enable_bit = 0, /* unused */ \
.flags = _flags, \
.flags = _flags | CLK_MASK_DIV_ON_DISABLE, \
.div_mask = SH_CLK_DIV6_MSK, \
.parent_table = _parents, \
.parent_num = _num_parents, \
@ -187,7 +189,7 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
.enable_reg = (void __iomem *)_reg, \
.enable_bit = 0, /* unused */ \
.div_mask = SH_CLK_DIV6_MSK, \
.flags = _flags, \
.flags = _flags | CLK_MASK_DIV_ON_DISABLE, \
}
int sh_clk_div6_register(struct clk *clks, int nr);