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Merge branch 'pci/host-layerscape' into next

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* pci/host-layerscape:
  PCI: layerscape: Add ls_pcie_msi_host_init()
  PCI: layerscape: Add support for LS1043a and LS2080a
  PCI: layerscape: Remove unused fields from struct ls_pcie
  PCI: layerscape: Update ls_add_pcie_port()
  PCI: layerscape: Factor out SCFG related function
  PCI: layerscape: Ignore PCIe controllers in Endpoint mode
  PCI: layerscape: Remove ls_pcie_establish_link()
This commit is contained in:
Bjorn Helgaas 2015-11-03 08:39:32 -06:00
commit 7225107e15
3 changed files with 165 additions and 58 deletions
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14
Documentation/devicetree/bindings/pci/layerscape-pci.txt
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@ -1,10 +1,20 @@
Freescale Layerscape PCIe controller
This PCIe host controller is based on the Synopsis Designware PCIe IP
This PCIe host controller is based on the Synopsys DesignWare PCIe IP
and thus inherits all the common properties defined in designware-pcie.txt.
This controller derives its clocks from the Reset Configuration Word (RCW)
which is used to describe the PLL settings at the time of chip-reset.
Also as per the available Reference Manuals, there is no specific 'version'
register available in the Freescale PCIe controller register set,
which can allow determining the underlying DesignWare PCIe controller version
information.
Required properties:
- compatible: should contain the platform identifier such as "fsl,ls1021a-pcie"
- compatible: should contain the platform identifier such as:
"fsl,ls1021a-pcie", "snps,dw-pcie"
"fsl,ls2080a-pcie", "snps,dw-pcie"
- reg: base addresses and lengths of the PCIe controller
- interrupts: A list of interrupt outputs of the controller. Must contain an
entry for each entry in the interrupt-names property.