Merge branch 'mlxsw-ipv4-unicast-routing'
Jiri Pirko says: ==================== mlxsw: Implement IPV4 unicast routing This patchset enables IPv4 unicast routing in the Mellanox Spectrum ASIC switch driver. This builds upon the work that was done by a couple of previous patchsets. Patches 1,2,6 add a couple of dependencies outside the driver. Namely, the ability to propagate ndo_neigh_construct()/destroy() through stacked devices and a notification whenever DELAY_PROBE_TIME changes. When propagated down, the ndos allow drivers to add and remove neighbour entries from their private neighbour table. The DELAY_PROBE_TIME notification gives drivers the ability to correctly configure their polling interval for neighbour activity, so that active neighbour won't be marked as STALE. Patches 3-5,7-8 add the neighbour offloading infrastructure, where patch 7 uses the DELAY_PROBE_TIME notification in order to correctly configure the device's polling interval. Patch 8 finally programs neighbours to the device's table based on NEIGH_UPDATE notifications, so that directly connected routes can be used. Patches 9-16 build upon the previous patches and extend the router with remote routes (nexthop) support. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
684a95c064
20 changed files with 1747 additions and 12 deletions
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@ -4137,6 +4137,8 @@ static const struct net_device_ops bond_netdev_ops = {
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.ndo_add_slave = bond_enslave,
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.ndo_add_slave = bond_enslave,
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.ndo_del_slave = bond_release,
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.ndo_del_slave = bond_release,
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.ndo_fix_features = bond_fix_features,
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.ndo_fix_features = bond_fix_features,
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.ndo_neigh_construct = netdev_default_l2upper_neigh_construct,
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.ndo_neigh_destroy = netdev_default_l2upper_neigh_destroy,
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.ndo_bridge_setlink = switchdev_port_bridge_setlink,
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.ndo_bridge_setlink = switchdev_port_bridge_setlink,
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.ndo_bridge_getlink = switchdev_port_bridge_getlink,
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.ndo_bridge_getlink = switchdev_port_bridge_getlink,
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.ndo_bridge_dellink = switchdev_port_bridge_dellink,
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.ndo_bridge_dellink = switchdev_port_bridge_dellink,
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@ -7,5 +7,6 @@ obj-$(CONFIG_MLXSW_SWITCHX2) += mlxsw_switchx2.o
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mlxsw_switchx2-objs := switchx2.o
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mlxsw_switchx2-objs := switchx2.o
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obj-$(CONFIG_MLXSW_SPECTRUM) += mlxsw_spectrum.o
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obj-$(CONFIG_MLXSW_SPECTRUM) += mlxsw_spectrum.o
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mlxsw_spectrum-objs := spectrum.o spectrum_buffers.o \
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mlxsw_spectrum-objs := spectrum.o spectrum_buffers.o \
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spectrum_switchdev.o spectrum_router.o
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spectrum_switchdev.o spectrum_router.o \
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spectrum_kvdl.o
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mlxsw_spectrum-$(CONFIG_MLXSW_SPECTRUM_DCB) += spectrum_dcb.o
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mlxsw_spectrum-$(CONFIG_MLXSW_SPECTRUM_DCB) += spectrum_dcb.o
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@ -607,6 +607,24 @@ MLXSW_ITEM32(cmd_mbox, config_profile,
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*/
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, set_ar_sec, 0x0C, 15, 1);
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MLXSW_ITEM32(cmd_mbox, config_profile, set_ar_sec, 0x0C, 15, 1);
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/* cmd_mbox_config_set_kvd_linear_size
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* Capability bit. Setting a bit to 1 configures the profile
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* according to the mailbox contents.
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, set_kvd_linear_size, 0x0C, 24, 1);
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/* cmd_mbox_config_set_kvd_hash_single_size
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* Capability bit. Setting a bit to 1 configures the profile
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* according to the mailbox contents.
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, set_kvd_hash_single_size, 0x0C, 25, 1);
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/* cmd_mbox_config_set_kvd_hash_double_size
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* Capability bit. Setting a bit to 1 configures the profile
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* according to the mailbox contents.
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, set_kvd_hash_double_size, 0x0C, 26, 1);
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/* cmd_mbox_config_profile_max_vepa_channels
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/* cmd_mbox_config_profile_max_vepa_channels
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* Maximum number of VEPA channels per port (0 through 16)
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* Maximum number of VEPA channels per port (0 through 16)
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* 0 - multi-channel VEPA is disabled
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* 0 - multi-channel VEPA is disabled
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@ -733,6 +751,31 @@ MLXSW_ITEM32(cmd_mbox, config_profile, adaptive_routing_group_cap, 0x4C, 0, 16);
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*/
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, arn, 0x50, 31, 1);
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MLXSW_ITEM32(cmd_mbox, config_profile, arn, 0x50, 31, 1);
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/* cmd_mbox_config_kvd_linear_size
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* KVD Linear Size
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* Valid for Spectrum only
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* Allowed values are 128*N where N=0 or higher
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, kvd_linear_size, 0x54, 0, 24);
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/* cmd_mbox_config_kvd_hash_single_size
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* KVD Hash single-entries size
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* Valid for Spectrum only
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* Allowed values are 128*N where N=0 or higher
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* Must be greater or equal to cap_min_kvd_hash_single_size
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* Must be smaller or equal to cap_kvd_size - kvd_linear_size
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, kvd_hash_single_size, 0x58, 0, 24);
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/* cmd_mbox_config_kvd_hash_double_size
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* KVD Hash double-entries size (units of single-size entries)
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* Valid for Spectrum only
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* Allowed values are 128*N where N=0 or higher
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* Must be either 0 or greater or equal to cap_min_kvd_hash_double_size
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* Must be smaller or equal to cap_kvd_size - kvd_linear_size
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*/
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MLXSW_ITEM32(cmd_mbox, config_profile, kvd_hash_double_size, 0x5C, 0, 24);
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/* cmd_mbox_config_profile_swid_config_mask
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/* cmd_mbox_config_profile_swid_config_mask
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* Modify Switch Partition Configuration mask. When set, the configu-
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* Modify Switch Partition Configuration mask. When set, the configu-
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* ration value for the Switch Partition are taken from the mailbox.
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* ration value for the Switch Partition are taken from the mailbox.
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@ -190,7 +190,8 @@ struct mlxsw_config_profile {
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used_max_ib_mc:1,
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used_max_ib_mc:1,
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used_max_pkey:1,
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used_max_pkey:1,
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used_ar_sec:1,
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used_ar_sec:1,
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used_adaptive_routing_group_cap:1;
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used_adaptive_routing_group_cap:1,
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used_kvd_sizes:1;
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u8 max_vepa_channels;
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u8 max_vepa_channels;
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u16 max_lag;
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u16 max_lag;
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u16 max_port_per_lag;
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u16 max_port_per_lag;
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@ -211,6 +212,9 @@ struct mlxsw_config_profile {
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u8 ar_sec;
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u8 ar_sec;
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u16 adaptive_routing_group_cap;
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u16 adaptive_routing_group_cap;
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u8 arn;
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u8 arn;
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u32 kvd_linear_size;
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u32 kvd_hash_single_size;
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u32 kvd_hash_double_size;
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struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
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struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
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};
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};
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@ -1255,6 +1255,20 @@ static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,
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mlxsw_cmd_mbox_config_profile_adaptive_routing_group_cap_set(
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mlxsw_cmd_mbox_config_profile_adaptive_routing_group_cap_set(
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mbox, profile->adaptive_routing_group_cap);
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mbox, profile->adaptive_routing_group_cap);
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}
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}
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if (profile->used_kvd_sizes) {
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mlxsw_cmd_mbox_config_profile_set_kvd_linear_size_set(
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mbox, 1);
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mlxsw_cmd_mbox_config_profile_kvd_linear_size_set(
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mbox, profile->kvd_linear_size);
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mlxsw_cmd_mbox_config_profile_set_kvd_hash_single_size_set(
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mbox, 1);
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mlxsw_cmd_mbox_config_profile_kvd_hash_single_size_set(
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mbox, profile->kvd_hash_single_size);
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mlxsw_cmd_mbox_config_profile_set_kvd_hash_double_size_set(
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mbox, 1);
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mlxsw_cmd_mbox_config_profile_kvd_hash_double_size_set(
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mbox, profile->kvd_hash_double_size);
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}
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for (i = 0; i < MLXSW_CONFIG_PROFILE_SWID_COUNT; i++)
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for (i = 0; i < MLXSW_CONFIG_PROFILE_SWID_COUNT; i++)
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mlxsw_pci_config_profile_swid_config(mlxsw_pci, mbox, i,
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mlxsw_pci_config_profile_swid_config(mlxsw_pci, mbox, i,
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@ -4,6 +4,7 @@
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* Copyright (c) 2015-2016 Ido Schimmel <idosch@mellanox.com>
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* Copyright (c) 2015-2016 Ido Schimmel <idosch@mellanox.com>
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* Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
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* Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
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* Copyright (c) 2015-2016 Jiri Pirko <jiri@mellanox.com>
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* Copyright (c) 2015-2016 Jiri Pirko <jiri@mellanox.com>
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* Copyright (c) 2016 Yotam Gigi <yotamg@mellanox.com>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* modification, are permitted provided that the following conditions are met:
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@ -3454,6 +3455,137 @@ static inline void mlxsw_reg_ritr_pack(char *payload, bool enable,
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mlxsw_reg_ritr_if_mac_memcpy_to(payload, mac);
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mlxsw_reg_ritr_if_mac_memcpy_to(payload, mac);
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}
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}
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/* RATR - Router Adjacency Table Register
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* --------------------------------------
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* The RATR register is used to configure the Router Adjacency (next-hop)
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* Table.
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*/
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#define MLXSW_REG_RATR_ID 0x8008
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#define MLXSW_REG_RATR_LEN 0x2C
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static const struct mlxsw_reg_info mlxsw_reg_ratr = {
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.id = MLXSW_REG_RATR_ID,
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.len = MLXSW_REG_RATR_LEN,
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};
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enum mlxsw_reg_ratr_op {
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/* Read */
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MLXSW_REG_RATR_OP_QUERY_READ = 0,
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/* Read and clear activity */
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MLXSW_REG_RATR_OP_QUERY_READ_CLEAR = 2,
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/* Write Adjacency entry */
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MLXSW_REG_RATR_OP_WRITE_WRITE_ENTRY = 1,
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/* Write Adjacency entry only if the activity is cleared.
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* The write may not succeed if the activity is set. There is not
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* direct feedback if the write has succeeded or not, however
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* the get will reveal the actual entry (SW can compare the get
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* response to the set command).
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*/
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MLXSW_REG_RATR_OP_WRITE_WRITE_ENTRY_ON_ACTIVITY = 3,
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};
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/* reg_ratr_op
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* Note that Write operation may also be used for updating
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* counter_set_type and counter_index. In this case all other
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* fields must not be updated.
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* Access: OP
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*/
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MLXSW_ITEM32(reg, ratr, op, 0x00, 28, 4);
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/* reg_ratr_v
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* Valid bit. Indicates if the adjacency entry is valid.
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* Note: the device may need some time before reusing an invalidated
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* entry. During this time the entry can not be reused. It is
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* recommended to use another entry before reusing an invalidated
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* entry (e.g. software can put it at the end of the list for
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* reusing). Trying to access an invalidated entry not yet cleared
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* by the device results with failure indicating "Try Again" status.
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* When valid is '0' then egress_router_interface,trap_action,
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* adjacency_parameters and counters are reserved
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* Access: RW
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*/
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MLXSW_ITEM32(reg, ratr, v, 0x00, 24, 1);
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/* reg_ratr_a
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* Activity. Set for new entries. Set if a packet lookup has hit on
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* the specific entry. To clear the a bit, use "clear activity".
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* Access: RO
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*/
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MLXSW_ITEM32(reg, ratr, a, 0x00, 16, 1);
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/* reg_ratr_adjacency_index_low
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* Bits 15:0 of index into the adjacency table.
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* For SwitchX and SwitchX-2, the adjacency table is linear and
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* used for adjacency entries only.
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* For Spectrum, the index is to the KVD linear.
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* Access: Index
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*/
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MLXSW_ITEM32(reg, ratr, adjacency_index_low, 0x04, 0, 16);
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/* reg_ratr_egress_router_interface
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* Range is 0 .. cap_max_router_interfaces - 1
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* Access: RW
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*/
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MLXSW_ITEM32(reg, ratr, egress_router_interface, 0x08, 0, 16);
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enum mlxsw_reg_ratr_trap_action {
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MLXSW_REG_RATR_TRAP_ACTION_NOP,
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MLXSW_REG_RATR_TRAP_ACTION_TRAP,
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MLXSW_REG_RATR_TRAP_ACTION_MIRROR_TO_CPU,
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MLXSW_REG_RATR_TRAP_ACTION_MIRROR,
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MLXSW_REG_RATR_TRAP_ACTION_DISCARD_ERRORS,
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};
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/* reg_ratr_trap_action
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* see mlxsw_reg_ratr_trap_action
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* Access: RW
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*/
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MLXSW_ITEM32(reg, ratr, trap_action, 0x0C, 28, 4);
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enum mlxsw_reg_ratr_trap_id {
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MLXSW_REG_RATR_TRAP_ID_RTR_EGRESS0 = 0,
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MLXSW_REG_RATR_TRAP_ID_RTR_EGRESS1 = 1,
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};
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/* reg_ratr_adjacency_index_high
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* Bits 23:16 of the adjacency_index.
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* Access: Index
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*/
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MLXSW_ITEM32(reg, ratr, adjacency_index_high, 0x0C, 16, 8);
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/* reg_ratr_trap_id
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* Trap ID to be reported to CPU.
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* Trap-ID is RTR_EGRESS0 or RTR_EGRESS1.
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* For trap_action of NOP, MIRROR and DISCARD_ERROR
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* Access: RW
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||||||
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*/
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MLXSW_ITEM32(reg, ratr, trap_id, 0x0C, 0, 8);
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||||||
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/* reg_ratr_eth_destination_mac
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* MAC address of the destination next-hop.
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||||||
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* Access: RW
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||||||
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*/
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||||||
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MLXSW_ITEM_BUF(reg, ratr, eth_destination_mac, 0x12, 6);
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||||||
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||||||
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static inline void
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mlxsw_reg_ratr_pack(char *payload,
|
||||||
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enum mlxsw_reg_ratr_op op, bool valid,
|
||||||
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u32 adjacency_index, u16 egress_rif)
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||||||
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{
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||||||
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MLXSW_REG_ZERO(ratr, payload);
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||||||
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mlxsw_reg_ratr_op_set(payload, op);
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||||||
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mlxsw_reg_ratr_v_set(payload, valid);
|
||||||
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mlxsw_reg_ratr_adjacency_index_low_set(payload, adjacency_index);
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||||||
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mlxsw_reg_ratr_adjacency_index_high_set(payload, adjacency_index >> 16);
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||||||
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mlxsw_reg_ratr_egress_router_interface_set(payload, egress_rif);
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||||||
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}
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||||||
|
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||||||
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static inline void mlxsw_reg_ratr_eth_entry_pack(char *payload,
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const char *dest_mac)
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||||||
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{
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||||||
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mlxsw_reg_ratr_eth_destination_mac_memcpy_to(payload, dest_mac);
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||||||
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}
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||||||
|
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||||||
/* RALTA - Router Algorithmic LPM Tree Allocation Register
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/* RALTA - Router Algorithmic LPM Tree Allocation Register
|
||||||
* -------------------------------------------------------
|
* -------------------------------------------------------
|
||||||
* RALTA is used to allocate the LPM trees of the SHSPM method.
|
* RALTA is used to allocate the LPM trees of the SHSPM method.
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||||||
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@ -3884,6 +4016,356 @@ mlxsw_reg_ralue_act_ip2me_pack(char *payload)
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||||||
MLXSW_REG_RALUE_ACTION_TYPE_IP2ME);
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MLXSW_REG_RALUE_ACTION_TYPE_IP2ME);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* RAUHT - Router Algorithmic LPM Unicast Host Table Register
|
||||||
|
* ----------------------------------------------------------
|
||||||
|
* The RAUHT register is used to configure and query the Unicast Host table in
|
||||||
|
* devices that implement the Algorithmic LPM.
|
||||||
|
*/
|
||||||
|
#define MLXSW_REG_RAUHT_ID 0x8014
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||||||
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#define MLXSW_REG_RAUHT_LEN 0x74
|
||||||
|
|
||||||
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static const struct mlxsw_reg_info mlxsw_reg_rauht = {
|
||||||
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.id = MLXSW_REG_RAUHT_ID,
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||||||
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.len = MLXSW_REG_RAUHT_LEN,
|
||||||
|
};
|
||||||
|
|
||||||
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enum mlxsw_reg_rauht_type {
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||||||
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MLXSW_REG_RAUHT_TYPE_IPV4,
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||||||
|
MLXSW_REG_RAUHT_TYPE_IPV6,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* reg_rauht_type
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauht, type, 0x00, 24, 2);
|
||||||
|
|
||||||
|
enum mlxsw_reg_rauht_op {
|
||||||
|
MLXSW_REG_RAUHT_OP_QUERY_READ = 0,
|
||||||
|
/* Read operation */
|
||||||
|
MLXSW_REG_RAUHT_OP_QUERY_CLEAR_ON_READ = 1,
|
||||||
|
/* Clear on read operation. Used to read entry and clear
|
||||||
|
* activity bit.
|
||||||
|
*/
|
||||||
|
MLXSW_REG_RAUHT_OP_WRITE_ADD = 0,
|
||||||
|
/* Add. Used to write a new entry to the table. All R/W fields are
|
||||||
|
* relevant for new entry. Activity bit is set for new entries.
|
||||||
|
*/
|
||||||
|
MLXSW_REG_RAUHT_OP_WRITE_UPDATE = 1,
|
||||||
|
/* Update action. Used to update an existing route entry and
|
||||||
|
* only update the following fields:
|
||||||
|
* trap_action, trap_id, mac, counter_set_type, counter_index
|
||||||
|
*/
|
||||||
|
MLXSW_REG_RAUHT_OP_WRITE_CLEAR_ACTIVITY = 2,
|
||||||
|
/* Clear activity. A bit is cleared for the entry. */
|
||||||
|
MLXSW_REG_RAUHT_OP_WRITE_DELETE = 3,
|
||||||
|
/* Delete entry */
|
||||||
|
MLXSW_REG_RAUHT_OP_WRITE_DELETE_ALL = 4,
|
||||||
|
/* Delete all host entries on a RIF. In this command, dip
|
||||||
|
* field is reserved.
|
||||||
|
*/
|
||||||
|
};
|
||||||
|
|
||||||
|
/* reg_rauht_op
|
||||||
|
* Access: OP
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauht, op, 0x00, 20, 3);
|
||||||
|
|
||||||
|
/* reg_rauht_a
|
||||||
|
* Activity. Set for new entries. Set if a packet lookup has hit on
|
||||||
|
* the specific entry.
|
||||||
|
* To clear the a bit, use "clear activity" op.
|
||||||
|
* Enabled by activity_dis in RGCR
|
||||||
|
* Access: RO
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauht, a, 0x00, 16, 1);
|
||||||
|
|
||||||
|
/* reg_rauht_rif
|
||||||
|
* Router Interface
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauht, rif, 0x00, 0, 16);
|
||||||
|
|
||||||
|
/* reg_rauht_dip*
|
||||||
|
* Destination address.
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauht, dip4, 0x1C, 0x0, 32);
|
||||||
|
|
||||||
|
enum mlxsw_reg_rauht_trap_action {
|
||||||
|
MLXSW_REG_RAUHT_TRAP_ACTION_NOP,
|
||||||
|
MLXSW_REG_RAUHT_TRAP_ACTION_TRAP,
|
||||||
|
MLXSW_REG_RAUHT_TRAP_ACTION_MIRROR_TO_CPU,
|
||||||
|
MLXSW_REG_RAUHT_TRAP_ACTION_MIRROR,
|
||||||
|
MLXSW_REG_RAUHT_TRAP_ACTION_DISCARD_ERRORS,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* reg_rauht_trap_action
|
||||||
|
* Access: RW
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauht, trap_action, 0x60, 28, 4);
|
||||||
|
|
||||||
|
enum mlxsw_reg_rauht_trap_id {
|
||||||
|
MLXSW_REG_RAUHT_TRAP_ID_RTR_EGRESS0,
|
||||||
|
MLXSW_REG_RAUHT_TRAP_ID_RTR_EGRESS1,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* reg_rauht_trap_id
|
||||||
|
* Trap ID to be reported to CPU.
|
||||||
|
* Trap-ID is RTR_EGRESS0 or RTR_EGRESS1.
|
||||||
|
* For trap_action of NOP, MIRROR and DISCARD_ERROR,
|
||||||
|
* trap_id is reserved.
|
||||||
|
* Access: RW
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauht, trap_id, 0x60, 0, 9);
|
||||||
|
|
||||||
|
/* reg_rauht_counter_set_type
|
||||||
|
* Counter set type for flow counters
|
||||||
|
* Access: RW
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauht, counter_set_type, 0x68, 24, 8);
|
||||||
|
|
||||||
|
/* reg_rauht_counter_index
|
||||||
|
* Counter index for flow counters
|
||||||
|
* Access: RW
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauht, counter_index, 0x68, 0, 24);
|
||||||
|
|
||||||
|
/* reg_rauht_mac
|
||||||
|
* MAC address.
|
||||||
|
* Access: RW
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM_BUF(reg, rauht, mac, 0x6E, 6);
|
||||||
|
|
||||||
|
static inline void mlxsw_reg_rauht_pack(char *payload,
|
||||||
|
enum mlxsw_reg_rauht_op op, u16 rif,
|
||||||
|
const char *mac)
|
||||||
|
{
|
||||||
|
MLXSW_REG_ZERO(rauht, payload);
|
||||||
|
mlxsw_reg_rauht_op_set(payload, op);
|
||||||
|
mlxsw_reg_rauht_rif_set(payload, rif);
|
||||||
|
mlxsw_reg_rauht_mac_memcpy_to(payload, mac);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void mlxsw_reg_rauht_pack4(char *payload,
|
||||||
|
enum mlxsw_reg_rauht_op op, u16 rif,
|
||||||
|
const char *mac, u32 dip)
|
||||||
|
{
|
||||||
|
mlxsw_reg_rauht_pack(payload, op, rif, mac);
|
||||||
|
mlxsw_reg_rauht_dip4_set(payload, dip);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* RALEU - Router Algorithmic LPM ECMP Update Register
|
||||||
|
* ---------------------------------------------------
|
||||||
|
* The register enables updating the ECMP section in the action for multiple
|
||||||
|
* LPM Unicast entries in a single operation. The update is executed to
|
||||||
|
* all entries of a {virtual router, protocol} tuple using the same ECMP group.
|
||||||
|
*/
|
||||||
|
#define MLXSW_REG_RALEU_ID 0x8015
|
||||||
|
#define MLXSW_REG_RALEU_LEN 0x28
|
||||||
|
|
||||||
|
static const struct mlxsw_reg_info mlxsw_reg_raleu = {
|
||||||
|
.id = MLXSW_REG_RALEU_ID,
|
||||||
|
.len = MLXSW_REG_RALEU_LEN,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* reg_raleu_protocol
|
||||||
|
* Protocol.
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, raleu, protocol, 0x00, 24, 4);
|
||||||
|
|
||||||
|
/* reg_raleu_virtual_router
|
||||||
|
* Virtual Router ID
|
||||||
|
* Range is 0..cap_max_virtual_routers-1
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, raleu, virtual_router, 0x00, 0, 16);
|
||||||
|
|
||||||
|
/* reg_raleu_adjacency_index
|
||||||
|
* Adjacency Index used for matching on the existing entries.
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, raleu, adjacency_index, 0x10, 0, 24);
|
||||||
|
|
||||||
|
/* reg_raleu_ecmp_size
|
||||||
|
* ECMP Size used for matching on the existing entries.
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, raleu, ecmp_size, 0x14, 0, 13);
|
||||||
|
|
||||||
|
/* reg_raleu_new_adjacency_index
|
||||||
|
* New Adjacency Index.
|
||||||
|
* Access: WO
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, raleu, new_adjacency_index, 0x20, 0, 24);
|
||||||
|
|
||||||
|
/* reg_raleu_new_ecmp_size
|
||||||
|
* New ECMP Size.
|
||||||
|
* Access: WO
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, raleu, new_ecmp_size, 0x24, 0, 13);
|
||||||
|
|
||||||
|
static inline void mlxsw_reg_raleu_pack(char *payload,
|
||||||
|
enum mlxsw_reg_ralxx_protocol protocol,
|
||||||
|
u16 virtual_router,
|
||||||
|
u32 adjacency_index, u16 ecmp_size,
|
||||||
|
u32 new_adjacency_index,
|
||||||
|
u16 new_ecmp_size)
|
||||||
|
{
|
||||||
|
MLXSW_REG_ZERO(raleu, payload);
|
||||||
|
mlxsw_reg_raleu_protocol_set(payload, protocol);
|
||||||
|
mlxsw_reg_raleu_virtual_router_set(payload, virtual_router);
|
||||||
|
mlxsw_reg_raleu_adjacency_index_set(payload, adjacency_index);
|
||||||
|
mlxsw_reg_raleu_ecmp_size_set(payload, ecmp_size);
|
||||||
|
mlxsw_reg_raleu_new_adjacency_index_set(payload, new_adjacency_index);
|
||||||
|
mlxsw_reg_raleu_new_ecmp_size_set(payload, new_ecmp_size);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* RAUHTD - Router Algorithmic LPM Unicast Host Table Dump Register
|
||||||
|
* ----------------------------------------------------------------
|
||||||
|
* The RAUHTD register allows dumping entries from the Router Unicast Host
|
||||||
|
* Table. For a given session an entry is dumped no more than one time. The
|
||||||
|
* first RAUHTD access after reset is a new session. A session ends when the
|
||||||
|
* num_rec response is smaller than num_rec request or for IPv4 when the
|
||||||
|
* num_entries is smaller than 4. The clear activity affect the current session
|
||||||
|
* or the last session if a new session has not started.
|
||||||
|
*/
|
||||||
|
#define MLXSW_REG_RAUHTD_ID 0x8018
|
||||||
|
#define MLXSW_REG_RAUHTD_BASE_LEN 0x20
|
||||||
|
#define MLXSW_REG_RAUHTD_REC_LEN 0x20
|
||||||
|
#define MLXSW_REG_RAUHTD_REC_MAX_NUM 32
|
||||||
|
#define MLXSW_REG_RAUHTD_LEN (MLXSW_REG_RAUHTD_BASE_LEN + \
|
||||||
|
MLXSW_REG_RAUHTD_REC_MAX_NUM * MLXSW_REG_RAUHTD_REC_LEN)
|
||||||
|
#define MLXSW_REG_RAUHTD_IPV4_ENT_PER_REC 4
|
||||||
|
|
||||||
|
static const struct mlxsw_reg_info mlxsw_reg_rauhtd = {
|
||||||
|
.id = MLXSW_REG_RAUHTD_ID,
|
||||||
|
.len = MLXSW_REG_RAUHTD_LEN,
|
||||||
|
};
|
||||||
|
|
||||||
|
#define MLXSW_REG_RAUHTD_FILTER_A BIT(0)
|
||||||
|
#define MLXSW_REG_RAUHTD_FILTER_RIF BIT(3)
|
||||||
|
|
||||||
|
/* reg_rauhtd_filter_fields
|
||||||
|
* if a bit is '0' then the relevant field is ignored and dump is done
|
||||||
|
* regardless of the field value
|
||||||
|
* Bit0 - filter by activity: entry_a
|
||||||
|
* Bit3 - filter by entry rip: entry_rif
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauhtd, filter_fields, 0x00, 0, 8);
|
||||||
|
|
||||||
|
enum mlxsw_reg_rauhtd_op {
|
||||||
|
MLXSW_REG_RAUHTD_OP_DUMP,
|
||||||
|
MLXSW_REG_RAUHTD_OP_DUMP_AND_CLEAR,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* reg_rauhtd_op
|
||||||
|
* Access: OP
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauhtd, op, 0x04, 24, 2);
|
||||||
|
|
||||||
|
/* reg_rauhtd_num_rec
|
||||||
|
* At request: number of records requested
|
||||||
|
* At response: number of records dumped
|
||||||
|
* For IPv4, each record has 4 entries at request and up to 4 entries
|
||||||
|
* at response
|
||||||
|
* Range is 0..MLXSW_REG_RAUHTD_REC_MAX_NUM
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauhtd, num_rec, 0x04, 0, 8);
|
||||||
|
|
||||||
|
/* reg_rauhtd_entry_a
|
||||||
|
* Dump only if activity has value of entry_a
|
||||||
|
* Reserved if filter_fields bit0 is '0'
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauhtd, entry_a, 0x08, 16, 1);
|
||||||
|
|
||||||
|
enum mlxsw_reg_rauhtd_type {
|
||||||
|
MLXSW_REG_RAUHTD_TYPE_IPV4,
|
||||||
|
MLXSW_REG_RAUHTD_TYPE_IPV6,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* reg_rauhtd_type
|
||||||
|
* Dump only if record type is:
|
||||||
|
* 0 - IPv4
|
||||||
|
* 1 - IPv6
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauhtd, type, 0x08, 0, 4);
|
||||||
|
|
||||||
|
/* reg_rauhtd_entry_rif
|
||||||
|
* Dump only if RIF has value of entry_rif
|
||||||
|
* Reserved if filter_fields bit3 is '0'
|
||||||
|
* Access: Index
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32(reg, rauhtd, entry_rif, 0x0C, 0, 16);
|
||||||
|
|
||||||
|
static inline void mlxsw_reg_rauhtd_pack(char *payload,
|
||||||
|
enum mlxsw_reg_rauhtd_type type)
|
||||||
|
{
|
||||||
|
MLXSW_REG_ZERO(rauhtd, payload);
|
||||||
|
mlxsw_reg_rauhtd_filter_fields_set(payload, MLXSW_REG_RAUHTD_FILTER_A);
|
||||||
|
mlxsw_reg_rauhtd_op_set(payload, MLXSW_REG_RAUHTD_OP_DUMP_AND_CLEAR);
|
||||||
|
mlxsw_reg_rauhtd_num_rec_set(payload, MLXSW_REG_RAUHTD_REC_MAX_NUM);
|
||||||
|
mlxsw_reg_rauhtd_entry_a_set(payload, 1);
|
||||||
|
mlxsw_reg_rauhtd_type_set(payload, type);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* reg_rauhtd_ipv4_rec_num_entries
|
||||||
|
* Number of valid entries in this record:
|
||||||
|
* 0 - 1 valid entry
|
||||||
|
* 1 - 2 valid entries
|
||||||
|
* 2 - 3 valid entries
|
||||||
|
* 3 - 4 valid entries
|
||||||
|
* Access: RO
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_rec_num_entries,
|
||||||
|
MLXSW_REG_RAUHTD_BASE_LEN, 28, 2,
|
||||||
|
MLXSW_REG_RAUHTD_REC_LEN, 0x00, false);
|
||||||
|
|
||||||
|
/* reg_rauhtd_rec_type
|
||||||
|
* Record type.
|
||||||
|
* 0 - IPv4
|
||||||
|
* 1 - IPv6
|
||||||
|
* Access: RO
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32_INDEXED(reg, rauhtd, rec_type, MLXSW_REG_RAUHTD_BASE_LEN, 24, 2,
|
||||||
|
MLXSW_REG_RAUHTD_REC_LEN, 0x00, false);
|
||||||
|
|
||||||
|
#define MLXSW_REG_RAUHTD_IPV4_ENT_LEN 0x8
|
||||||
|
|
||||||
|
/* reg_rauhtd_ipv4_ent_a
|
||||||
|
* Activity. Set for new entries. Set if a packet lookup has hit on the
|
||||||
|
* specific entry.
|
||||||
|
* Access: RO
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_a, MLXSW_REG_RAUHTD_BASE_LEN, 16, 1,
|
||||||
|
MLXSW_REG_RAUHTD_IPV4_ENT_LEN, 0x00, false);
|
||||||
|
|
||||||
|
/* reg_rauhtd_ipv4_ent_rif
|
||||||
|
* Router interface.
|
||||||
|
* Access: RO
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_rif, MLXSW_REG_RAUHTD_BASE_LEN, 0,
|
||||||
|
16, MLXSW_REG_RAUHTD_IPV4_ENT_LEN, 0x00, false);
|
||||||
|
|
||||||
|
/* reg_rauhtd_ipv4_ent_dip
|
||||||
|
* Destination IPv4 address.
|
||||||
|
* Access: RO
|
||||||
|
*/
|
||||||
|
MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_dip, MLXSW_REG_RAUHTD_BASE_LEN, 0,
|
||||||
|
32, MLXSW_REG_RAUHTD_IPV4_ENT_LEN, 0x04, false);
|
||||||
|
|
||||||
|
static inline void mlxsw_reg_rauhtd_ent_ipv4_unpack(char *payload,
|
||||||
|
int ent_index, u16 *p_rif,
|
||||||
|
u32 *p_dip)
|
||||||
|
{
|
||||||
|
*p_rif = mlxsw_reg_rauhtd_ipv4_ent_rif_get(payload, ent_index);
|
||||||
|
*p_dip = mlxsw_reg_rauhtd_ipv4_ent_dip_get(payload, ent_index);
|
||||||
|
}
|
||||||
|
|
||||||
/* MFCR - Management Fan Control Register
|
/* MFCR - Management Fan Control Register
|
||||||
* --------------------------------------
|
* --------------------------------------
|
||||||
* This register controls the settings of the Fan Speed PWM mechanism.
|
* This register controls the settings of the Fan Speed PWM mechanism.
|
||||||
|
@ -4626,6 +5108,8 @@ static inline const char *mlxsw_reg_id_str(u16 reg_id)
|
||||||
return "RGCR";
|
return "RGCR";
|
||||||
case MLXSW_REG_RITR_ID:
|
case MLXSW_REG_RITR_ID:
|
||||||
return "RITR";
|
return "RITR";
|
||||||
|
case MLXSW_REG_RATR_ID:
|
||||||
|
return "RATR";
|
||||||
case MLXSW_REG_RALTA_ID:
|
case MLXSW_REG_RALTA_ID:
|
||||||
return "RALTA";
|
return "RALTA";
|
||||||
case MLXSW_REG_RALST_ID:
|
case MLXSW_REG_RALST_ID:
|
||||||
|
@ -4634,6 +5118,12 @@ static inline const char *mlxsw_reg_id_str(u16 reg_id)
|
||||||
return "RALTB";
|
return "RALTB";
|
||||||
case MLXSW_REG_RALUE_ID:
|
case MLXSW_REG_RALUE_ID:
|
||||||
return "RALUE";
|
return "RALUE";
|
||||||
|
case MLXSW_REG_RAUHT_ID:
|
||||||
|
return "RAUHT";
|
||||||
|
case MLXSW_REG_RALEU_ID:
|
||||||
|
return "RALEU";
|
||||||
|
case MLXSW_REG_RAUHTD_ID:
|
||||||
|
return "RAUHTD";
|
||||||
case MLXSW_REG_MFCR_ID:
|
case MLXSW_REG_MFCR_ID:
|
||||||
return "MFCR";
|
return "MFCR";
|
||||||
case MLXSW_REG_MFSC_ID:
|
case MLXSW_REG_MFSC_ID:
|
||||||
|
|
|
@ -803,6 +803,8 @@ static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
|
||||||
.ndo_get_stats64 = mlxsw_sp_port_get_stats64,
|
.ndo_get_stats64 = mlxsw_sp_port_get_stats64,
|
||||||
.ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
|
.ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
|
||||||
.ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
|
.ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
|
||||||
|
.ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
|
||||||
|
.ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
|
||||||
.ndo_fdb_add = switchdev_port_fdb_add,
|
.ndo_fdb_add = switchdev_port_fdb_add,
|
||||||
.ndo_fdb_del = switchdev_port_fdb_del,
|
.ndo_fdb_del = switchdev_port_fdb_del,
|
||||||
.ndo_fdb_dump = switchdev_port_fdb_dump,
|
.ndo_fdb_dump = switchdev_port_fdb_dump,
|
||||||
|
@ -2354,6 +2356,10 @@ static struct mlxsw_config_profile mlxsw_sp_config_profile = {
|
||||||
.max_ib_mc = 0,
|
.max_ib_mc = 0,
|
||||||
.used_max_pkey = 1,
|
.used_max_pkey = 1,
|
||||||
.max_pkey = 0,
|
.max_pkey = 0,
|
||||||
|
.used_kvd_sizes = 1,
|
||||||
|
.kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
|
||||||
|
.kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
|
||||||
|
.kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
|
||||||
.swid_config = {
|
.swid_config = {
|
||||||
{
|
{
|
||||||
.used_type = 1,
|
.used_type = 1,
|
||||||
|
|
|
@ -39,6 +39,7 @@
|
||||||
|
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
|
#include <linux/rhashtable.h>
|
||||||
#include <linux/bitops.h>
|
#include <linux/bitops.h>
|
||||||
#include <linux/if_vlan.h>
|
#include <linux/if_vlan.h>
|
||||||
#include <linux/list.h>
|
#include <linux/list.h>
|
||||||
|
@ -75,6 +76,10 @@
|
||||||
#define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
|
#define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
|
||||||
#define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
|
#define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
|
||||||
|
|
||||||
|
#define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
|
||||||
|
#define MLXSW_SP_KVD_HASH_SINGLE_SIZE 163840 /* entries */
|
||||||
|
#define MLXSW_SP_KVD_HASH_DOUBLE_SIZE 32768 /* entries */
|
||||||
|
|
||||||
/* Maximum delay buffer needed in case of PAUSE frames, in cells.
|
/* Maximum delay buffer needed in case of PAUSE frames, in cells.
|
||||||
* Assumes 100m cable and maximum MTU.
|
* Assumes 100m cable and maximum MTU.
|
||||||
*/
|
*/
|
||||||
|
@ -212,6 +217,15 @@ struct mlxsw_sp_vr {
|
||||||
struct mlxsw_sp_router {
|
struct mlxsw_sp_router {
|
||||||
struct mlxsw_sp_lpm_tree lpm_trees[MLXSW_SP_LPM_TREE_COUNT];
|
struct mlxsw_sp_lpm_tree lpm_trees[MLXSW_SP_LPM_TREE_COUNT];
|
||||||
struct mlxsw_sp_vr vrs[MLXSW_SP_VIRTUAL_ROUTER_MAX];
|
struct mlxsw_sp_vr vrs[MLXSW_SP_VIRTUAL_ROUTER_MAX];
|
||||||
|
struct rhashtable neigh_ht;
|
||||||
|
struct {
|
||||||
|
struct delayed_work dw;
|
||||||
|
unsigned long interval; /* ms */
|
||||||
|
} neighs_update;
|
||||||
|
struct delayed_work nexthop_probe_dw;
|
||||||
|
#define MLXSW_SP_UNRESOLVED_NH_PROBE_INTERVAL 5000 /* ms */
|
||||||
|
struct list_head nexthop_group_list;
|
||||||
|
struct list_head nexthop_neighs_list;
|
||||||
};
|
};
|
||||||
|
|
||||||
struct mlxsw_sp {
|
struct mlxsw_sp {
|
||||||
|
@ -243,6 +257,9 @@ struct mlxsw_sp {
|
||||||
u8 port_to_module[MLXSW_PORT_MAX_PORTS];
|
u8 port_to_module[MLXSW_PORT_MAX_PORTS];
|
||||||
struct mlxsw_sp_sb sb;
|
struct mlxsw_sp_sb sb;
|
||||||
struct mlxsw_sp_router router;
|
struct mlxsw_sp_router router;
|
||||||
|
struct {
|
||||||
|
DECLARE_BITMAP(usage, MLXSW_SP_KVD_LINEAR_SIZE);
|
||||||
|
} kvdl;
|
||||||
};
|
};
|
||||||
|
|
||||||
static inline struct mlxsw_sp_upper *
|
static inline struct mlxsw_sp_upper *
|
||||||
|
@ -524,5 +541,12 @@ int mlxsw_sp_router_fib4_add(struct mlxsw_sp_port *mlxsw_sp_port,
|
||||||
struct switchdev_trans *trans);
|
struct switchdev_trans *trans);
|
||||||
int mlxsw_sp_router_fib4_del(struct mlxsw_sp_port *mlxsw_sp_port,
|
int mlxsw_sp_router_fib4_del(struct mlxsw_sp_port *mlxsw_sp_port,
|
||||||
const struct switchdev_obj_ipv4_fib *fib4);
|
const struct switchdev_obj_ipv4_fib *fib4);
|
||||||
|
int mlxsw_sp_router_neigh_construct(struct net_device *dev,
|
||||||
|
struct neighbour *n);
|
||||||
|
void mlxsw_sp_router_neigh_destroy(struct net_device *dev,
|
||||||
|
struct neighbour *n);
|
||||||
|
|
||||||
|
int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count);
|
||||||
|
void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
91
drivers/net/ethernet/mellanox/mlxsw/spectrum_kvdl.c
Normal file
91
drivers/net/ethernet/mellanox/mlxsw/spectrum_kvdl.c
Normal file
|
@ -0,0 +1,91 @@
|
||||||
|
/*
|
||||||
|
* drivers/net/ethernet/mellanox/mlxsw/spectrum_kvdl.c
|
||||||
|
* Copyright (c) 2016 Mellanox Technologies. All rights reserved.
|
||||||
|
* Copyright (c) 2016 Jiri Pirko <jiri@mellanox.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the names of the copyright holders nor the names of its
|
||||||
|
* contributors may be used to endorse or promote products derived from
|
||||||
|
* this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* Alternatively, this software may be distributed under the terms of the
|
||||||
|
* GNU General Public License ("GPL") version 2 as published by the Free
|
||||||
|
* Software Foundation.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||||
|
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||||
|
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||||
|
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||||
|
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||||
|
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
|
|
||||||
|
#include "spectrum.h"
|
||||||
|
|
||||||
|
#define MLXSW_SP_KVDL_SINGLE_BASE 0
|
||||||
|
#define MLXSW_SP_KVDL_SINGLE_SIZE 16384
|
||||||
|
#define MLXSW_SP_KVDL_CHUNKS_BASE \
|
||||||
|
(MLXSW_SP_KVDL_SINGLE_BASE + MLXSW_SP_KVDL_SINGLE_SIZE)
|
||||||
|
#define MLXSW_SP_KVDL_CHUNKS_SIZE \
|
||||||
|
(MLXSW_SP_KVD_LINEAR_SIZE - MLXSW_SP_KVDL_CHUNKS_BASE)
|
||||||
|
#define MLXSW_SP_CHUNK_MAX 32
|
||||||
|
|
||||||
|
int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count)
|
||||||
|
{
|
||||||
|
int entry_index;
|
||||||
|
int size;
|
||||||
|
int type_base;
|
||||||
|
int type_size;
|
||||||
|
int type_entries;
|
||||||
|
|
||||||
|
if (entry_count == 0 || entry_count > MLXSW_SP_CHUNK_MAX) {
|
||||||
|
return -EINVAL;
|
||||||
|
} else if (entry_count == 1) {
|
||||||
|
type_base = MLXSW_SP_KVDL_SINGLE_BASE;
|
||||||
|
type_size = MLXSW_SP_KVDL_SINGLE_SIZE;
|
||||||
|
type_entries = 1;
|
||||||
|
} else {
|
||||||
|
type_base = MLXSW_SP_KVDL_CHUNKS_BASE;
|
||||||
|
type_size = MLXSW_SP_KVDL_CHUNKS_SIZE;
|
||||||
|
type_entries = MLXSW_SP_CHUNK_MAX;
|
||||||
|
}
|
||||||
|
|
||||||
|
entry_index = type_base;
|
||||||
|
size = type_base + type_size;
|
||||||
|
for_each_clear_bit_from(entry_index, mlxsw_sp->kvdl.usage, size) {
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for (i = 0; i < type_entries; i++)
|
||||||
|
set_bit(entry_index + i, mlxsw_sp->kvdl.usage);
|
||||||
|
return entry_index;
|
||||||
|
}
|
||||||
|
return -ENOBUFS;
|
||||||
|
}
|
||||||
|
|
||||||
|
void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index)
|
||||||
|
{
|
||||||
|
int type_entries;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
if (entry_index < MLXSW_SP_KVDL_CHUNKS_BASE)
|
||||||
|
type_entries = 1;
|
||||||
|
else
|
||||||
|
type_entries = MLXSW_SP_CHUNK_MAX;
|
||||||
|
for (i = 0; i < type_entries; i++)
|
||||||
|
clear_bit(entry_index + i, mlxsw_sp->kvdl.usage);
|
||||||
|
}
|
File diff suppressed because it is too large
Load diff
|
@ -1996,7 +1996,8 @@ static int rocker_port_change_proto_down(struct net_device *dev,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void rocker_port_neigh_destroy(struct neighbour *n)
|
static void rocker_port_neigh_destroy(struct net_device *dev,
|
||||||
|
struct neighbour *n)
|
||||||
{
|
{
|
||||||
struct rocker_port *rocker_port = netdev_priv(n->dev);
|
struct rocker_port *rocker_port = netdev_priv(n->dev);
|
||||||
int err;
|
int err;
|
||||||
|
|
|
@ -2002,6 +2002,8 @@ static const struct net_device_ops team_netdev_ops = {
|
||||||
.ndo_add_slave = team_add_slave,
|
.ndo_add_slave = team_add_slave,
|
||||||
.ndo_del_slave = team_del_slave,
|
.ndo_del_slave = team_del_slave,
|
||||||
.ndo_fix_features = team_fix_features,
|
.ndo_fix_features = team_fix_features,
|
||||||
|
.ndo_neigh_construct = netdev_default_l2upper_neigh_construct,
|
||||||
|
.ndo_neigh_destroy = netdev_default_l2upper_neigh_destroy,
|
||||||
.ndo_change_carrier = team_change_carrier,
|
.ndo_change_carrier = team_change_carrier,
|
||||||
.ndo_bridge_setlink = switchdev_port_bridge_setlink,
|
.ndo_bridge_setlink = switchdev_port_bridge_setlink,
|
||||||
.ndo_bridge_getlink = switchdev_port_bridge_getlink,
|
.ndo_bridge_getlink = switchdev_port_bridge_getlink,
|
||||||
|
|
|
@ -1209,8 +1209,10 @@ struct net_device_ops {
|
||||||
netdev_features_t features);
|
netdev_features_t features);
|
||||||
int (*ndo_set_features)(struct net_device *dev,
|
int (*ndo_set_features)(struct net_device *dev,
|
||||||
netdev_features_t features);
|
netdev_features_t features);
|
||||||
int (*ndo_neigh_construct)(struct neighbour *n);
|
int (*ndo_neigh_construct)(struct net_device *dev,
|
||||||
void (*ndo_neigh_destroy)(struct neighbour *n);
|
struct neighbour *n);
|
||||||
|
void (*ndo_neigh_destroy)(struct net_device *dev,
|
||||||
|
struct neighbour *n);
|
||||||
|
|
||||||
int (*ndo_fdb_add)(struct ndmsg *ndm,
|
int (*ndo_fdb_add)(struct ndmsg *ndm,
|
||||||
struct nlattr *tb[],
|
struct nlattr *tb[],
|
||||||
|
@ -3843,6 +3845,10 @@ void *netdev_lower_dev_get_private(struct net_device *dev,
|
||||||
struct net_device *lower_dev);
|
struct net_device *lower_dev);
|
||||||
void netdev_lower_state_changed(struct net_device *lower_dev,
|
void netdev_lower_state_changed(struct net_device *lower_dev,
|
||||||
void *lower_state_info);
|
void *lower_state_info);
|
||||||
|
int netdev_default_l2upper_neigh_construct(struct net_device *dev,
|
||||||
|
struct neighbour *n);
|
||||||
|
void netdev_default_l2upper_neigh_destroy(struct net_device *dev,
|
||||||
|
struct neighbour *n);
|
||||||
|
|
||||||
/* RSS keys are 40 or 52 bytes long */
|
/* RSS keys are 40 or 52 bytes long */
|
||||||
#define NETDEV_RSS_KEY_LEN 52
|
#define NETDEV_RSS_KEY_LEN 52
|
||||||
|
|
|
@ -24,6 +24,7 @@ struct netevent_redirect {
|
||||||
enum netevent_notif_type {
|
enum netevent_notif_type {
|
||||||
NETEVENT_NEIGH_UPDATE = 1, /* arg is struct neighbour ptr */
|
NETEVENT_NEIGH_UPDATE = 1, /* arg is struct neighbour ptr */
|
||||||
NETEVENT_REDIRECT, /* arg is struct netevent_redirect ptr */
|
NETEVENT_REDIRECT, /* arg is struct netevent_redirect ptr */
|
||||||
|
NETEVENT_DELAY_PROBE_TIME_UPDATE, /* arg is struct neigh_parms ptr */
|
||||||
};
|
};
|
||||||
|
|
||||||
int register_netevent_notifier(struct notifier_block *nb);
|
int register_netevent_notifier(struct notifier_block *nb);
|
||||||
|
|
|
@ -790,6 +790,8 @@ static const struct net_device_ops vlan_netdev_ops = {
|
||||||
.ndo_netpoll_cleanup = vlan_dev_netpoll_cleanup,
|
.ndo_netpoll_cleanup = vlan_dev_netpoll_cleanup,
|
||||||
#endif
|
#endif
|
||||||
.ndo_fix_features = vlan_dev_fix_features,
|
.ndo_fix_features = vlan_dev_fix_features,
|
||||||
|
.ndo_neigh_construct = netdev_default_l2upper_neigh_construct,
|
||||||
|
.ndo_neigh_destroy = netdev_default_l2upper_neigh_destroy,
|
||||||
.ndo_fdb_add = switchdev_port_fdb_add,
|
.ndo_fdb_add = switchdev_port_fdb_add,
|
||||||
.ndo_fdb_del = switchdev_port_fdb_del,
|
.ndo_fdb_del = switchdev_port_fdb_del,
|
||||||
.ndo_fdb_dump = switchdev_port_fdb_dump,
|
.ndo_fdb_dump = switchdev_port_fdb_dump,
|
||||||
|
|
|
@ -286,7 +286,7 @@ static const struct neigh_ops clip_neigh_ops = {
|
||||||
.connected_output = neigh_direct_output,
|
.connected_output = neigh_direct_output,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int clip_constructor(struct neighbour *neigh)
|
static int clip_constructor(struct net_device *dev, struct neighbour *neigh)
|
||||||
{
|
{
|
||||||
struct atmarp_entry *entry = neighbour_priv(neigh);
|
struct atmarp_entry *entry = neighbour_priv(neigh);
|
||||||
|
|
||||||
|
|
|
@ -349,6 +349,8 @@ static const struct net_device_ops br_netdev_ops = {
|
||||||
.ndo_add_slave = br_add_slave,
|
.ndo_add_slave = br_add_slave,
|
||||||
.ndo_del_slave = br_del_slave,
|
.ndo_del_slave = br_del_slave,
|
||||||
.ndo_fix_features = br_fix_features,
|
.ndo_fix_features = br_fix_features,
|
||||||
|
.ndo_neigh_construct = netdev_default_l2upper_neigh_construct,
|
||||||
|
.ndo_neigh_destroy = netdev_default_l2upper_neigh_destroy,
|
||||||
.ndo_fdb_add = br_fdb_add,
|
.ndo_fdb_add = br_fdb_add,
|
||||||
.ndo_fdb_del = br_fdb_delete,
|
.ndo_fdb_del = br_fdb_delete,
|
||||||
.ndo_fdb_dump = br_fdb_dump,
|
.ndo_fdb_dump = br_fdb_dump,
|
||||||
|
|
|
@ -6087,6 +6087,50 @@ void netdev_lower_state_changed(struct net_device *lower_dev,
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(netdev_lower_state_changed);
|
EXPORT_SYMBOL(netdev_lower_state_changed);
|
||||||
|
|
||||||
|
int netdev_default_l2upper_neigh_construct(struct net_device *dev,
|
||||||
|
struct neighbour *n)
|
||||||
|
{
|
||||||
|
struct net_device *lower_dev, *stop_dev;
|
||||||
|
struct list_head *iter;
|
||||||
|
int err;
|
||||||
|
|
||||||
|
netdev_for_each_lower_dev(dev, lower_dev, iter) {
|
||||||
|
if (!lower_dev->netdev_ops->ndo_neigh_construct)
|
||||||
|
continue;
|
||||||
|
err = lower_dev->netdev_ops->ndo_neigh_construct(lower_dev, n);
|
||||||
|
if (err) {
|
||||||
|
stop_dev = lower_dev;
|
||||||
|
goto rollback;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
rollback:
|
||||||
|
netdev_for_each_lower_dev(dev, lower_dev, iter) {
|
||||||
|
if (lower_dev == stop_dev)
|
||||||
|
break;
|
||||||
|
if (!lower_dev->netdev_ops->ndo_neigh_destroy)
|
||||||
|
continue;
|
||||||
|
lower_dev->netdev_ops->ndo_neigh_destroy(lower_dev, n);
|
||||||
|
}
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL_GPL(netdev_default_l2upper_neigh_construct);
|
||||||
|
|
||||||
|
void netdev_default_l2upper_neigh_destroy(struct net_device *dev,
|
||||||
|
struct neighbour *n)
|
||||||
|
{
|
||||||
|
struct net_device *lower_dev;
|
||||||
|
struct list_head *iter;
|
||||||
|
|
||||||
|
netdev_for_each_lower_dev(dev, lower_dev, iter) {
|
||||||
|
if (!lower_dev->netdev_ops->ndo_neigh_destroy)
|
||||||
|
continue;
|
||||||
|
lower_dev->netdev_ops->ndo_neigh_destroy(lower_dev, n);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL_GPL(netdev_default_l2upper_neigh_destroy);
|
||||||
|
|
||||||
static void dev_change_rx_flags(struct net_device *dev, int flags)
|
static void dev_change_rx_flags(struct net_device *dev, int flags)
|
||||||
{
|
{
|
||||||
const struct net_device_ops *ops = dev->netdev_ops;
|
const struct net_device_ops *ops = dev->netdev_ops;
|
||||||
|
|
|
@ -473,7 +473,7 @@ struct neighbour *__neigh_create(struct neigh_table *tbl, const void *pkey,
|
||||||
}
|
}
|
||||||
|
|
||||||
if (dev->netdev_ops->ndo_neigh_construct) {
|
if (dev->netdev_ops->ndo_neigh_construct) {
|
||||||
error = dev->netdev_ops->ndo_neigh_construct(n);
|
error = dev->netdev_ops->ndo_neigh_construct(dev, n);
|
||||||
if (error < 0) {
|
if (error < 0) {
|
||||||
rc = ERR_PTR(error);
|
rc = ERR_PTR(error);
|
||||||
goto out_neigh_release;
|
goto out_neigh_release;
|
||||||
|
@ -701,7 +701,7 @@ void neigh_destroy(struct neighbour *neigh)
|
||||||
neigh->arp_queue_len_bytes = 0;
|
neigh->arp_queue_len_bytes = 0;
|
||||||
|
|
||||||
if (dev->netdev_ops->ndo_neigh_destroy)
|
if (dev->netdev_ops->ndo_neigh_destroy)
|
||||||
dev->netdev_ops->ndo_neigh_destroy(neigh);
|
dev->netdev_ops->ndo_neigh_destroy(dev, neigh);
|
||||||
|
|
||||||
dev_put(dev);
|
dev_put(dev);
|
||||||
neigh_parms_put(neigh->parms);
|
neigh_parms_put(neigh->parms);
|
||||||
|
@ -2047,6 +2047,7 @@ static int neightbl_set(struct sk_buff *skb, struct nlmsghdr *nlh)
|
||||||
case NDTPA_DELAY_PROBE_TIME:
|
case NDTPA_DELAY_PROBE_TIME:
|
||||||
NEIGH_VAR_SET(p, DELAY_PROBE_TIME,
|
NEIGH_VAR_SET(p, DELAY_PROBE_TIME,
|
||||||
nla_get_msecs(tbp[i]));
|
nla_get_msecs(tbp[i]));
|
||||||
|
call_netevent_notifiers(NETEVENT_DELAY_PROBE_TIME_UPDATE, p);
|
||||||
break;
|
break;
|
||||||
case NDTPA_RETRANS_TIME:
|
case NDTPA_RETRANS_TIME:
|
||||||
NEIGH_VAR_SET(p, RETRANS_TIME,
|
NEIGH_VAR_SET(p, RETRANS_TIME,
|
||||||
|
@ -2930,6 +2931,7 @@ static void neigh_proc_update(struct ctl_table *ctl, int write)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
set_bit(index, p->data_state);
|
set_bit(index, p->data_state);
|
||||||
|
call_netevent_notifiers(NETEVENT_DELAY_PROBE_TIME_UPDATE, p);
|
||||||
if (!dev) /* NULL dev means this is default value */
|
if (!dev) /* NULL dev means this is default value */
|
||||||
neigh_copy_dflt_parms(net, p, index);
|
neigh_copy_dflt_parms(net, p, index);
|
||||||
}
|
}
|
||||||
|
|
|
@ -81,7 +81,7 @@ static int lowpan_stop(struct net_device *dev)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int lowpan_neigh_construct(struct neighbour *n)
|
static int lowpan_neigh_construct(struct net_device *dev, struct neighbour *n)
|
||||||
{
|
{
|
||||||
struct lowpan_802154_neigh *neigh = lowpan_802154_neigh(neighbour_priv(n));
|
struct lowpan_802154_neigh *neigh = lowpan_802154_neigh(neighbour_priv(n));
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue