ARM: soc: general cleanups
This is a large branch that contains a handful of different cleanups:
- Fixing up the I/O space remapping on PCI on ARM. This is a series
from Rob Herring that restructures how all pci devices allocate I/O
space, and it's part of the work to allow multiplatform kernels.
- A number of cleanup series for OMAP, moving and removing some
headers, sparse irq rework and in general preparation for
multiplatform.
- Final removal of all non-DT boards for Tegra, it is now
device-tree-only!
- Removal of a stale platform, nxp4008. It's an old mobile chipset
that is no longer in use, and was very likely never really used with
a mainline kernel. We have not been able to find anyone interested
in keeping it around in the kernel.
- Removal of the legacy dmaengine driver on tegra
+ A handful of other things that I haven't described above.
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Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc general cleanups from Olof Johansson:
"This is a large branch that contains a handful of different cleanups:
- Fixing up the I/O space remapping on PCI on ARM. This is a series
from Rob Herring that restructures how all pci devices allocate I/O
space, and it's part of the work to allow multiplatform kernels.
- A number of cleanup series for OMAP, moving and removing some
headers, sparse irq rework and in general preparation for
multiplatform.
- Final removal of all non-DT boards for Tegra, it is now
device-tree-only!
- Removal of a stale platform, nxp4008. It's an old mobile chipset
that is no longer in use, and was very likely never really used
with a mainline kernel. We have not been able to find anyone
interested in keeping it around in the kernel.
- Removal of the legacy dmaengine driver on tegra
+ A handful of other things that I haven't described above."
Fix up some conflicts with the staging tree (and because nxp4008 was
removed)
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (184 commits)
ARM: OMAP2+: serial: Change MAX_HSUART_PORTS to 6
ARM: OMAP4: twl-common: Support for additional devices on i2c1 bus
ARM: mmp: using for_each_set_bit to simplify the code
ARM: tegra: harmony: fix ldo7 regulator-name
ARM: OMAP2+: Make omap4-keypad.h local
ARM: OMAP2+: Make l4_3xxx.h local
ARM: OMAP2+: Make l4_2xxx.h local
ARM: OMAP2+: Make l3_3xxx.h local
ARM: OMAP2+: Make l3_2xxx.h local
ARM: OMAP1: Move irda.h from plat to mach
ARM: OMAP2+: Make hdq1w.h local
ARM: OMAP2+: Make gpmc-smsc911x.h local
ARM: OMAP2+: Make gpmc-smc91x.h local
ARM: OMAP1: Move flash.h from plat to mach
ARM: OMAP2+: Make debug-devices.h local
ARM: OMAP1: Move board-voiceblue.h from plat to mach
ARM: OMAP1: Move board-sx1.h from plat to mach
ARM: OMAP2+: Make omap-wakeupgen.h local
ARM: OMAP2+: Make omap-secure.h local
ARM: OMAP2+: Make ctrl_module_wkup_44xx.h local
...
This commit is contained in:
Linus Torvalds
commit
61464c8357
623 changed files with 4617 additions and 15489 deletions
62
include/linux/platform_data/asoc-ti-mcbsp.h
Normal file
62
include/linux/platform_data/asoc-ti-mcbsp.h
Normal file
|
|
@ -0,0 +1,62 @@
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|||
/*
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||||
* arch/arm/plat-omap/include/mach/mcbsp.h
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||||
*
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||||
* Defines for Multi-Channel Buffered Serial Port
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||||
*
|
||||
* Copyright (C) 2002 RidgeRun, Inc.
|
||||
* Author: Steve Johnson
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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||||
*/
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||||
#ifndef __ASM_ARCH_OMAP_MCBSP_H
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#define __ASM_ARCH_OMAP_MCBSP_H
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#include <linux/spinlock.h>
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#include <linux/clk.h>
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#define MCBSP_CONFIG_TYPE2 0x2
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#define MCBSP_CONFIG_TYPE3 0x3
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#define MCBSP_CONFIG_TYPE4 0x4
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/* Platform specific configuration */
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struct omap_mcbsp_ops {
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void (*request)(unsigned int);
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void (*free)(unsigned int);
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};
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struct omap_mcbsp_platform_data {
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struct omap_mcbsp_ops *ops;
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u16 buffer_size;
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u8 reg_size;
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u8 reg_step;
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/* McBSP platform and instance specific features */
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bool has_wakeup; /* Wakeup capability */
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bool has_ccr; /* Transceiver has configuration control registers */
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int (*enable_st_clock)(unsigned int, bool);
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int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src);
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int (*mux_signal)(struct device *dev, const char *signal, const char *src);
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};
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/**
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* omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod
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* @sidetone: name of the sidetone device
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*/
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struct omap_mcbsp_dev_attr {
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const char *sidetone;
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};
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#endif
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34
include/linux/platform_data/dsp-omap.h
Normal file
34
include/linux/platform_data/dsp-omap.h
Normal file
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|
@ -0,0 +1,34 @@
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#ifndef __OMAP_DSP_H__
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#define __OMAP_DSP_H__
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#include <linux/types.h>
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struct omap_dsp_platform_data {
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void (*dsp_set_min_opp) (u8 opp_id);
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u8 (*dsp_get_opp) (void);
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void (*cpu_set_freq) (unsigned long f);
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unsigned long (*cpu_get_freq) (void);
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unsigned long mpu_speed[6];
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/* functions to write and read PRCM registers */
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void (*dsp_prm_write)(u32, s16 , u16);
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u32 (*dsp_prm_read)(s16 , u16);
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u32 (*dsp_prm_rmw_bits)(u32, u32, s16, s16);
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void (*dsp_cm_write)(u32, s16 , u16);
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u32 (*dsp_cm_read)(s16 , u16);
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u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
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void (*set_bootaddr)(u32);
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void (*set_bootmode)(u8);
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phys_addr_t phys_mempool_base;
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phys_addr_t phys_mempool_size;
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};
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#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
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extern void omap_dsp_reserve_sdram_memblock(void);
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#else
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static inline void omap_dsp_reserve_sdram_memblock(void) { }
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#endif
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#endif
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217
include/linux/platform_data/gpio-omap.h
Normal file
217
include/linux/platform_data/gpio-omap.h
Normal file
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|
@ -0,0 +1,217 @@
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/*
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* OMAP GPIO handling defines and functions
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*
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* Copyright (C) 2003-2005 Nokia Corporation
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*
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* Written by Juha Yrjölä <juha.yrjola@nokia.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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||||
*
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*/
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#ifndef __ASM_ARCH_OMAP_GPIO_H
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#define __ASM_ARCH_OMAP_GPIO_H
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <mach/irqs.h>
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#define OMAP1_MPUIO_BASE 0xfffb5000
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/*
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* These are the omap15xx/16xx offsets. The omap7xx offset are
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* OMAP_MPUIO_ / 2 offsets below.
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*/
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#define OMAP_MPUIO_INPUT_LATCH 0x00
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#define OMAP_MPUIO_OUTPUT 0x04
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#define OMAP_MPUIO_IO_CNTL 0x08
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#define OMAP_MPUIO_KBR_LATCH 0x10
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#define OMAP_MPUIO_KBC 0x14
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#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
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#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
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#define OMAP_MPUIO_KBD_INT 0x20
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#define OMAP_MPUIO_GPIO_INT 0x24
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#define OMAP_MPUIO_KBD_MASKIT 0x28
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#define OMAP_MPUIO_GPIO_MASKIT 0x2c
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#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
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#define OMAP_MPUIO_LATCH 0x34
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#define OMAP34XX_NR_GPIOS 6
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/*
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* OMAP1510 GPIO registers
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*/
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#define OMAP1510_GPIO_DATA_INPUT 0x00
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#define OMAP1510_GPIO_DATA_OUTPUT 0x04
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#define OMAP1510_GPIO_DIR_CONTROL 0x08
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#define OMAP1510_GPIO_INT_CONTROL 0x0c
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#define OMAP1510_GPIO_INT_MASK 0x10
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#define OMAP1510_GPIO_INT_STATUS 0x14
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#define OMAP1510_GPIO_PIN_CONTROL 0x18
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#define OMAP1510_IH_GPIO_BASE 64
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/*
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* OMAP1610 specific GPIO registers
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*/
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#define OMAP1610_GPIO_REVISION 0x0000
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#define OMAP1610_GPIO_SYSCONFIG 0x0010
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#define OMAP1610_GPIO_SYSSTATUS 0x0014
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#define OMAP1610_GPIO_IRQSTATUS1 0x0018
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#define OMAP1610_GPIO_IRQENABLE1 0x001c
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#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
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#define OMAP1610_GPIO_DATAIN 0x002c
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#define OMAP1610_GPIO_DATAOUT 0x0030
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#define OMAP1610_GPIO_DIRECTION 0x0034
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#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
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#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
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#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
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#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
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#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
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#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
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#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
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#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
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/*
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* OMAP7XX specific GPIO registers
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*/
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#define OMAP7XX_GPIO_DATA_INPUT 0x00
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#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
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#define OMAP7XX_GPIO_DIR_CONTROL 0x08
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#define OMAP7XX_GPIO_INT_CONTROL 0x0c
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#define OMAP7XX_GPIO_INT_MASK 0x10
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#define OMAP7XX_GPIO_INT_STATUS 0x14
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/*
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* omap2+ specific GPIO registers
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*/
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#define OMAP24XX_GPIO_REVISION 0x0000
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#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
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#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
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#define OMAP24XX_GPIO_IRQENABLE2 0x002c
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#define OMAP24XX_GPIO_IRQENABLE1 0x001c
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#define OMAP24XX_GPIO_WAKE_EN 0x0020
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#define OMAP24XX_GPIO_CTRL 0x0030
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#define OMAP24XX_GPIO_OE 0x0034
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#define OMAP24XX_GPIO_DATAIN 0x0038
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#define OMAP24XX_GPIO_DATAOUT 0x003c
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#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
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#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
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#define OMAP24XX_GPIO_RISINGDETECT 0x0048
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#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
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#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
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#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
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#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
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#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
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#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
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#define OMAP24XX_GPIO_SETWKUENA 0x0084
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#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
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#define OMAP24XX_GPIO_SETDATAOUT 0x0094
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#define OMAP4_GPIO_REVISION 0x0000
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#define OMAP4_GPIO_EOI 0x0020
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#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
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#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
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#define OMAP4_GPIO_IRQSTATUS0 0x002c
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#define OMAP4_GPIO_IRQSTATUS1 0x0030
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#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
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#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
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#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
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#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
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#define OMAP4_GPIO_IRQWAKEN0 0x0044
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#define OMAP4_GPIO_IRQWAKEN1 0x0048
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#define OMAP4_GPIO_IRQENABLE1 0x011c
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#define OMAP4_GPIO_WAKE_EN 0x0120
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#define OMAP4_GPIO_IRQSTATUS2 0x0128
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#define OMAP4_GPIO_IRQENABLE2 0x012c
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#define OMAP4_GPIO_CTRL 0x0130
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#define OMAP4_GPIO_OE 0x0134
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#define OMAP4_GPIO_DATAIN 0x0138
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#define OMAP4_GPIO_DATAOUT 0x013c
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#define OMAP4_GPIO_LEVELDETECT0 0x0140
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#define OMAP4_GPIO_LEVELDETECT1 0x0144
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#define OMAP4_GPIO_RISINGDETECT 0x0148
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||||
#define OMAP4_GPIO_FALLINGDETECT 0x014c
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#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
|
||||
#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
|
||||
#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160
|
||||
#define OMAP4_GPIO_SETIRQENABLE1 0x0164
|
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#define OMAP4_GPIO_CLEARWKUENA 0x0180
|
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#define OMAP4_GPIO_SETWKUENA 0x0184
|
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#define OMAP4_GPIO_CLEARDATAOUT 0x0190
|
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#define OMAP4_GPIO_SETDATAOUT 0x0194
|
||||
|
||||
#define OMAP_MAX_GPIO_LINES 192
|
||||
|
||||
#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
|
||||
#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
|
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|
||||
struct omap_gpio_dev_attr {
|
||||
int bank_width; /* GPIO bank width */
|
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bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
|
||||
};
|
||||
|
||||
struct omap_gpio_reg_offs {
|
||||
u16 revision;
|
||||
u16 direction;
|
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u16 datain;
|
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u16 dataout;
|
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u16 set_dataout;
|
||||
u16 clr_dataout;
|
||||
u16 irqstatus;
|
||||
u16 irqstatus2;
|
||||
u16 irqstatus_raw0;
|
||||
u16 irqstatus_raw1;
|
||||
u16 irqenable;
|
||||
u16 irqenable2;
|
||||
u16 set_irqenable;
|
||||
u16 clr_irqenable;
|
||||
u16 debounce;
|
||||
u16 debounce_en;
|
||||
u16 ctrl;
|
||||
u16 wkup_en;
|
||||
u16 leveldetect0;
|
||||
u16 leveldetect1;
|
||||
u16 risingdetect;
|
||||
u16 fallingdetect;
|
||||
u16 irqctrl;
|
||||
u16 edgectrl1;
|
||||
u16 edgectrl2;
|
||||
u16 pinctrl;
|
||||
|
||||
bool irqenable_inv;
|
||||
};
|
||||
|
||||
struct omap_gpio_platform_data {
|
||||
int bank_type;
|
||||
int bank_width; /* GPIO bank width */
|
||||
int bank_stride; /* Only needed for omap1 MPUIO */
|
||||
bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
|
||||
bool loses_context; /* whether the bank would ever lose context */
|
||||
bool is_mpuio; /* whether the bank is of type MPUIO */
|
||||
u32 non_wakeup_gpios;
|
||||
|
||||
struct omap_gpio_reg_offs *regs;
|
||||
|
||||
/* Return context loss count due to PM states changing */
|
||||
int (*get_context_loss_count)(struct device *dev);
|
||||
};
|
||||
|
||||
extern void omap2_gpio_prepare_for_idle(int off_mode);
|
||||
extern void omap2_gpio_resume_after_idle(void);
|
||||
extern void omap_set_gpio_debounce(int gpio, int enable);
|
||||
extern void omap_set_gpio_debounce_time(int gpio, int enable);
|
||||
|
||||
#endif
|
||||
52
include/linux/platform_data/keypad-omap.h
Normal file
52
include/linux/platform_data/keypad-omap.h
Normal file
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* arch/arm/plat-omap/include/mach/keypad.h
|
||||
*
|
||||
* Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef ASMARM_ARCH_KEYPAD_H
|
||||
#define ASMARM_ARCH_KEYPAD_H
|
||||
|
||||
#ifndef CONFIG_ARCH_OMAP1
|
||||
#warning Please update the board to use matrix-keypad driver
|
||||
#define omap_readw(reg) 0
|
||||
#define omap_writew(val, reg) do {} while (0)
|
||||
#endif
|
||||
#include <linux/input/matrix_keypad.h>
|
||||
|
||||
struct omap_kp_platform_data {
|
||||
int rows;
|
||||
int cols;
|
||||
const struct matrix_keymap_data *keymap_data;
|
||||
bool rep;
|
||||
unsigned long delay;
|
||||
bool dbounce;
|
||||
/* specific to OMAP242x*/
|
||||
unsigned int *row_gpios;
|
||||
unsigned int *col_gpios;
|
||||
};
|
||||
|
||||
/* Group (0..3) -- when multiple keys are pressed, only the
|
||||
* keys pressed in the same group are considered as pressed. This is
|
||||
* in order to workaround certain crappy HW designs that produce ghost
|
||||
* keypresses. Two free bits, not used by neither row/col nor keynum,
|
||||
* must be available for use as group bits. The below GROUP_SHIFT
|
||||
* macro definition is based on some prior knowledge of the
|
||||
* matrix_keypad defined KEY() macro internals.
|
||||
*/
|
||||
#define GROUP_SHIFT 14
|
||||
#define GROUP_0 (0 << GROUP_SHIFT)
|
||||
#define GROUP_1 (1 << GROUP_SHIFT)
|
||||
#define GROUP_2 (2 << GROUP_SHIFT)
|
||||
#define GROUP_3 (3 << GROUP_SHIFT)
|
||||
#define GROUP_MASK GROUP_3
|
||||
#if KEY_MAX & GROUP_MASK
|
||||
#error Group bits in conflict with keynum bits
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
29
include/linux/platform_data/lcd-mipid.h
Normal file
29
include/linux/platform_data/lcd-mipid.h
Normal file
|
|
@ -0,0 +1,29 @@
|
|||
#ifndef __LCD_MIPID_H
|
||||
#define __LCD_MIPID_H
|
||||
|
||||
enum mipid_test_num {
|
||||
MIPID_TEST_RGB_LINES,
|
||||
};
|
||||
|
||||
enum mipid_test_result {
|
||||
MIPID_TEST_SUCCESS,
|
||||
MIPID_TEST_INVALID,
|
||||
MIPID_TEST_FAILED,
|
||||
};
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
struct mipid_platform_data {
|
||||
int nreset_gpio;
|
||||
int data_lines;
|
||||
|
||||
void (*shutdown)(struct mipid_platform_data *pdata);
|
||||
void (*set_bklight_level)(struct mipid_platform_data *pdata,
|
||||
int level);
|
||||
int (*get_bklight_level)(struct mipid_platform_data *pdata);
|
||||
int (*get_bklight_max)(struct mipid_platform_data *pdata);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
43
include/linux/platform_data/mtd-nand-omap2.h
Normal file
43
include/linux/platform_data/mtd-nand-omap2.h
Normal file
|
|
@ -0,0 +1,43 @@
|
|||
/*
|
||||
* arch/arm/plat-omap/include/mach/nand.h
|
||||
*
|
||||
* Copyright (C) 2006 Micron Technology Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <plat/gpmc.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
||||
enum nand_io {
|
||||
NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */
|
||||
NAND_OMAP_POLLED, /* polled mode, without prefetch */
|
||||
NAND_OMAP_PREFETCH_DMA, /* prefetch enabled sDMA mode */
|
||||
NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */
|
||||
};
|
||||
|
||||
struct omap_nand_platform_data {
|
||||
int cs;
|
||||
struct mtd_partition *parts;
|
||||
struct gpmc_timings *gpmc_t;
|
||||
int nr_parts;
|
||||
bool dev_ready;
|
||||
enum nand_io xfer_type;
|
||||
int devsize;
|
||||
enum omap_ecc ecc_opt;
|
||||
struct gpmc_nand_regs reg;
|
||||
};
|
||||
|
||||
/* minimum size for IO mapping */
|
||||
#define NAND_IO_SIZE 4
|
||||
|
||||
#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
|
||||
extern int gpmc_nand_init(struct omap_nand_platform_data *d);
|
||||
#else
|
||||
static inline int gpmc_nand_init(struct omap_nand_platform_data *d)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
53
include/linux/platform_data/mtd-onenand-omap2.h
Normal file
53
include/linux/platform_data/mtd-onenand-omap2.h
Normal file
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* arch/arm/plat-omap/include/mach/onenand.h
|
||||
*
|
||||
* Copyright (C) 2006 Nokia Corporation
|
||||
* Author: Juha Yrjola
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
||||
#define ONENAND_SYNC_READ (1 << 0)
|
||||
#define ONENAND_SYNC_READWRITE (1 << 1)
|
||||
|
||||
struct onenand_freq_info {
|
||||
u16 maf_id;
|
||||
u16 dev_id;
|
||||
u16 ver_id;
|
||||
};
|
||||
|
||||
struct omap_onenand_platform_data {
|
||||
int cs;
|
||||
int gpio_irq;
|
||||
struct mtd_partition *parts;
|
||||
int nr_parts;
|
||||
int (*onenand_setup)(void __iomem *, int *freq_ptr);
|
||||
int (*get_freq)(const struct onenand_freq_info *freq_info,
|
||||
bool *clk_dep);
|
||||
int dma_channel;
|
||||
u8 flags;
|
||||
u8 regulator_can_sleep;
|
||||
u8 skip_initial_unlocking;
|
||||
};
|
||||
|
||||
#define ONENAND_MAX_PARTITIONS 8
|
||||
|
||||
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
|
||||
defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
|
||||
|
||||
extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
|
||||
|
||||
#else
|
||||
|
||||
#define board_onenand_data NULL
|
||||
|
||||
static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
11
include/linux/platform_data/omap1_bl.h
Normal file
11
include/linux/platform_data/omap1_bl.h
Normal file
|
|
@ -0,0 +1,11 @@
|
|||
#ifndef __OMAP1_BL_H__
|
||||
#define __OMAP1_BL_H__
|
||||
|
||||
#include <linux/device.h>
|
||||
|
||||
struct omap_backlight_config {
|
||||
int default_intensity;
|
||||
int (*set_power)(struct device *dev, int state);
|
||||
};
|
||||
|
||||
#endif
|
||||
26
include/linux/platform_data/pinctrl-coh901.h
Normal file
26
include/linux/platform_data/pinctrl-coh901.h
Normal file
|
|
@ -0,0 +1,26 @@
|
|||
/*
|
||||
* Copyright (C) 2007-2012 ST-Ericsson AB
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
* GPIO block resgister definitions and inline macros for
|
||||
* U300 GPIO COH 901 335 or COH 901 571/3
|
||||
* Author: Linus Walleij <linus.walleij@stericsson.com>
|
||||
*/
|
||||
|
||||
#ifndef __MACH_U300_GPIO_U300_H
|
||||
#define __MACH_U300_GPIO_U300_H
|
||||
|
||||
/**
|
||||
* struct u300_gpio_platform - U300 GPIO platform data
|
||||
* @ports: number of GPIO block ports
|
||||
* @gpio_base: first GPIO number for this block (use a free range)
|
||||
* @gpio_irq_base: first GPIO IRQ number for this block (use a free range)
|
||||
* @pinctrl_device: pin control device to spawn as child
|
||||
*/
|
||||
struct u300_gpio_platform {
|
||||
u8 ports;
|
||||
int gpio_base;
|
||||
int gpio_irq_base;
|
||||
struct platform_device *pinctrl_device;
|
||||
};
|
||||
|
||||
#endif /* __MACH_U300_GPIO_U300_H */
|
||||
57
include/linux/platform_data/remoteproc-omap.h
Normal file
57
include/linux/platform_data/remoteproc-omap.h
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* Remote Processor - omap-specific bits
|
||||
*
|
||||
* Copyright (C) 2011 Texas Instruments, Inc.
|
||||
* Copyright (C) 2011 Google, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef _PLAT_REMOTEPROC_H
|
||||
#define _PLAT_REMOTEPROC_H
|
||||
|
||||
struct rproc_ops;
|
||||
struct platform_device;
|
||||
|
||||
/*
|
||||
* struct omap_rproc_pdata - omap remoteproc's platform data
|
||||
* @name: the remoteproc's name
|
||||
* @oh_name: omap hwmod device
|
||||
* @oh_name_opt: optional, secondary omap hwmod device
|
||||
* @firmware: name of firmware file to load
|
||||
* @mbox_name: name of omap mailbox device to use with this rproc
|
||||
* @ops: start/stop rproc handlers
|
||||
* @device_enable: omap-specific handler for enabling a device
|
||||
* @device_shutdown: omap-specific handler for shutting down a device
|
||||
*/
|
||||
struct omap_rproc_pdata {
|
||||
const char *name;
|
||||
const char *oh_name;
|
||||
const char *oh_name_opt;
|
||||
const char *firmware;
|
||||
const char *mbox_name;
|
||||
const struct rproc_ops *ops;
|
||||
int (*device_enable) (struct platform_device *pdev);
|
||||
int (*device_shutdown) (struct platform_device *pdev);
|
||||
};
|
||||
|
||||
#if defined(CONFIG_OMAP_REMOTEPROC) || defined(CONFIG_OMAP_REMOTEPROC_MODULE)
|
||||
|
||||
void __init omap_rproc_reserve_cma(void);
|
||||
|
||||
#else
|
||||
|
||||
void __init omap_rproc_reserve_cma(void)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* _PLAT_REMOTEPROC_H */
|
||||
23
include/linux/platform_data/spi-omap2-mcspi.h
Normal file
23
include/linux/platform_data/spi-omap2-mcspi.h
Normal file
|
|
@ -0,0 +1,23 @@
|
|||
#ifndef _OMAP2_MCSPI_H
|
||||
#define _OMAP2_MCSPI_H
|
||||
|
||||
#define OMAP2_MCSPI_REV 0
|
||||
#define OMAP3_MCSPI_REV 1
|
||||
#define OMAP4_MCSPI_REV 2
|
||||
|
||||
#define OMAP4_MCSPI_REG_OFFSET 0x100
|
||||
|
||||
struct omap2_mcspi_platform_config {
|
||||
unsigned short num_cs;
|
||||
unsigned int regs_offset;
|
||||
};
|
||||
|
||||
struct omap2_mcspi_dev_attr {
|
||||
unsigned short num_chipselect;
|
||||
};
|
||||
|
||||
struct omap2_mcspi_device_config {
|
||||
unsigned turbo_mode:1;
|
||||
};
|
||||
|
||||
#endif
|
||||
39
include/linux/platform_data/voltage-omap.h
Normal file
39
include/linux/platform_data/voltage-omap.h
Normal file
|
|
@ -0,0 +1,39 @@
|
|||
/*
|
||||
* OMAP Voltage Management Routines
|
||||
*
|
||||
* Copyright (C) 2011, Texas Instruments, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_ARM_OMAP_VOLTAGE_H
|
||||
#define __ARCH_ARM_OMAP_VOLTAGE_H
|
||||
|
||||
/**
|
||||
* struct omap_volt_data - Omap voltage specific data.
|
||||
* @voltage_nominal: The possible voltage value in uV
|
||||
* @sr_efuse_offs: The offset of the efuse register(from system
|
||||
* control module base address) from where to read
|
||||
* the n-target value for the smartreflex module.
|
||||
* @sr_errminlimit: Error min limit value for smartreflex. This value
|
||||
* differs at differnet opp and thus is linked
|
||||
* with voltage.
|
||||
* @vp_errorgain: Error gain value for the voltage processor. This
|
||||
* field also differs according to the voltage/opp.
|
||||
*/
|
||||
struct omap_volt_data {
|
||||
u32 volt_nominal;
|
||||
u32 sr_efuse_offs;
|
||||
u8 sr_errminlimit;
|
||||
u8 vp_errgain;
|
||||
};
|
||||
struct voltagedomain;
|
||||
|
||||
struct voltagedomain *voltdm_lookup(const char *name);
|
||||
int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt);
|
||||
unsigned long voltdm_get_voltage(struct voltagedomain *voltdm);
|
||||
struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
|
||||
unsigned long volt);
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue