Merge branch 'upstream'
This commit is contained in:
commit
5615ca7906
607 changed files with 17876 additions and 9826 deletions
|
@ -28,19 +28,6 @@
|
|||
#define BUS_ID_SIZE KOBJ_NAME_LEN
|
||||
|
||||
|
||||
enum {
|
||||
SUSPEND_NOTIFY,
|
||||
SUSPEND_SAVE_STATE,
|
||||
SUSPEND_DISABLE,
|
||||
SUSPEND_POWER_DOWN,
|
||||
};
|
||||
|
||||
enum {
|
||||
RESUME_POWER_ON,
|
||||
RESUME_RESTORE_STATE,
|
||||
RESUME_ENABLE,
|
||||
};
|
||||
|
||||
struct device;
|
||||
struct device_driver;
|
||||
struct class;
|
||||
|
@ -115,8 +102,8 @@ struct device_driver {
|
|||
int (*probe) (struct device * dev);
|
||||
int (*remove) (struct device * dev);
|
||||
void (*shutdown) (struct device * dev);
|
||||
int (*suspend) (struct device * dev, pm_message_t state, u32 level);
|
||||
int (*resume) (struct device * dev, u32 level);
|
||||
int (*suspend) (struct device * dev, pm_message_t state);
|
||||
int (*resume) (struct device * dev);
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||||
};
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||||
|
||||
|
||||
|
@ -190,7 +177,43 @@ struct class_attribute class_attr_##_name = __ATTR(_name,_mode,_show,_store)
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|||
extern int class_create_file(struct class *, const struct class_attribute *);
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||||
extern void class_remove_file(struct class *, const struct class_attribute *);
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||||
|
||||
struct class_device_attribute {
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||||
struct attribute attr;
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||||
ssize_t (*show)(struct class_device *, char * buf);
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ssize_t (*store)(struct class_device *, const char * buf, size_t count);
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||||
};
|
||||
|
||||
#define CLASS_DEVICE_ATTR(_name,_mode,_show,_store) \
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struct class_device_attribute class_device_attr_##_name = \
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||||
__ATTR(_name,_mode,_show,_store)
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||||
|
||||
extern int class_device_create_file(struct class_device *,
|
||||
const struct class_device_attribute *);
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||||
|
||||
/**
|
||||
* struct class_device - class devices
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||||
* @class: pointer to the parent class for this class device. This is required.
|
||||
* @devt: for internal use by the driver core only.
|
||||
* @node: for internal use by the driver core only.
|
||||
* @kobj: for internal use by the driver core only.
|
||||
* @devt_attr: for internal use by the driver core only.
|
||||
* @dev: if set, a symlink to the struct device is created in the sysfs
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||||
* directory for this struct class device.
|
||||
* @class_data: pointer to whatever you want to store here for this struct
|
||||
* class_device. Use class_get_devdata() and class_set_devdata() to get and
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||||
* set this pointer.
|
||||
* @parent: pointer to a struct class_device that is the parent of this struct
|
||||
* class_device. If NULL, this class_device will show up at the root of the
|
||||
* struct class in sysfs (which is probably what you want to have happen.)
|
||||
* @release: pointer to a release function for this struct class_device. If
|
||||
* set, this will be called instead of the class specific release function.
|
||||
* Only use this if you want to override the default release function, like
|
||||
* when you are nesting class_device structures.
|
||||
* @hotplug: pointer to a hotplug function for this struct class_device. If
|
||||
* set, this will be called instead of the class specific hotplug function.
|
||||
* Only use this if you want to override the default hotplug function, like
|
||||
* when you are nesting class_device structures.
|
||||
*/
|
||||
struct class_device {
|
||||
struct list_head node;
|
||||
|
||||
|
@ -198,9 +221,14 @@ struct class_device {
|
|||
struct class * class; /* required */
|
||||
dev_t devt; /* dev_t, creates the sysfs "dev" */
|
||||
struct class_device_attribute *devt_attr;
|
||||
struct class_device_attribute uevent_attr;
|
||||
struct device * dev; /* not necessary, but nice to have */
|
||||
void * class_data; /* class-specific data */
|
||||
struct class_device *parent; /* parent of this child device, if there is one */
|
||||
|
||||
void (*release)(struct class_device *dev);
|
||||
int (*hotplug)(struct class_device *dev, char **envp,
|
||||
int num_envp, char *buffer, int buffer_size);
|
||||
char class_id[BUS_ID_SIZE]; /* unique to this class */
|
||||
};
|
||||
|
||||
|
@ -228,18 +256,6 @@ extern int class_device_rename(struct class_device *, char *);
|
|||
extern struct class_device * class_device_get(struct class_device *);
|
||||
extern void class_device_put(struct class_device *);
|
||||
|
||||
struct class_device_attribute {
|
||||
struct attribute attr;
|
||||
ssize_t (*show)(struct class_device *, char * buf);
|
||||
ssize_t (*store)(struct class_device *, const char * buf, size_t count);
|
||||
};
|
||||
|
||||
#define CLASS_DEVICE_ATTR(_name,_mode,_show,_store) \
|
||||
struct class_device_attribute class_device_attr_##_name = \
|
||||
__ATTR(_name,_mode,_show,_store)
|
||||
|
||||
extern int class_device_create_file(struct class_device *,
|
||||
const struct class_device_attribute *);
|
||||
extern void class_device_remove_file(struct class_device *,
|
||||
const struct class_device_attribute *);
|
||||
extern int class_device_create_bin_file(struct class_device *,
|
||||
|
@ -251,8 +267,8 @@ struct class_interface {
|
|||
struct list_head node;
|
||||
struct class *class;
|
||||
|
||||
int (*add) (struct class_device *);
|
||||
void (*remove) (struct class_device *);
|
||||
int (*add) (struct class_device *, struct class_interface *);
|
||||
void (*remove) (struct class_device *, struct class_interface *);
|
||||
};
|
||||
|
||||
extern int class_interface_register(struct class_interface *);
|
||||
|
@ -260,12 +276,29 @@ extern void class_interface_unregister(struct class_interface *);
|
|||
|
||||
extern struct class *class_create(struct module *owner, char *name);
|
||||
extern void class_destroy(struct class *cls);
|
||||
extern struct class_device *class_device_create(struct class *cls, dev_t devt,
|
||||
struct device *device, char *fmt, ...)
|
||||
__attribute__((format(printf,4,5)));
|
||||
extern struct class_device *class_device_create(struct class *cls,
|
||||
struct class_device *parent,
|
||||
dev_t devt,
|
||||
struct device *device,
|
||||
char *fmt, ...)
|
||||
__attribute__((format(printf,5,6)));
|
||||
extern void class_device_destroy(struct class *cls, dev_t devt);
|
||||
|
||||
|
||||
/* interface for exporting device attributes */
|
||||
struct device_attribute {
|
||||
struct attribute attr;
|
||||
ssize_t (*show)(struct device *dev, struct device_attribute *attr,
|
||||
char *buf);
|
||||
ssize_t (*store)(struct device *dev, struct device_attribute *attr,
|
||||
const char *buf, size_t count);
|
||||
};
|
||||
|
||||
#define DEVICE_ATTR(_name,_mode,_show,_store) \
|
||||
struct device_attribute dev_attr_##_name = __ATTR(_name,_mode,_show,_store)
|
||||
|
||||
extern int device_create_file(struct device *device, struct device_attribute * entry);
|
||||
extern void device_remove_file(struct device * dev, struct device_attribute * attr);
|
||||
struct device {
|
||||
struct klist klist_children;
|
||||
struct klist_node knode_parent; /* node in sibling list */
|
||||
|
@ -275,6 +308,7 @@ struct device {
|
|||
|
||||
struct kobject kobj;
|
||||
char bus_id[BUS_ID_SIZE]; /* position on parent bus */
|
||||
struct device_attribute uevent_attr;
|
||||
|
||||
struct semaphore sem; /* semaphore to synchronize calls to
|
||||
* its driver.
|
||||
|
@ -343,23 +377,6 @@ extern int device_attach(struct device * dev);
|
|||
extern void driver_attach(struct device_driver * drv);
|
||||
|
||||
|
||||
/* driverfs interface for exporting device attributes */
|
||||
|
||||
struct device_attribute {
|
||||
struct attribute attr;
|
||||
ssize_t (*show)(struct device *dev, struct device_attribute *attr,
|
||||
char *buf);
|
||||
ssize_t (*store)(struct device *dev, struct device_attribute *attr,
|
||||
const char *buf, size_t count);
|
||||
};
|
||||
|
||||
#define DEVICE_ATTR(_name,_mode,_show,_store) \
|
||||
struct device_attribute dev_attr_##_name = __ATTR(_name,_mode,_show,_store)
|
||||
|
||||
|
||||
extern int device_create_file(struct device *device, struct device_attribute * entry);
|
||||
extern void device_remove_file(struct device * dev, struct device_attribute * attr);
|
||||
|
||||
/*
|
||||
* Platform "fixup" functions - allow the platform to have their say
|
||||
* about devices and actions that the general device layer doesn't
|
||||
|
|
|
@ -269,6 +269,8 @@ u32 ethtool_op_get_tso(struct net_device *dev);
|
|||
int ethtool_op_set_tso(struct net_device *dev, u32 data);
|
||||
int ethtool_op_get_perm_addr(struct net_device *dev,
|
||||
struct ethtool_perm_addr *addr, u8 *data);
|
||||
u32 ethtool_op_get_ufo(struct net_device *dev);
|
||||
int ethtool_op_set_ufo(struct net_device *dev, u32 data);
|
||||
|
||||
/**
|
||||
* ðtool_ops - Alter and report network device settings
|
||||
|
@ -298,6 +300,8 @@ int ethtool_op_get_perm_addr(struct net_device *dev,
|
|||
* set_sg: Turn scatter-gather on or off
|
||||
* get_tso: Report whether TCP segmentation offload is enabled
|
||||
* set_tso: Turn TCP segmentation offload on or off
|
||||
* get_ufo: Report whether UDP fragmentation offload is enabled
|
||||
* set_ufo: Turn UDP fragmentation offload on or off
|
||||
* self_test: Run specified self-tests
|
||||
* get_strings: Return a set of strings that describe the requested objects
|
||||
* phys_id: Identify the device
|
||||
|
@ -364,6 +368,8 @@ struct ethtool_ops {
|
|||
int (*get_perm_addr)(struct net_device *, struct ethtool_perm_addr *, u8 *);
|
||||
int (*begin)(struct net_device *);
|
||||
void (*complete)(struct net_device *);
|
||||
u32 (*get_ufo)(struct net_device *);
|
||||
int (*set_ufo)(struct net_device *, u32);
|
||||
};
|
||||
|
||||
/* CMDs currently supported */
|
||||
|
@ -400,6 +406,8 @@ struct ethtool_ops {
|
|||
#define ETHTOOL_GTSO 0x0000001e /* Get TSO enable (ethtool_value) */
|
||||
#define ETHTOOL_STSO 0x0000001f /* Set TSO enable (ethtool_value) */
|
||||
#define ETHTOOL_GPERMADDR 0x00000020 /* Get permanent hardware address */
|
||||
#define ETHTOOL_GUFO 0x00000021 /* Get UFO enable (ethtool_value) */
|
||||
#define ETHTOOL_SUFO 0x00000022 /* Set UFO enable (ethtool_value) */
|
||||
|
||||
/* compatibility with older code */
|
||||
#define SPARC_ETH_GSET ETHTOOL_GSET
|
||||
|
|
|
@ -132,6 +132,7 @@ struct gendisk {
|
|||
struct disk_attribute {
|
||||
struct attribute attr;
|
||||
ssize_t (*show)(struct gendisk *, char *);
|
||||
ssize_t (*store)(struct gendisk *, const char *, size_t);
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
483
include/linux/hil.h
Normal file
483
include/linux/hil.h
Normal file
|
@ -0,0 +1,483 @@
|
|||
#ifndef _HIL_H_
|
||||
#define _HIL_H_
|
||||
|
||||
/*
|
||||
* Hewlett Packard Human Interface Loop (HP-HIL) Protocol -- header.
|
||||
*
|
||||
* Copyright (c) 2001 Brian S. Julin
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions, and the following disclaimer,
|
||||
* without modification.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* Alternatively, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL").
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
*
|
||||
* References:
|
||||
* HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
|
||||
*
|
||||
* A note of thanks to HP for providing and shipping reference materials
|
||||
* free of charge to help in the development of HIL support for Linux.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <asm/types.h>
|
||||
|
||||
/* Physical constants relevant to raw loop/device timing.
|
||||
*/
|
||||
|
||||
#define HIL_CLOCK 8MHZ
|
||||
#define HIL_EK1_CLOCK 30HZ
|
||||
#define HIL_EK2_CLOCK 60HZ
|
||||
|
||||
#define HIL_TIMEOUT_DEV 5 /* ms */
|
||||
#define HIL_TIMEOUT_DEVS 10 /* ms */
|
||||
#define HIL_TIMEOUT_NORESP 10 /* ms */
|
||||
#define HIL_TIMEOUT_DEVS_DATA 16 /* ms */
|
||||
#define HIL_TIMEOUT_SELFTEST 200 /* ms */
|
||||
|
||||
|
||||
/* Actual wire line coding. These will only be useful if someone is
|
||||
* implementing a software MLC to run HIL devices on a non-parisc machine.
|
||||
*/
|
||||
|
||||
#define HIL_WIRE_PACKET_LEN 15
|
||||
enum hil_wire_bitpos {
|
||||
HIL_WIRE_START = 0,
|
||||
HIL_WIRE_ADDR2,
|
||||
HIL_WIRE_ADDR1,
|
||||
HIL_WIRE_ADDR0,
|
||||
HIL_WIRE_COMMAND,
|
||||
HIL_WIRE_DATA7,
|
||||
HIL_WIRE_DATA6,
|
||||
HIL_WIRE_DATA5,
|
||||
HIL_WIRE_DATA4,
|
||||
HIL_WIRE_DATA3,
|
||||
HIL_WIRE_DATA2,
|
||||
HIL_WIRE_DATA1,
|
||||
HIL_WIRE_DATA0,
|
||||
HIL_WIRE_PARITY,
|
||||
HIL_WIRE_STOP
|
||||
};
|
||||
|
||||
/* HP documentation uses these bit positions to refer to commands;
|
||||
* we will call these "packets".
|
||||
*/
|
||||
enum hil_pkt_bitpos {
|
||||
HIL_PKT_CMD = 0x00000800,
|
||||
HIL_PKT_ADDR2 = 0x00000400,
|
||||
HIL_PKT_ADDR1 = 0x00000200,
|
||||
HIL_PKT_ADDR0 = 0x00000100,
|
||||
HIL_PKT_ADDR_MASK = 0x00000700,
|
||||
HIL_PKT_ADDR_SHIFT = 8,
|
||||
HIL_PKT_DATA7 = 0x00000080,
|
||||
HIL_PKT_DATA6 = 0x00000040,
|
||||
HIL_PKT_DATA5 = 0x00000020,
|
||||
HIL_PKT_DATA4 = 0x00000010,
|
||||
HIL_PKT_DATA3 = 0x00000008,
|
||||
HIL_PKT_DATA2 = 0x00000004,
|
||||
HIL_PKT_DATA1 = 0x00000002,
|
||||
HIL_PKT_DATA0 = 0x00000001,
|
||||
HIL_PKT_DATA_MASK = 0x000000FF,
|
||||
HIL_PKT_DATA_SHIFT = 0
|
||||
};
|
||||
|
||||
/* The HIL MLC also has several error/status/control bits. We extend the
|
||||
* "packet" to include these when direct access to the MLC is available,
|
||||
* or emulate them in cases where they are not available.
|
||||
*
|
||||
* This way the device driver knows that the underlying MLC driver
|
||||
* has had to deal with loop errors.
|
||||
*/
|
||||
enum hil_error_bitpos {
|
||||
HIL_ERR_OB = 0x00000800, /* MLC is busy sending an auto-poll,
|
||||
or we have filled up the output
|
||||
buffer and must wait. */
|
||||
HIL_ERR_INT = 0x00010000, /* A normal interrupt has occurred. */
|
||||
HIL_ERR_NMI = 0x00020000, /* An NMI has occurred. */
|
||||
HIL_ERR_LERR = 0x00040000, /* A poll didn't come back. */
|
||||
HIL_ERR_PERR = 0x01000000, /* There was a Parity Error. */
|
||||
HIL_ERR_FERR = 0x02000000, /* There was a Framing Error. */
|
||||
HIL_ERR_FOF = 0x04000000 /* Input FIFO Overflowed. */
|
||||
};
|
||||
|
||||
enum hil_control_bitpos {
|
||||
HIL_CTRL_TEST = 0x00010000,
|
||||
HIL_CTRL_IPF = 0x00040000,
|
||||
HIL_CTRL_APE = 0x02000000
|
||||
};
|
||||
|
||||
/* Bits 30,31 are unused, we use them to control write behavior. */
|
||||
#define HIL_DO_ALTER_CTRL 0x40000000 /* Write MSW of packet to control
|
||||
before writing LSW to loop */
|
||||
#define HIL_CTRL_ONLY 0xc0000000 /* *Only* alter the control registers */
|
||||
|
||||
/* This gives us a 32-bit "packet"
|
||||
*/
|
||||
typedef u32 hil_packet;
|
||||
|
||||
|
||||
/* HIL Loop commands
|
||||
*/
|
||||
enum hil_command {
|
||||
HIL_CMD_IFC = 0x00, /* Interface Clear */
|
||||
HIL_CMD_EPT = 0x01, /* Enter Pass-Thru Mode */
|
||||
HIL_CMD_ELB = 0x02, /* Enter Loop-Back Mode */
|
||||
HIL_CMD_IDD = 0x03, /* Identify and Describe */
|
||||
HIL_CMD_DSR = 0x04, /* Device Soft Reset */
|
||||
HIL_CMD_PST = 0x05, /* Perform Self Test */
|
||||
HIL_CMD_RRG = 0x06, /* Read Register */
|
||||
HIL_CMD_WRG = 0x07, /* Write Register */
|
||||
HIL_CMD_ACF = 0x08, /* Auto Configure */
|
||||
HIL_CMDID_ACF = 0x07, /* Auto Configure bits with incremented ID */
|
||||
HIL_CMD_POL = 0x10, /* Poll */
|
||||
HIL_CMDCT_POL = 0x0f, /* Poll command bits with item count */
|
||||
HIL_CMD_RPL = 0x20, /* RePoll */
|
||||
HIL_CMDCT_RPL = 0x0f, /* RePoll command bits with item count */
|
||||
HIL_CMD_RNM = 0x30, /* Report Name */
|
||||
HIL_CMD_RST = 0x31, /* Report Status */
|
||||
HIL_CMD_EXD = 0x32, /* Extended Describe */
|
||||
HIL_CMD_RSC = 0x33, /* Report Security Code */
|
||||
|
||||
/* 0x34 to 0x3c reserved for future use */
|
||||
|
||||
HIL_CMD_DKA = 0x3d, /* Disable Keyswitch Autorepeat */
|
||||
HIL_CMD_EK1 = 0x3e, /* Enable Keyswitch Autorepeat 1 */
|
||||
HIL_CMD_EK2 = 0x3f, /* Enable Keyswitch Autorepeat 2 */
|
||||
HIL_CMD_PR1 = 0x40, /* Prompt1 */
|
||||
HIL_CMD_PR2 = 0x41, /* Prompt2 */
|
||||
HIL_CMD_PR3 = 0x42, /* Prompt3 */
|
||||
HIL_CMD_PR4 = 0x43, /* Prompt4 */
|
||||
HIL_CMD_PR5 = 0x44, /* Prompt5 */
|
||||
HIL_CMD_PR6 = 0x45, /* Prompt6 */
|
||||
HIL_CMD_PR7 = 0x46, /* Prompt7 */
|
||||
HIL_CMD_PRM = 0x47, /* Prompt (General Purpose) */
|
||||
HIL_CMD_AK1 = 0x48, /* Acknowlege1 */
|
||||
HIL_CMD_AK2 = 0x49, /* Acknowlege2 */
|
||||
HIL_CMD_AK3 = 0x4a, /* Acknowlege3 */
|
||||
HIL_CMD_AK4 = 0x4b, /* Acknowlege4 */
|
||||
HIL_CMD_AK5 = 0x4c, /* Acknowlege5 */
|
||||
HIL_CMD_AK6 = 0x4d, /* Acknowlege6 */
|
||||
HIL_CMD_AK7 = 0x4e, /* Acknowlege7 */
|
||||
HIL_CMD_ACK = 0x4f, /* Acknowlege (General Purpose) */
|
||||
|
||||
/* 0x50 to 0x78 reserved for future use */
|
||||
/* 0x80 to 0xEF device-specific commands */
|
||||
/* 0xf0 to 0xf9 reserved for future use */
|
||||
|
||||
HIL_CMD_RIO = 0xfa, /* Register I/O Error */
|
||||
HIL_CMD_SHR = 0xfb, /* System Hard Reset */
|
||||
HIL_CMD_TER = 0xfc, /* Transmission Error */
|
||||
HIL_CMD_CAE = 0xfd, /* Configuration Address Error */
|
||||
HIL_CMD_DHR = 0xfe, /* Device Hard Reset */
|
||||
|
||||
/* 0xff is prohibited from use. */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Response "records" to HIL commands
|
||||
*/
|
||||
|
||||
/* Device ID byte
|
||||
*/
|
||||
#define HIL_IDD_DID_TYPE_MASK 0xe0 /* Primary type bits */
|
||||
#define HIL_IDD_DID_TYPE_KB_INTEGRAL 0xa0 /* Integral keyboard */
|
||||
#define HIL_IDD_DID_TYPE_KB_ITF 0xc0 /* ITD keyboard */
|
||||
#define HIL_IDD_DID_TYPE_KB_RSVD 0xe0 /* Reserved keyboard type */
|
||||
#define HIL_IDD_DID_TYPE_KB_LANG_MASK 0x1f /* Keyboard locale bits */
|
||||
#define HIL_IDD_DID_KBLANG_USE_ESD 0x00 /* Use ESD Locale instead */
|
||||
#define HIL_IDD_DID_TYPE_ABS 0x80 /* Absolute Positioners */
|
||||
#define HIL_IDD_DID_ABS_RSVD1_MASK 0xf8 /* Reserved */
|
||||
#define HIL_IDD_DID_ABS_RSVD1 0x98
|
||||
#define HIL_IDD_DID_ABS_TABLET_MASK 0xf8 /* Tablets and digitizers */
|
||||
#define HIL_IDD_DID_ABS_TABLET 0x90
|
||||
#define HIL_IDD_DID_ABS_TSCREEN_MASK 0xfc /* Touch screens */
|
||||
#define HIL_IDD_DID_ABS_TSCREEN 0x8c
|
||||
#define HIL_IDD_DID_ABS_RSVD2_MASK 0xfc /* Reserved */
|
||||
#define HIL_IDD_DID_ABS_RSVD2 0x88
|
||||
#define HIL_IDD_DID_ABS_RSVD3_MASK 0xfc /* Reserved */
|
||||
#define HIL_IDD_DID_ABS_RSVD3 0x80
|
||||
#define HIL_IDD_DID_TYPE_REL 0x60 /* Relative Positioners */
|
||||
#define HIL_IDD_DID_REL_RSVD1_MASK 0xf0 /* Reserved */
|
||||
#define HIL_IDD_DID_REL_RSVD1 0x70
|
||||
#define HIL_IDD_DID_REL_RSVD2_MASK 0xfc /* Reserved */
|
||||
#define HIL_IDD_DID_REL_RSVD2 0x6c
|
||||
#define HIL_IDD_DID_REL_MOUSE_MASK 0xfc /* Mouse */
|
||||
#define HIL_IDD_DID_REL_MOUSE 0x68
|
||||
#define HIL_IDD_DID_REL_QUAD_MASK 0xf8 /* Other Quadrature Devices */
|
||||
#define HIL_IDD_DID_REL_QUAD 0x60
|
||||
#define HIL_IDD_DID_TYPE_CHAR 0x40 /* Character Entry */
|
||||
#define HIL_IDD_DID_CHAR_BARCODE_MASK 0xfc /* Barcode Reader */
|
||||
#define HIL_IDD_DID_CHAR_BARCODE 0x5c
|
||||
#define HIL_IDD_DID_CHAR_RSVD1_MASK 0xfc /* Reserved */
|
||||
#define HIL_IDD_DID_CHAR_RSVD1 0x58
|
||||
#define HIL_IDD_DID_CHAR_RSVD2_MASK 0xf8 /* Reserved */
|
||||
#define HIL_IDD_DID_CHAR_RSVD2 0x50
|
||||
#define HIL_IDD_DID_CHAR_RSVD3_MASK 0xf0 /* Reserved */
|
||||
#define HIL_IDD_DID_CHAR_RSVD3 0x40
|
||||
#define HIL_IDD_DID_TYPE_OTHER 0x20 /* Miscellaneous */
|
||||
#define HIL_IDD_DID_OTHER_RSVD1_MASK 0xf0 /* Reserved */
|
||||
#define HIL_IDD_DID_OTHER_RSVD1 0x30
|
||||
#define HIL_IDD_DID_OTHER_BARCODE_MASK 0xfc /* Tone Generator */
|
||||
#define HIL_IDD_DID_OTHER_BARCODE 0x2c
|
||||
#define HIL_IDD_DID_OTHER_RSVD2_MASK 0xfc /* Reserved */
|
||||
#define HIL_IDD_DID_OTHER_RSVD2 0x28
|
||||
#define HIL_IDD_DID_OTHER_RSVD3_MASK 0xf8 /* Reserved */
|
||||
#define HIL_IDD_DID_OTHER_RSVD3 0x20
|
||||
#define HIL_IDD_DID_TYPE_KEYPAD 0x00 /* Vectra Keyboard */
|
||||
|
||||
/* IDD record header
|
||||
*/
|
||||
#define HIL_IDD_HEADER_AXSET_MASK 0x03 /* Number of axis in a set */
|
||||
#define HIL_IDD_HEADER_RSC 0x04 /* Supports RSC command */
|
||||
#define HIL_IDD_HEADER_EXD 0x08 /* Supports EXD command */
|
||||
#define HIL_IDD_HEADER_IOD 0x10 /* IOD byte to follow */
|
||||
#define HIL_IDD_HEADER_16BIT 0x20 /* 16 (vs. 8) bit resolution */
|
||||
#define HIL_IDD_HEADER_ABS 0x40 /* Reports Absolute Position */
|
||||
#define HIL_IDD_HEADER_2X_AXIS 0x80 /* Two sets of 1-3 axis */
|
||||
|
||||
/* I/O Descriptor
|
||||
*/
|
||||
#define HIL_IDD_IOD_NBUTTON_MASK 0x07 /* Number of buttons */
|
||||
#define HIL_IDD_IOD_PROXIMITY 0x08 /* Proximity in/out events */
|
||||
#define HIL_IDD_IOD_PROMPT_MASK 0x70 /* Number of prompts/acks */
|
||||
#define HIL_IDD_IOD_PROMPT_SHIFT 4
|
||||
#define HIL_IDD_IOD_PROMPT 0x80 /* Generic prompt/ack */
|
||||
|
||||
#define HIL_IDD_NUM_AXES_PER_SET(header_packet) \
|
||||
((header_packet) & HIL_IDD_HEADER_AXSET_MASK)
|
||||
|
||||
#define HIL_IDD_NUM_AXSETS(header_packet) \
|
||||
(2 - !((header_packet) & HIL_IDD_HEADER_2X_AXIS))
|
||||
|
||||
#define HIL_IDD_LEN(header_packet) \
|
||||
((4 - !(header_packet & HIL_IDD_HEADER_IOD) - \
|
||||
2 * !(HIL_IDD_NUM_AXES_PER_SET(header_packet))) + \
|
||||
2 * HIL_IDD_NUM_AXES_PER_SET(header_packet) * \
|
||||
!!((header_packet) & HIL_IDD_HEADER_ABS))
|
||||
|
||||
/* The following HIL_IDD_* macros assume you have an array of
|
||||
* packets and/or unpacked 8-bit data in the order that they
|
||||
* were received.
|
||||
*/
|
||||
|
||||
#define HIL_IDD_AXIS_COUNTS_PER_M(header_ptr) \
|
||||
(!(HIL_IDD_NUM_AXSETS(*(header_ptr))) ? -1 : \
|
||||
(((*(header_ptr + 1) & HIL_PKT_DATA_MASK) + \
|
||||
((*(header_ptr + 2) & HIL_PKT_DATA_MASK)) << 8) \
|
||||
* ((*(header_ptr) & HIL_IDD_HEADER_16BIT) ? 100 : 1)))
|
||||
|
||||
#define HIL_IDD_AXIS_MAX(header_ptr, __axnum) \
|
||||
((!(*(header_ptr) & HIL_IDD_HEADER_ABS) || \
|
||||
(HIL_IDD_NUM_AXES_PER_SET(*(header_ptr)) <= __axnum)) ? 0 : \
|
||||
((HIL_PKT_DATA_MASK & *((header_ptr) + 3 + 2 * __axnum)) + \
|
||||
((HIL_PKT_DATA_MASK & *((header_ptr) + 4 + 2 * __axnum)) << 8)))
|
||||
|
||||
#define HIL_IDD_IOD(header_ptr) \
|
||||
(*(header_ptr + HIL_IDD_LEN((*header_ptr)) - 1))
|
||||
|
||||
#define HIL_IDD_HAS_GEN_PROMPT(header_ptr) \
|
||||
((*header_ptr & HIL_IDD_HEADER_IOD) && \
|
||||
(HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_PROMPT))
|
||||
|
||||
#define HIL_IDD_HAS_GEN_PROXIMITY(header_ptr) \
|
||||
((*header_ptr & HIL_IDD_HEADER_IOD) && \
|
||||
(HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_PROXIMITY))
|
||||
|
||||
#define HIL_IDD_NUM_BUTTONS(header_ptr) \
|
||||
((*header_ptr & HIL_IDD_HEADER_IOD) ? \
|
||||
(HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_NBUTTON_MASK) : 0)
|
||||
|
||||
#define HIL_IDD_NUM_PROMPTS(header_ptr) \
|
||||
((*header_ptr & HIL_IDD_HEADER_IOD) ? \
|
||||
((HIL_IDD_IOD(header_ptr) & HIL_IDD_IOD_NPROMPT_MASK) \
|
||||
>> HIL_IDD_IOD_PROMPT_SHIFT) : 0)
|
||||
|
||||
/* The response to HIL EXD commands -- the "extended describe record" */
|
||||
#define HIL_EXD_HEADER_WRG 0x03 /* Supports type2 WRG */
|
||||
#define HIL_EXD_HEADER_WRG_TYPE1 0x01 /* Supports type1 WRG */
|
||||
#define HIL_EXD_HEADER_WRG_TYPE2 0x02 /* Supports type2 WRG */
|
||||
#define HIL_EXD_HEADER_RRG 0x04 /* Supports RRG command */
|
||||
#define HIL_EXD_HEADER_RNM 0x10 /* Supports RNM command */
|
||||
#define HIL_EXD_HEADER_RST 0x20 /* Supports RST command */
|
||||
#define HIL_EXD_HEADER_LOCALE 0x40 /* Contains locale code */
|
||||
|
||||
#define HIL_EXD_NUM_RRG(header_ptr) \
|
||||
((*header_ptr & HIL_EXD_HEADER_RRG) ? \
|
||||
(*(header_ptr + 1) & HIL_PKT_DATA_MASK) : 0)
|
||||
|
||||
#define HIL_EXD_NUM_WWG(header_ptr) \
|
||||
((*header_ptr & HIL_EXD_HEADER_WRG) ? \
|
||||
(*(header_ptr + 2 - !(*header_ptr & HIL_EXD_HEADER_RRG)) & \
|
||||
HIL_PKT_DATA_MASK) : 0)
|
||||
|
||||
#define HIL_EXD_LEN(header_ptr) \
|
||||
(!!(*header_ptr & HIL_EXD_HEADER_RRG) + \
|
||||
!!(*header_ptr & HIL_EXD_HEADER_WRG) + \
|
||||
!!(*header_ptr & HIL_EXD_HEADER_LOCALE) + \
|
||||
2 * !!(*header_ptr & HIL_EXD_HEADER_WRG_TYPE2) + 1)
|
||||
|
||||
#define HIL_EXD_LOCALE(header_ptr) \
|
||||
(!(*header_ptr & HIL_EXD_HEADER_LOCALE) ? -1 : \
|
||||
(*(header_ptr + HIL_EXD_LEN(header_ptr) - 1) & HIL_PKT_DATA_MASK))
|
||||
|
||||
#define HIL_EXD_WRG_TYPE2_LEN(header_ptr) \
|
||||
(!(*header_ptr & HIL_EXD_HEADER_WRG_TYPE2) ? -1 : \
|
||||
(*(header_ptr + HIL_EXD_LEN(header_ptr) - 2 - \
|
||||
!!(*header_ptr & HIL_EXD_HEADER_LOCALE)) & HIL_PKT_DATA_MASK) + \
|
||||
((*(header_ptr + HIL_EXD_LEN(header_ptr) - 1 - \
|
||||
!!(*header_ptr & HIL_EXD_HEADER_LOCALE)) & HIL_PKT_DATA_MASK) << 8))
|
||||
|
||||
/* Device locale codes. */
|
||||
|
||||
/* Last defined locale code. Everything above this is "Reserved",
|
||||
and note that this same table applies to the Device ID Byte where
|
||||
keyboards may have a nationality code which is only 5 bits. */
|
||||
#define HIL_LOCALE_MAX 0x1f
|
||||
|
||||
/* Map to hopefully useful strings. I was trying to make these look
|
||||
like locale.aliases strings do; maybe that isn't the right table to
|
||||
emulate. In either case, I didn't have much to work on. */
|
||||
#define HIL_LOCALE_MAP \
|
||||
"", /* 0x00 Reserved */ \
|
||||
"", /* 0x01 Reserved */ \
|
||||
"", /* 0x02 Reserved */ \
|
||||
"swiss.french", /* 0x03 Swiss/French */ \
|
||||
"portuguese", /* 0x04 Portuguese */ \
|
||||
"arabic", /* 0x05 Arabic */ \
|
||||
"hebrew", /* 0x06 Hebrew */ \
|
||||
"english.canadian", /* 0x07 Canadian English */ \
|
||||
"turkish", /* 0x08 Turkish */ \
|
||||
"greek", /* 0x09 Greek */ \
|
||||
"thai", /* 0x0a Thai (Thailand) */ \
|
||||
"italian", /* 0x0b Italian */ \
|
||||
"korean", /* 0x0c Hangul (Korea) */ \
|
||||
"dutch", /* 0x0d Dutch */ \
|
||||
"swedish", /* 0x0e Swedish */ \
|
||||
"german", /* 0x0f German */ \
|
||||
"chinese", /* 0x10 Chinese-PRC */ \
|
||||
"chinese", /* 0x11 Chinese-ROC */ \
|
||||
"swiss.french", /* 0x12 Swiss/French II */ \
|
||||
"spanish", /* 0x13 Spanish */ \
|
||||
"swiss.german", /* 0x14 Swiss/German II */ \
|
||||
"flemish", /* 0x15 Belgian (Flemish) */ \
|
||||
"finnish", /* 0x16 Finnish */ \
|
||||
"english.uk", /* 0x17 United Kingdom */ \
|
||||
"french.canadian", /* 0x18 French/Canadian */ \
|
||||
"swiss.german", /* 0x19 Swiss/German */ \
|
||||
"norwegian", /* 0x1a Norwegian */ \
|
||||
"french", /* 0x1b French */ \
|
||||
"danish", /* 0x1c Danish */ \
|
||||
"japanese", /* 0x1d Katakana */ \
|
||||
"spanish", /* 0x1e Latin American/Spanish*/\
|
||||
"english.us" /* 0x1f United States */ \
|
||||
|
||||
|
||||
/* HIL keycodes */
|
||||
#define HIL_KEYCODES_SET1_TBLSIZE 128
|
||||
#define HIL_KEYCODES_SET1 \
|
||||
KEY_5, KEY_RESERVED, KEY_RIGHTALT, KEY_LEFTALT, \
|
||||
KEY_RIGHTSHIFT, KEY_LEFTSHIFT, KEY_LEFTCTRL, KEY_SYSRQ, \
|
||||
KEY_KP4, KEY_KP8, KEY_KP5, KEY_KP9, \
|
||||
KEY_KP6, KEY_KP7, KEY_KPCOMMA, KEY_KPENTER, \
|
||||
KEY_KP1, KEY_KPSLASH, KEY_KP2, KEY_KPPLUS, \
|
||||
KEY_KP3, KEY_KPASTERISK, KEY_KP0, KEY_KPMINUS, \
|
||||
KEY_B, KEY_V, KEY_C, KEY_X, \
|
||||
KEY_Z, KEY_RESERVED, KEY_RESERVED, KEY_ESC, \
|
||||
KEY_6, KEY_F10, KEY_3, KEY_F11, \
|
||||
KEY_KPDOT, KEY_F9, KEY_TAB /*KP*/, KEY_F12, \
|
||||
KEY_H, KEY_G, KEY_F, KEY_D, \
|
||||
KEY_S, KEY_A, KEY_RESERVED, KEY_CAPSLOCK, \
|
||||
KEY_U, KEY_Y, KEY_T, KEY_R, \
|
||||
KEY_E, KEY_W, KEY_Q, KEY_TAB, \
|
||||
KEY_7, KEY_6, KEY_5, KEY_4, \
|
||||
KEY_3, KEY_2, KEY_1, KEY_GRAVE, \
|
||||
KEY_F13, KEY_F14, KEY_F15, KEY_F16, \
|
||||
KEY_F17, KEY_F18, KEY_F19, KEY_F20, \
|
||||
KEY_MENU, KEY_F4, KEY_F3, KEY_F2, \
|
||||
KEY_F1, KEY_VOLUMEUP, KEY_STOP, KEY_SENDFILE, \
|
||||
KEY_SYSRQ, KEY_F5, KEY_F6, KEY_F7, \
|
||||
KEY_F8, KEY_VOLUMEDOWN, KEY_DEL_EOL, KEY_DEL_EOS, \
|
||||
KEY_8, KEY_9, KEY_0, KEY_MINUS, \
|
||||
KEY_EQUAL, KEY_BACKSPACE, KEY_INS_LINE, KEY_DEL_LINE, \
|
||||
KEY_I, KEY_O, KEY_P, KEY_LEFTBRACE, \
|
||||
KEY_RIGHTBRACE, KEY_BACKSLASH, KEY_INSERT, KEY_DELETE, \
|
||||
KEY_J, KEY_K, KEY_L, KEY_SEMICOLON, \
|
||||
KEY_APOSTROPHE, KEY_ENTER, KEY_HOME, KEY_PAGEUP, \
|
||||
KEY_M, KEY_COMMA, KEY_DOT, KEY_SLASH, \
|
||||
KEY_BACKSLASH, KEY_SELECT, KEY_102ND, KEY_PAGEDOWN, \
|
||||
KEY_N, KEY_SPACE, KEY_NEXT, KEY_RESERVED, \
|
||||
KEY_LEFT, KEY_DOWN, KEY_UP, KEY_RIGHT
|
||||
|
||||
|
||||
#define HIL_KEYCODES_SET3_TBLSIZE 128
|
||||
#define HIL_KEYCODES_SET3 \
|
||||
KEY_RESERVED, KEY_ESC, KEY_1, KEY_2, \
|
||||
KEY_3, KEY_4, KEY_5, KEY_6, \
|
||||
KEY_7, KEY_8, KEY_9, KEY_0, \
|
||||
KEY_MINUS, KEY_EQUAL, KEY_BACKSPACE, KEY_TAB, \
|
||||
KEY_Q, KEY_W, KEY_E, KEY_R, \
|
||||
KEY_T, KEY_Y, KEY_U, KEY_I, \
|
||||
KEY_O, KEY_P, KEY_LEFTBRACE, KEY_RIGHTBRACE, \
|
||||
KEY_ENTER, KEY_LEFTCTRL, KEY_A, KEY_S, \
|
||||
KEY_D, KEY_F, KEY_G, KEY_H, \
|
||||
KEY_J, KEY_K, KEY_L, KEY_SEMICOLON, \
|
||||
KEY_APOSTROPHE,KEY_GRAVE, KEY_LEFTSHIFT, KEY_BACKSLASH, \
|
||||
KEY_Z, KEY_X, KEY_C, KEY_V, \
|
||||
KEY_B, KEY_N, KEY_M, KEY_COMMA, \
|
||||
KEY_DOT, KEY_SLASH, KEY_RIGHTSHIFT, KEY_KPASTERISK, \
|
||||
KEY_LEFTALT, KEY_SPACE, KEY_CAPSLOCK, KEY_F1, \
|
||||
KEY_F2, KEY_F3, KEY_F4, KEY_F5, \
|
||||
KEY_F6, KEY_F7, KEY_F8, KEY_F9, \
|
||||
KEY_F10, KEY_NUMLOCK, KEY_SCROLLLOCK, KEY_KP7, \
|
||||
KEY_KP8, KEY_KP9, KEY_KPMINUS, KEY_KP4, \
|
||||
KEY_KP5, KEY_KP6, KEY_KPPLUS, KEY_KP1, \
|
||||
KEY_KP2, KEY_KP3, KEY_KP0, KEY_KPDOT, \
|
||||
KEY_SYSRQ, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
|
||||
KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
|
||||
KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
|
||||
KEY_UP, KEY_LEFT, KEY_DOWN, KEY_RIGHT, \
|
||||
KEY_HOME, KEY_PAGEUP, KEY_END, KEY_PAGEDOWN, \
|
||||
KEY_INSERT, KEY_DELETE, KEY_102ND, KEY_RESERVED, \
|
||||
KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
|
||||
KEY_F1, KEY_F2, KEY_F3, KEY_F4, \
|
||||
KEY_F5, KEY_F6, KEY_F7, KEY_F8, \
|
||||
KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, \
|
||||
KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED
|
||||
|
||||
|
||||
/* Response to POL command, the "poll record header" */
|
||||
|
||||
#define HIL_POL_NUM_AXES_MASK 0x03 /* Number of axis reported */
|
||||
#define HIL_POL_CTS 0x04 /* Device ready to receive data */
|
||||
#define HIL_POL_STATUS_PENDING 0x08 /* Device has status to report */
|
||||
#define HIL_POL_CHARTYPE_MASK 0x70 /* Type of character data to follow */
|
||||
#define HIL_POL_CHARTYPE_NONE 0x00 /* No character data to follow */
|
||||
#define HIL_POL_CHARTYPE_RSVD1 0x10 /* Reserved Set 1 */
|
||||
#define HIL_POL_CHARTYPE_ASCII 0x20 /* U.S. ASCII */
|
||||
#define HIL_POL_CHARTYPE_BINARY 0x30 /* Binary data */
|
||||
#define HIL_POL_CHARTYPE_SET1 0x40 /* Keycode Set 1 */
|
||||
#define HIL_POL_CHARTYPE_RSVD2 0x50 /* Reserved Set 2 */
|
||||
#define HIL_POL_CHARTYPE_SET2 0x60 /* Keycode Set 2 */
|
||||
#define HIL_POL_CHARTYPE_SET3 0x70 /* Keycode Set 3 */
|
||||
#define HIL_POL_AXIS_ALT 0x80 /* Data is from axis set 2 */
|
||||
|
||||
|
||||
#endif /* _HIL_H_ */
|
168
include/linux/hil_mlc.h
Normal file
168
include/linux/hil_mlc.h
Normal file
|
@ -0,0 +1,168 @@
|
|||
/*
|
||||
* HP Human Interface Loop Master Link Controller driver.
|
||||
*
|
||||
* Copyright (c) 2001 Brian S. Julin
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions, and the following disclaimer,
|
||||
* without modification.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* Alternatively, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL").
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
*
|
||||
* References:
|
||||
* HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/hil.h>
|
||||
#include <linux/time.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <asm/semaphore.h>
|
||||
#include <linux/serio.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
typedef struct hil_mlc hil_mlc;
|
||||
|
||||
/* The HIL has a complicated state engine.
|
||||
* We define the structure of nodes in the state engine here.
|
||||
*/
|
||||
enum hilse_act {
|
||||
/* HILSE_OUT prepares to receive input if the next node
|
||||
* is an IN or EXPECT, and then sends the given packet.
|
||||
*/
|
||||
HILSE_OUT = 0,
|
||||
|
||||
/* HILSE_CTS checks if the loop is busy. */
|
||||
HILSE_CTS,
|
||||
|
||||
/* HILSE_OUT_LAST sends the given command packet to
|
||||
* the last configured/running device on the loop.
|
||||
*/
|
||||
HILSE_OUT_LAST,
|
||||
|
||||
/* HILSE_OUT_DISC sends the given command packet to
|
||||
* the next device past the last configured/running one.
|
||||
*/
|
||||
HILSE_OUT_DISC,
|
||||
|
||||
/* HILSE_FUNC runs a callback function with given arguments.
|
||||
* a positive return value causes the "ugly" branch to be taken.
|
||||
*/
|
||||
HILSE_FUNC,
|
||||
|
||||
/* HILSE_IN simply expects any non-errored packet to arrive
|
||||
* within arg usecs.
|
||||
*/
|
||||
HILSE_IN = 0x100,
|
||||
|
||||
/* HILSE_EXPECT expects a particular packet to arrive
|
||||
* within arg usecs, any other packet is considered an error.
|
||||
*/
|
||||
HILSE_EXPECT,
|
||||
|
||||
/* HILSE_EXPECT_LAST as above but dev field should be last
|
||||
* discovered/operational device.
|
||||
*/
|
||||
HILSE_EXPECT_LAST,
|
||||
|
||||
/* HILSE_EXPECT_LAST as above but dev field should be first
|
||||
* undiscovered/inoperational device.
|
||||
*/
|
||||
HILSE_EXPECT_DISC
|
||||
};
|
||||
|
||||
typedef int (hilse_func) (hil_mlc *mlc, int arg);
|
||||
struct hilse_node {
|
||||
enum hilse_act act; /* How to process this node */
|
||||
union {
|
||||
hilse_func *func; /* Function to call if HILSE_FUNC */
|
||||
hil_packet packet; /* Packet to send or to compare */
|
||||
} object;
|
||||
int arg; /* Timeout in usec or parm for func */
|
||||
int good; /* Node to jump to on success */
|
||||
int bad; /* Node to jump to on error */
|
||||
int ugly; /* Node to jump to on timeout */
|
||||
};
|
||||
|
||||
/* Methods for back-end drivers, e.g. hp_sdc_mlc */
|
||||
typedef int (hil_mlc_cts) (hil_mlc *mlc);
|
||||
typedef void (hil_mlc_out) (hil_mlc *mlc);
|
||||
typedef int (hil_mlc_in) (hil_mlc *mlc, suseconds_t timeout);
|
||||
|
||||
struct hil_mlc_devinfo {
|
||||
uint8_t idd[16]; /* Device ID Byte and Describe Record */
|
||||
uint8_t rsc[16]; /* Security Code Header and Record */
|
||||
uint8_t exd[16]; /* Extended Describe Record */
|
||||
uint8_t rnm[16]; /* Device name as returned by RNM command */
|
||||
};
|
||||
|
||||
struct hil_mlc_serio_map {
|
||||
hil_mlc *mlc;
|
||||
int di_revmap;
|
||||
int didx;
|
||||
};
|
||||
|
||||
/* How many (possibly old/detached) devices the we try to keep track of */
|
||||
#define HIL_MLC_DEVMEM 16
|
||||
|
||||
struct hil_mlc {
|
||||
struct list_head list; /* hil_mlc is organized as linked list */
|
||||
|
||||
rwlock_t lock;
|
||||
|
||||
void *priv; /* Data specific to a particular type of MLC */
|
||||
|
||||
int seidx; /* Current node in state engine */
|
||||
int istarted, ostarted;
|
||||
|
||||
hil_mlc_cts *cts;
|
||||
struct semaphore csem; /* Raised when loop idle */
|
||||
|
||||
hil_mlc_out *out;
|
||||
struct semaphore osem; /* Raised when outpacket dispatched */
|
||||
hil_packet opacket;
|
||||
|
||||
hil_mlc_in *in;
|
||||
struct semaphore isem; /* Raised when a packet arrives */
|
||||
hil_packet ipacket[16];
|
||||
hil_packet imatch;
|
||||
int icount;
|
||||
struct timeval instart;
|
||||
suseconds_t intimeout;
|
||||
|
||||
int ddi; /* Last operational device id */
|
||||
int lcv; /* LCV to throttle loops */
|
||||
struct timeval lcv_tv; /* Time loop was started */
|
||||
|
||||
int di_map[7]; /* Maps below items to live devs */
|
||||
struct hil_mlc_devinfo di[HIL_MLC_DEVMEM];
|
||||
struct serio *serio[HIL_MLC_DEVMEM];
|
||||
struct hil_mlc_serio_map serio_map[HIL_MLC_DEVMEM];
|
||||
hil_packet serio_opacket[HIL_MLC_DEVMEM];
|
||||
int serio_oidx[HIL_MLC_DEVMEM];
|
||||
struct hil_mlc_devinfo di_scratch; /* Temporary area */
|
||||
|
||||
int opercnt;
|
||||
|
||||
struct tasklet_struct *tasklet;
|
||||
};
|
||||
|
||||
int hil_mlc_register(hil_mlc *mlc);
|
||||
int hil_mlc_unregister(hil_mlc *mlc);
|
300
include/linux/hp_sdc.h
Normal file
300
include/linux/hp_sdc.h
Normal file
|
@ -0,0 +1,300 @@
|
|||
/*
|
||||
* HP i8042 System Device Controller -- header
|
||||
*
|
||||
* Copyright (c) 2001 Brian S. Julin
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions, and the following disclaimer,
|
||||
* without modification.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* Alternatively, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL").
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
*
|
||||
* References:
|
||||
*
|
||||
* HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
|
||||
*
|
||||
* System Device Controller Microprocessor Firmware Theory of Operation
|
||||
* for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_HP_SDC_H
|
||||
#define _LINUX_HP_SDC_H
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/time.h>
|
||||
#include <linux/timer.h>
|
||||
#if defined(__hppa__)
|
||||
#include <asm/hardware.h>
|
||||
#endif
|
||||
|
||||
|
||||
/* No 4X status reads take longer than this (in usec).
|
||||
*/
|
||||
#define HP_SDC_MAX_REG_DELAY 20000
|
||||
|
||||
typedef void (hp_sdc_irqhook) (int irq, void *dev_id,
|
||||
uint8_t status, uint8_t data);
|
||||
|
||||
int hp_sdc_request_timer_irq(hp_sdc_irqhook *callback);
|
||||
int hp_sdc_request_hil_irq(hp_sdc_irqhook *callback);
|
||||
int hp_sdc_request_cooked_irq(hp_sdc_irqhook *callback);
|
||||
int hp_sdc_release_timer_irq(hp_sdc_irqhook *callback);
|
||||
int hp_sdc_release_hil_irq(hp_sdc_irqhook *callback);
|
||||
int hp_sdc_release_cooked_irq(hp_sdc_irqhook *callback);
|
||||
|
||||
typedef struct {
|
||||
int actidx; /* Start of act. Acts are atomic WRT I/O to SDC */
|
||||
int idx; /* Index within the act */
|
||||
int endidx; /* transaction is over and done if idx == endidx */
|
||||
uint8_t *seq; /* commands/data for the transaction */
|
||||
union {
|
||||
hp_sdc_irqhook *irqhook; /* Callback, isr or tasklet context */
|
||||
struct semaphore *semaphore; /* Semaphore to sleep on. */
|
||||
} act;
|
||||
} hp_sdc_transaction;
|
||||
int hp_sdc_enqueue_transaction(hp_sdc_transaction *this);
|
||||
int hp_sdc_dequeue_transaction(hp_sdc_transaction *this);
|
||||
|
||||
/* The HP_SDC_ACT* values are peculiar to this driver.
|
||||
* Nuance: never HP_SDC_ACT_DATAIN | HP_SDC_ACT_DEALLOC, use another
|
||||
* act to perform the dealloc.
|
||||
*/
|
||||
#define HP_SDC_ACT_PRECMD 0x01 /* Send a command first */
|
||||
#define HP_SDC_ACT_DATAREG 0x02 /* Set data registers */
|
||||
#define HP_SDC_ACT_DATAOUT 0x04 /* Send data bytes */
|
||||
#define HP_SDC_ACT_POSTCMD 0x08 /* Send command after */
|
||||
#define HP_SDC_ACT_DATAIN 0x10 /* Collect data after */
|
||||
#define HP_SDC_ACT_DURING 0x1f
|
||||
#define HP_SDC_ACT_SEMAPHORE 0x20 /* Raise semaphore after */
|
||||
#define HP_SDC_ACT_CALLBACK 0x40 /* Pass data to IRQ handler */
|
||||
#define HP_SDC_ACT_DEALLOC 0x80 /* Destroy transaction after */
|
||||
#define HP_SDC_ACT_AFTER 0xe0
|
||||
#define HP_SDC_ACT_DEAD 0x60 /* Act timed out. */
|
||||
|
||||
/* Rest of the flags are straightforward representation of the SDC interface */
|
||||
#define HP_SDC_STATUS_IBF 0x02 /* Input buffer full */
|
||||
|
||||
#define HP_SDC_STATUS_IRQMASK 0xf0 /* Bits containing "level 1" irq */
|
||||
#define HP_SDC_STATUS_PERIODIC 0x10 /* Periodic 10ms timer */
|
||||
#define HP_SDC_STATUS_USERTIMER 0x20 /* "Special purpose" timer */
|
||||
#define HP_SDC_STATUS_TIMER 0x30 /* Both PERIODIC and USERTIMER */
|
||||
#define HP_SDC_STATUS_REG 0x40 /* Data from an i8042 register */
|
||||
#define HP_SDC_STATUS_HILCMD 0x50 /* Command from HIL MLC */
|
||||
#define HP_SDC_STATUS_HILDATA 0x60 /* Data from HIL MLC */
|
||||
#define HP_SDC_STATUS_PUP 0x70 /* Sucessful power-up self test */
|
||||
#define HP_SDC_STATUS_KCOOKED 0x80 /* Key from cooked kbd */
|
||||
#define HP_SDC_STATUS_KRPG 0xc0 /* Key from Repeat Gen */
|
||||
#define HP_SDC_STATUS_KMOD_SUP 0x10 /* Shift key is up */
|
||||
#define HP_SDC_STATUS_KMOD_CUP 0x20 /* Control key is up */
|
||||
|
||||
#define HP_SDC_NMISTATUS_FHS 0x40 /* NMI is a fast handshake irq */
|
||||
|
||||
/* Internal i8042 registers (there are more, but they are not too useful). */
|
||||
|
||||
#define HP_SDC_USE 0x02 /* Resource usage (including OB bit) */
|
||||
#define HP_SDC_IM 0x04 /* Interrupt mask */
|
||||
#define HP_SDC_CFG 0x11 /* Configuration register */
|
||||
#define HP_SDC_KBLANGUAGE 0x12 /* Keyboard language */
|
||||
|
||||
#define HP_SDC_D0 0x70 /* General purpose data buffer 0 */
|
||||
#define HP_SDC_D1 0x71 /* General purpose data buffer 1 */
|
||||
#define HP_SDC_D2 0x72 /* General purpose data buffer 2 */
|
||||
#define HP_SDC_D3 0x73 /* General purpose data buffer 3 */
|
||||
#define HP_SDC_VT1 0x74 /* Timer for voice 1 */
|
||||
#define HP_SDC_VT2 0x75 /* Timer for voice 2 */
|
||||
#define HP_SDC_VT3 0x76 /* Timer for voice 3 */
|
||||
#define HP_SDC_VT4 0x77 /* Timer for voice 4 */
|
||||
#define HP_SDC_KBN 0x78 /* Which HIL devs are Nimitz */
|
||||
#define HP_SDC_KBC 0x79 /* Which HIL devs are cooked kbds */
|
||||
#define HP_SDC_LPS 0x7a /* i8042's view of HIL status */
|
||||
#define HP_SDC_LPC 0x7b /* i8042's view of HIL "control" */
|
||||
#define HP_SDC_RSV 0x7c /* Reserved "for testing" */
|
||||
#define HP_SDC_LPR 0x7d /* i8042 count of HIL reconfigs */
|
||||
#define HP_SDC_XTD 0x7e /* "Extended Configuration" register */
|
||||
#define HP_SDC_STR 0x7f /* i8042 self-test result */
|
||||
|
||||
/* Bitfields for above registers */
|
||||
#define HP_SDC_USE_LOOP 0x04 /* Command is currently on the loop. */
|
||||
|
||||
#define HP_SDC_IM_MASK 0x1f /* these bits not part of cmd/status */
|
||||
#define HP_SDC_IM_FH 0x10 /* Mask the fast handshake irq */
|
||||
#define HP_SDC_IM_PT 0x08 /* Mask the periodic timer irq */
|
||||
#define HP_SDC_IM_TIMERS 0x04 /* Mask the MT/DT/CT irq */
|
||||
#define HP_SDC_IM_RESET 0x02 /* Mask the reset key irq */
|
||||
#define HP_SDC_IM_HIL 0x01 /* Mask the HIL MLC irq */
|
||||
|
||||
#define HP_SDC_CFG_ROLLOVER 0x08 /* WTF is "N-key rollover"? */
|
||||
#define HP_SDC_CFG_KBD 0x10 /* There is a keyboard */
|
||||
#define HP_SDC_CFG_NEW 0x20 /* Supports/uses HIL MLC */
|
||||
#define HP_SDC_CFG_KBD_OLD 0x03 /* keyboard code for non-HIL */
|
||||
#define HP_SDC_CFG_KBD_NEW 0x07 /* keyboard code from HIL autoconfig */
|
||||
#define HP_SDC_CFG_REV 0x40 /* Code revision bit */
|
||||
#define HP_SDC_CFG_IDPROM 0x80 /* IDPROM present in kbd (not HIL) */
|
||||
|
||||
#define HP_SDC_LPS_NDEV 0x07 /* # devices autoconfigured on HIL */
|
||||
#define HP_SDC_LPS_ACSUCC 0x08 /* loop autoconfigured successfully */
|
||||
#define HP_SDC_LPS_ACFAIL 0x80 /* last loop autoconfigure failed */
|
||||
|
||||
#define HP_SDC_LPC_APE_IPF 0x01 /* HIL MLC APE/IPF (autopoll) set */
|
||||
#define HP_SDC_LPC_ARCONERR 0x02 /* i8042 autoreconfigs loop on err */
|
||||
#define HP_SDC_LPC_ARCQUIET 0x03 /* i8042 doesn't report autoreconfigs*/
|
||||
#define HP_SDC_LPC_COOK 0x10 /* i8042 cooks devices in _KBN */
|
||||
#define HP_SDC_LPC_RC 0x80 /* causes autoreconfig */
|
||||
|
||||
#define HP_SDC_XTD_REV 0x07 /* contains revision code */
|
||||
#define HP_SDC_XTD_REV_STRINGS(val, str) \
|
||||
switch (val) { \
|
||||
case 0x1: str = "1820-3712"; break; \
|
||||
case 0x2: str = "1820-4379"; break; \
|
||||
case 0x3: str = "1820-4784"; break; \
|
||||
default: str = "unknown"; \
|
||||
};
|
||||
#define HP_SDC_XTD_BEEPER 0x08 /* TI SN76494 beeper available */
|
||||
#define HP_SDC_XTD_BBRTC 0x20 /* OKI MSM-58321 BBRTC present */
|
||||
|
||||
#define HP_SDC_CMD_LOAD_RT 0x31 /* Load real time (from 8042) */
|
||||
#define HP_SDC_CMD_LOAD_FHS 0x36 /* Load the fast handshake timer */
|
||||
#define HP_SDC_CMD_LOAD_MT 0x38 /* Load the match timer */
|
||||
#define HP_SDC_CMD_LOAD_DT 0x3B /* Load the delay timer */
|
||||
#define HP_SDC_CMD_LOAD_CT 0x3E /* Load the cycle timer */
|
||||
|
||||
#define HP_SDC_CMD_SET_IM 0x40 /* 010xxxxx == set irq mask */
|
||||
|
||||
/* The documents provided do not explicitly state that all registers betweem
|
||||
* 0x01 and 0x1f inclusive can be read by sending their register index as a
|
||||
* command, but this is implied and appears to be the case.
|
||||
*/
|
||||
#define HP_SDC_CMD_READ_RAM 0x00 /* Load from i8042 RAM (autoinc) */
|
||||
#define HP_SDC_CMD_READ_USE 0x02 /* Undocumented! Load from usage reg */
|
||||
#define HP_SDC_CMD_READ_IM 0x04 /* Load current interrupt mask */
|
||||
#define HP_SDC_CMD_READ_KCC 0x11 /* Load primary kbd config code */
|
||||
#define HP_SDC_CMD_READ_KLC 0x12 /* Load primary kbd language code */
|
||||
#define HP_SDC_CMD_READ_T1 0x13 /* Load timer output buffer byte 1 */
|
||||
#define HP_SDC_CMD_READ_T2 0x14 /* Load timer output buffer byte 1 */
|
||||
#define HP_SDC_CMD_READ_T3 0x15 /* Load timer output buffer byte 1 */
|
||||
#define HP_SDC_CMD_READ_T4 0x16 /* Load timer output buffer byte 1 */
|
||||
#define HP_SDC_CMD_READ_T5 0x17 /* Load timer output buffer byte 1 */
|
||||
#define HP_SDC_CMD_READ_D0 0xf0 /* Load from i8042 RAM location 0x70 */
|
||||
#define HP_SDC_CMD_READ_D1 0xf1 /* Load from i8042 RAM location 0x71 */
|
||||
#define HP_SDC_CMD_READ_D2 0xf2 /* Load from i8042 RAM location 0x72 */
|
||||
#define HP_SDC_CMD_READ_D3 0xf3 /* Load from i8042 RAM location 0x73 */
|
||||
#define HP_SDC_CMD_READ_VT1 0xf4 /* Load from i8042 RAM location 0x74 */
|
||||
#define HP_SDC_CMD_READ_VT2 0xf5 /* Load from i8042 RAM location 0x75 */
|
||||
#define HP_SDC_CMD_READ_VT3 0xf6 /* Load from i8042 RAM location 0x76 */
|
||||
#define HP_SDC_CMD_READ_VT4 0xf7 /* Load from i8042 RAM location 0x77 */
|
||||
#define HP_SDC_CMD_READ_KBN 0xf8 /* Load from i8042 RAM location 0x78 */
|
||||
#define HP_SDC_CMD_READ_KBC 0xf9 /* Load from i8042 RAM location 0x79 */
|
||||
#define HP_SDC_CMD_READ_LPS 0xfa /* Load from i8042 RAM location 0x7a */
|
||||
#define HP_SDC_CMD_READ_LPC 0xfb /* Load from i8042 RAM location 0x7b */
|
||||
#define HP_SDC_CMD_READ_RSV 0xfc /* Load from i8042 RAM location 0x7c */
|
||||
#define HP_SDC_CMD_READ_LPR 0xfd /* Load from i8042 RAM location 0x7d */
|
||||
#define HP_SDC_CMD_READ_XTD 0xfe /* Load from i8042 RAM location 0x7e */
|
||||
#define HP_SDC_CMD_READ_STR 0xff /* Load from i8042 RAM location 0x7f */
|
||||
|
||||
#define HP_SDC_CMD_SET_ARD 0xA0 /* Set emulated autorepeat delay */
|
||||
#define HP_SDC_CMD_SET_ARR 0xA2 /* Set emulated autorepeat rate */
|
||||
#define HP_SDC_CMD_SET_BELL 0xA3 /* Set voice 3 params for "beep" cmd */
|
||||
#define HP_SDC_CMD_SET_RPGR 0xA6 /* Set "RPG" irq rate (doesn't work) */
|
||||
#define HP_SDC_CMD_SET_RTMS 0xAD /* Set the RTC time (milliseconds) */
|
||||
#define HP_SDC_CMD_SET_RTD 0xAF /* Set the RTC time (days) */
|
||||
#define HP_SDC_CMD_SET_FHS 0xB2 /* Set fast handshake timer */
|
||||
#define HP_SDC_CMD_SET_MT 0xB4 /* Set match timer */
|
||||
#define HP_SDC_CMD_SET_DT 0xB7 /* Set delay timer */
|
||||
#define HP_SDC_CMD_SET_CT 0xBA /* Set cycle timer */
|
||||
#define HP_SDC_CMD_SET_RAMP 0xC1 /* Reset READ_RAM autoinc counter */
|
||||
#define HP_SDC_CMD_SET_D0 0xe0 /* Load to i8042 RAM location 0x70 */
|
||||
#define HP_SDC_CMD_SET_D1 0xe1 /* Load to i8042 RAM location 0x71 */
|
||||
#define HP_SDC_CMD_SET_D2 0xe2 /* Load to i8042 RAM location 0x72 */
|
||||
#define HP_SDC_CMD_SET_D3 0xe3 /* Load to i8042 RAM location 0x73 */
|
||||
#define HP_SDC_CMD_SET_VT1 0xe4 /* Load to i8042 RAM location 0x74 */
|
||||
#define HP_SDC_CMD_SET_VT2 0xe5 /* Load to i8042 RAM location 0x75 */
|
||||
#define HP_SDC_CMD_SET_VT3 0xe6 /* Load to i8042 RAM location 0x76 */
|
||||
#define HP_SDC_CMD_SET_VT4 0xe7 /* Load to i8042 RAM location 0x77 */
|
||||
#define HP_SDC_CMD_SET_KBN 0xe8 /* Load to i8042 RAM location 0x78 */
|
||||
#define HP_SDC_CMD_SET_KBC 0xe9 /* Load to i8042 RAM location 0x79 */
|
||||
#define HP_SDC_CMD_SET_LPS 0xea /* Load to i8042 RAM location 0x7a */
|
||||
#define HP_SDC_CMD_SET_LPC 0xeb /* Load to i8042 RAM location 0x7b */
|
||||
#define HP_SDC_CMD_SET_RSV 0xec /* Load to i8042 RAM location 0x7c */
|
||||
#define HP_SDC_CMD_SET_LPR 0xed /* Load to i8042 RAM location 0x7d */
|
||||
#define HP_SDC_CMD_SET_XTD 0xee /* Load to i8042 RAM location 0x7e */
|
||||
#define HP_SDC_CMD_SET_STR 0xef /* Load to i8042 RAM location 0x7f */
|
||||
|
||||
#define HP_SDC_CMD_DO_RTCW 0xc2 /* i8042 RAM 0x70 --> RTC */
|
||||
#define HP_SDC_CMD_DO_RTCR 0xc3 /* RTC[0x70 0:3] --> irq/status/data */
|
||||
#define HP_SDC_CMD_DO_BEEP 0xc4 /* i8042 RAM 0x70-74 --> beeper,VT3 */
|
||||
#define HP_SDC_CMD_DO_HIL 0xc5 /* i8042 RAM 0x70-73 -->
|
||||
HIL MLC R0,R1 i8042 HIL watchdog */
|
||||
|
||||
/* Values used to (de)mangle input/output to/from the HIL MLC */
|
||||
#define HP_SDC_DATA 0x40 /* Data from an 8042 register */
|
||||
#define HP_SDC_HIL_CMD 0x50 /* Data from HIL MLC R1/8042 */
|
||||
#define HP_SDC_HIL_R1MASK 0x0f /* Contents of HIL MLC R1 0:3 */
|
||||
#define HP_SDC_HIL_AUTO 0x10 /* Set if POL results from i8042 */
|
||||
#define HP_SDC_HIL_ISERR 0x80 /* Has meaning as in next 4 values */
|
||||
#define HP_SDC_HIL_RC_DONE 0x80 /* i8042 auto-configured loop */
|
||||
#define HP_SDC_HIL_ERR 0x81 /* HIL MLC R2 had a bit set */
|
||||
#define HP_SDC_HIL_TO 0x82 /* i8042 HIL watchdog expired */
|
||||
#define HP_SDC_HIL_RC 0x84 /* i8042 is auto-configuring loop */
|
||||
#define HP_SDC_HIL_DAT 0x60 /* Data from HIL MLC R0 */
|
||||
|
||||
|
||||
typedef struct {
|
||||
rwlock_t ibf_lock;
|
||||
rwlock_t lock; /* user/tasklet lock */
|
||||
rwlock_t rtq_lock; /* isr/tasklet lock */
|
||||
rwlock_t hook_lock; /* isr/user lock for handler add/del */
|
||||
|
||||
unsigned int irq, nmi; /* Our IRQ lines */
|
||||
unsigned long base_io, status_io, data_io; /* Our IO ports */
|
||||
|
||||
uint8_t im; /* Interrupt mask */
|
||||
int set_im; /* Interrupt mask needs to be set. */
|
||||
|
||||
int ibf; /* Last known status of IBF flag */
|
||||
uint8_t wi; /* current i8042 write index */
|
||||
uint8_t r7[4]; /* current i8042[0x70 - 0x74] values */
|
||||
uint8_t r11, r7e; /* Values from version/revision regs */
|
||||
|
||||
hp_sdc_irqhook *timer, *reg, *hil, *pup, *cooked;
|
||||
|
||||
#define HP_SDC_QUEUE_LEN 16
|
||||
hp_sdc_transaction *tq[HP_SDC_QUEUE_LEN]; /* All pending read/writes */
|
||||
|
||||
int rcurr, rqty; /* Current read transact in process */
|
||||
struct timeval rtv; /* Time when current read started */
|
||||
int wcurr; /* Current write transact in process */
|
||||
|
||||
int dev_err; /* carries status from registration */
|
||||
#if defined(__hppa__)
|
||||
struct parisc_device *dev;
|
||||
#elif defined(__mc68000__)
|
||||
void *dev;
|
||||
#else
|
||||
#error No support for device registration on this arch yet.
|
||||
#endif
|
||||
|
||||
struct timer_list kicker; /* Keeps below task alive */
|
||||
struct tasklet_struct task;
|
||||
|
||||
} hp_i8042_sdc;
|
||||
|
||||
#endif /* _LINUX_HP_SDC_H */
|
|
@ -21,8 +21,6 @@
|
|||
/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
|
||||
Frodo Looijaard <frodol@dds.nl> */
|
||||
|
||||
/* $Id: i2c-algo-bit.h,v 1.10 2003/01/21 08:08:16 kmalkki Exp $ */
|
||||
|
||||
#ifndef _LINUX_I2C_ALGO_BIT_H
|
||||
#define _LINUX_I2C_ALGO_BIT_H
|
||||
|
||||
|
@ -46,8 +44,6 @@ struct i2c_algo_bit_data {
|
|||
int timeout; /* in jiffies */
|
||||
};
|
||||
|
||||
#define I2C_BIT_ADAP_MAX 16
|
||||
|
||||
int i2c_bit_add_bus(struct i2c_adapter *);
|
||||
int i2c_bit_del_bus(struct i2c_adapter *);
|
||||
|
||||
|
|
|
@ -9,8 +9,6 @@ struct i2c_algo_pca_data {
|
|||
int (*wait_for_interrupt) (struct i2c_algo_pca_data *adap);
|
||||
};
|
||||
|
||||
#define I2C_PCA_ADAP_MAX 16
|
||||
|
||||
int i2c_pca_add_bus(struct i2c_adapter *);
|
||||
int i2c_pca_del_bus(struct i2c_adapter *);
|
||||
|
||||
|
|
|
@ -22,8 +22,6 @@
|
|||
/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
|
||||
Frodo Looijaard <frodol@dds.nl> */
|
||||
|
||||
/* $Id: i2c-algo-pcf.h,v 1.8 2003/01/21 08:08:16 kmalkki Exp $ */
|
||||
|
||||
#ifndef _LINUX_I2C_ALGO_PCF_H
|
||||
#define _LINUX_I2C_ALGO_PCF_H
|
||||
|
||||
|
@ -41,8 +39,6 @@ struct i2c_algo_pcf_data {
|
|||
int timeout;
|
||||
};
|
||||
|
||||
#define I2C_PCF_ADAP_MAX 16
|
||||
|
||||
int i2c_pcf_add_bus(struct i2c_adapter *);
|
||||
int i2c_pcf_del_bus(struct i2c_adapter *);
|
||||
|
||||
|
|
|
@ -19,8 +19,6 @@
|
|||
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
/* $Id: i2c-dev.h,v 1.13 2003/01/21 08:08:16 kmalkki Exp $ */
|
||||
|
||||
#ifndef _LINUX_I2C_DEV_H
|
||||
#define _LINUX_I2C_DEV_H
|
||||
|
||||
|
|
|
@ -164,10 +164,7 @@
|
|||
|
||||
/* --- Bit algorithm adapters */
|
||||
#define I2C_HW_B_LP 0x010000 /* Parallel port Philips style */
|
||||
#define I2C_HW_B_LPC 0x010001 /* Parallel port control reg. */
|
||||
#define I2C_HW_B_SER 0x010002 /* Serial line interface */
|
||||
#define I2C_HW_B_ELV 0x010003 /* ELV Card */
|
||||
#define I2C_HW_B_VELLE 0x010004 /* Vellemann K8000 */
|
||||
#define I2C_HW_B_BT848 0x010005 /* BT848 video boards */
|
||||
#define I2C_HW_B_WNV 0x010006 /* Winnov Videums */
|
||||
#define I2C_HW_B_VIA 0x010007 /* Via vt82c586b */
|
||||
|
|
|
@ -23,14 +23,13 @@
|
|||
/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
|
||||
Frodo Looijaard <frodol@dds.nl> */
|
||||
|
||||
/* $Id: i2c.h,v 1.68 2003/01/21 08:08:16 kmalkki Exp $ */
|
||||
|
||||
#ifndef _LINUX_I2C_H
|
||||
#define _LINUX_I2C_H
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/i2c-id.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/device.h> /* for struct device */
|
||||
#include <asm/semaphore.h>
|
||||
|
||||
|
@ -94,10 +93,10 @@ extern s32 i2c_smbus_write_byte_data(struct i2c_client * client,
|
|||
extern s32 i2c_smbus_read_word_data(struct i2c_client * client, u8 command);
|
||||
extern s32 i2c_smbus_write_word_data(struct i2c_client * client,
|
||||
u8 command, u16 value);
|
||||
/* Returns the number of bytes transferred */
|
||||
extern s32 i2c_smbus_write_block_data(struct i2c_client * client,
|
||||
u8 command, u8 length,
|
||||
u8 *values);
|
||||
/* Returns the number of read bytes */
|
||||
extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client,
|
||||
u8 command, u8 *values);
|
||||
|
||||
|
@ -391,10 +390,6 @@ struct i2c_msg {
|
|||
#define I2C_FUNC_10BIT_ADDR 0x00000002
|
||||
#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */
|
||||
#define I2C_FUNC_SMBUS_HWPEC_CALC 0x00000008 /* SMBus 2.0 */
|
||||
#define I2C_FUNC_SMBUS_READ_WORD_DATA_PEC 0x00000800 /* SMBus 2.0 */
|
||||
#define I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC 0x00001000 /* SMBus 2.0 */
|
||||
#define I2C_FUNC_SMBUS_PROC_CALL_PEC 0x00002000 /* SMBus 2.0 */
|
||||
#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL_PEC 0x00004000 /* SMBus 2.0 */
|
||||
#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */
|
||||
#define I2C_FUNC_SMBUS_QUICK 0x00010000
|
||||
#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
|
||||
|
@ -410,8 +405,6 @@ struct i2c_msg {
|
|||
#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
|
||||
#define I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 0x10000000 /* I2C-like block xfer */
|
||||
#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2 0x20000000 /* w/ 2-byte reg. addr. */
|
||||
#define I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC 0x40000000 /* SMBus 2.0 */
|
||||
#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC 0x80000000 /* SMBus 2.0 */
|
||||
|
||||
#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
|
||||
I2C_FUNC_SMBUS_WRITE_BYTE)
|
||||
|
@ -425,17 +418,6 @@ struct i2c_msg {
|
|||
I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
|
||||
#define I2C_FUNC_SMBUS_I2C_BLOCK_2 (I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 | \
|
||||
I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2)
|
||||
#define I2C_FUNC_SMBUS_BLOCK_DATA_PEC (I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC | \
|
||||
I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC)
|
||||
#define I2C_FUNC_SMBUS_WORD_DATA_PEC (I2C_FUNC_SMBUS_READ_WORD_DATA_PEC | \
|
||||
I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC)
|
||||
|
||||
#define I2C_FUNC_SMBUS_READ_BYTE_PEC I2C_FUNC_SMBUS_READ_BYTE_DATA
|
||||
#define I2C_FUNC_SMBUS_WRITE_BYTE_PEC I2C_FUNC_SMBUS_WRITE_BYTE_DATA
|
||||
#define I2C_FUNC_SMBUS_READ_BYTE_DATA_PEC I2C_FUNC_SMBUS_READ_WORD_DATA
|
||||
#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA_PEC I2C_FUNC_SMBUS_WRITE_WORD_DATA
|
||||
#define I2C_FUNC_SMBUS_BYTE_PEC I2C_FUNC_SMBUS_BYTE_DATA
|
||||
#define I2C_FUNC_SMBUS_BYTE_DATA_PEC I2C_FUNC_SMBUS_WORD_DATA
|
||||
|
||||
#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \
|
||||
I2C_FUNC_SMBUS_BYTE | \
|
||||
|
@ -443,20 +425,17 @@ struct i2c_msg {
|
|||
I2C_FUNC_SMBUS_WORD_DATA | \
|
||||
I2C_FUNC_SMBUS_PROC_CALL | \
|
||||
I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
|
||||
I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC | \
|
||||
I2C_FUNC_SMBUS_I2C_BLOCK)
|
||||
|
||||
/*
|
||||
* Data for SMBus Messages
|
||||
*/
|
||||
#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */
|
||||
#define I2C_SMBUS_I2C_BLOCK_MAX 32 /* Not specified but we use same structure */
|
||||
union i2c_smbus_data {
|
||||
__u8 byte;
|
||||
__u16 word;
|
||||
__u8 block[I2C_SMBUS_BLOCK_MAX + 3]; /* block[0] is used for length */
|
||||
/* one more for read length in block process call */
|
||||
/* and one more for PEC */
|
||||
__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
|
||||
/* and one more for user-space compatibility */
|
||||
};
|
||||
|
||||
/* smbus_access read or write markers */
|
||||
|
@ -473,10 +452,6 @@ union i2c_smbus_data {
|
|||
#define I2C_SMBUS_BLOCK_DATA 5
|
||||
#define I2C_SMBUS_I2C_BLOCK_DATA 6
|
||||
#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */
|
||||
#define I2C_SMBUS_BLOCK_DATA_PEC 8 /* SMBus 2.0 */
|
||||
#define I2C_SMBUS_PROC_CALL_PEC 9 /* SMBus 2.0 */
|
||||
#define I2C_SMBUS_BLOCK_PROC_CALL_PEC 10 /* SMBus 2.0 */
|
||||
#define I2C_SMBUS_WORD_DATA_PEC 11 /* SMBus 2.0 */
|
||||
|
||||
|
||||
/* ----- commands for the ioctl like i2c_command call:
|
||||
|
@ -506,11 +481,6 @@ union i2c_smbus_data {
|
|||
|
||||
#define I2C_SMBUS 0x0720 /* SMBus-level access */
|
||||
|
||||
/* ... algo-bit.c recognizes */
|
||||
#define I2C_UDELAY 0x0705 /* set delay in microsecs between each */
|
||||
/* written byte (except address) */
|
||||
#define I2C_MDELAY 0x0706 /* millisec delay between written bytes */
|
||||
|
||||
/* ----- I2C-DEV: char device interface stuff ------------------------- */
|
||||
|
||||
#define I2C_MAJOR 89 /* Device major number */
|
||||
|
|
|
@ -66,8 +66,6 @@ struct i2o_device {
|
|||
struct device device;
|
||||
|
||||
struct semaphore lock; /* device lock */
|
||||
|
||||
struct class_device classdev; /* i2o device class */
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -194,7 +192,7 @@ struct i2o_controller {
|
|||
struct resource mem_resource; /* Mem resource allocated to the IOP */
|
||||
|
||||
struct device device;
|
||||
struct class_device classdev; /* I2O controller class */
|
||||
struct class_device *classdev; /* I2O controller class device */
|
||||
struct i2o_device *exec; /* Executive */
|
||||
#if BITS_PER_LONG == 64
|
||||
spinlock_t context_list_lock; /* lock for context_list */
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
#ifdef __KERNEL__
|
||||
#include <linux/time.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/device.h>
|
||||
#else
|
||||
#include <sys/time.h>
|
||||
#include <sys/ioctl.h>
|
||||
|
@ -644,6 +645,7 @@ struct input_absinfo {
|
|||
#define BUS_ADB 0x17
|
||||
#define BUS_I2C 0x18
|
||||
#define BUS_HOST 0x19
|
||||
#define BUS_GSC 0x1A
|
||||
|
||||
/*
|
||||
* Values describing the status of an effect
|
||||
|
@ -889,11 +891,15 @@ struct input_dev {
|
|||
struct semaphore sem; /* serializes open and close operations */
|
||||
unsigned int users;
|
||||
|
||||
struct device *dev;
|
||||
struct class_device cdev;
|
||||
struct device *dev; /* will be removed soon */
|
||||
|
||||
int dynalloc; /* temporarily */
|
||||
|
||||
struct list_head h_list;
|
||||
struct list_head node;
|
||||
};
|
||||
#define to_input_dev(d) container_of(d, struct input_dev, cdev)
|
||||
|
||||
/*
|
||||
* Structure for hotplug & device<->driver matching.
|
||||
|
@ -984,6 +990,23 @@ static inline void init_input_dev(struct input_dev *dev)
|
|||
INIT_LIST_HEAD(&dev->node);
|
||||
}
|
||||
|
||||
struct input_dev *input_allocate_device(void);
|
||||
|
||||
static inline void input_free_device(struct input_dev *dev)
|
||||
{
|
||||
kfree(dev);
|
||||
}
|
||||
|
||||
static inline struct input_dev *input_get_device(struct input_dev *dev)
|
||||
{
|
||||
return to_input_dev(class_device_get(&dev->cdev));
|
||||
}
|
||||
|
||||
static inline void input_put_device(struct input_dev *dev)
|
||||
{
|
||||
class_device_put(&dev->cdev);
|
||||
}
|
||||
|
||||
void input_register_device(struct input_dev *);
|
||||
void input_unregister_device(struct input_dev *);
|
||||
|
||||
|
@ -1052,7 +1075,7 @@ static inline void input_set_abs_params(struct input_dev *dev, int axis, int min
|
|||
dev->absbit[LONG(axis)] |= BIT(axis);
|
||||
}
|
||||
|
||||
extern struct class *input_class;
|
||||
extern struct class input_class;
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -50,7 +50,7 @@ struct mmc_command {
|
|||
#define MMC_ERR_INVALID 5
|
||||
|
||||
struct mmc_data *data; /* data segment associated with cmd */
|
||||
struct mmc_request *mrq; /* assoicated request */
|
||||
struct mmc_request *mrq; /* associated request */
|
||||
};
|
||||
|
||||
struct mmc_data {
|
||||
|
@ -68,7 +68,7 @@ struct mmc_data {
|
|||
unsigned int bytes_xfered;
|
||||
|
||||
struct mmc_command *stop; /* stop command */
|
||||
struct mmc_request *mrq; /* assoicated request */
|
||||
struct mmc_request *mrq; /* associated request */
|
||||
|
||||
unsigned int sg_len; /* size of scatter list */
|
||||
struct scatterlist *sg; /* I/O scatter list */
|
||||
|
|
|
@ -244,4 +244,9 @@ struct pcmcia_device_id {
|
|||
#define PCMCIA_DEV_ID_MATCH_FAKE_CIS 0x0200
|
||||
#define PCMCIA_DEV_ID_MATCH_ANONYMOUS 0x0400
|
||||
|
||||
/* I2C */
|
||||
struct i2c_device_id {
|
||||
__u16 id;
|
||||
};
|
||||
|
||||
#endif /* LINUX_MOD_DEVICETABLE_H */
|
||||
|
|
|
@ -308,6 +308,7 @@ struct net_device
|
|||
#define NETIF_F_VLAN_CHALLENGED 1024 /* Device cannot handle VLAN packets */
|
||||
#define NETIF_F_TSO 2048 /* Can offload TCP/IP segmentation */
|
||||
#define NETIF_F_LLTX 4096 /* LockLess TX */
|
||||
#define NETIF_F_UFO 8192 /* Can offload UDP Large Send*/
|
||||
|
||||
struct net_device *next_sched;
|
||||
|
||||
|
|
|
@ -219,7 +219,9 @@ typedef struct pm_message {
|
|||
|
||||
struct dev_pm_info {
|
||||
pm_message_t power_state;
|
||||
unsigned can_wakeup:1;
|
||||
#ifdef CONFIG_PM
|
||||
unsigned should_wakeup:1;
|
||||
pm_message_t prev_state;
|
||||
void * saved_state;
|
||||
atomic_t pm_users;
|
||||
|
@ -236,13 +238,35 @@ extern void device_resume(void);
|
|||
|
||||
#ifdef CONFIG_PM
|
||||
extern int device_suspend(pm_message_t state);
|
||||
#else
|
||||
|
||||
#define device_set_wakeup_enable(dev,val) \
|
||||
((dev)->power.should_wakeup = !!(val))
|
||||
#define device_may_wakeup(dev) \
|
||||
(device_can_wakeup(dev) && (dev)->power.should_wakeup)
|
||||
|
||||
#else /* !CONFIG_PM */
|
||||
|
||||
static inline int device_suspend(pm_message_t state)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define device_set_wakeup_enable(dev,val) do{}while(0)
|
||||
#define device_may_wakeup(dev) (0)
|
||||
|
||||
#endif
|
||||
|
||||
/* changes to device_may_wakeup take effect on the next pm state change.
|
||||
* by default, devices should wakeup if they can.
|
||||
*/
|
||||
#define device_can_wakeup(dev) \
|
||||
((dev)->power.can_wakeup)
|
||||
#define device_init_wakeup(dev,val) \
|
||||
do { \
|
||||
device_can_wakeup(dev) = !!(val); \
|
||||
device_set_wakeup_enable(dev,val); \
|
||||
} while(0)
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _LINUX_PM_H */
|
||||
|
|
|
@ -137,6 +137,8 @@ struct skb_shared_info {
|
|||
unsigned int nr_frags;
|
||||
unsigned short tso_size;
|
||||
unsigned short tso_segs;
|
||||
unsigned short ufo_size;
|
||||
unsigned int ip6_frag_id;
|
||||
struct sk_buff *frag_list;
|
||||
skb_frag_t frags[MAX_SKB_FRAGS];
|
||||
};
|
||||
|
@ -341,6 +343,11 @@ extern void skb_over_panic(struct sk_buff *skb, int len,
|
|||
extern void skb_under_panic(struct sk_buff *skb, int len,
|
||||
void *here);
|
||||
|
||||
extern int skb_append_datato_frags(struct sock *sk, struct sk_buff *skb,
|
||||
int getfrag(void *from, char *to, int offset,
|
||||
int len,int odd, struct sk_buff *skb),
|
||||
void *from, int length);
|
||||
|
||||
struct skb_seq_state
|
||||
{
|
||||
__u32 lower_offset;
|
||||
|
|
31
include/linux/x1205.h
Normal file
31
include/linux/x1205.h
Normal file
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* x1205.h - defines for drivers/i2c/chips/x1205.c
|
||||
* Copyright 2004 Karen Spearel
|
||||
* Copyright 2005 Alessandro Zummo
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_X1205_H__
|
||||
#define __LINUX_X1205_H__
|
||||
|
||||
/* commands */
|
||||
|
||||
#define X1205_CMD_GETDATETIME 0
|
||||
#define X1205_CMD_SETTIME 1
|
||||
#define X1205_CMD_SETDATETIME 2
|
||||
#define X1205_CMD_GETALARM 3
|
||||
#define X1205_CMD_SETALARM 4
|
||||
#define X1205_CMD_GETDTRIM 5
|
||||
#define X1205_CMD_SETDTRIM 6
|
||||
#define X1205_CMD_GETATRIM 7
|
||||
#define X1205_CMD_SETATRIM 8
|
||||
|
||||
extern int x1205_do_command(unsigned int cmd, void *arg);
|
||||
extern int x1205_direct_attach(int adapter_id,
|
||||
struct i2c_client_address_data *address_data);
|
||||
|
||||
#endif /* __LINUX_X1205_H__ */
|
Loading…
Add table
Add a link
Reference in a new issue