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First round of pin control fixes for v3.14:

Browse source 
- Protect pinctrl_list_add() with the proper mutex. This
   was identified by RedHat. Caused nasty locking warnings
   was rootcased by Stanislaw Gruszka.
 
 - Avoid adding dangerous debugfs files when either half of
   the subsystem is unused: pinmux or pinconf.
 
 - Various fixes to various drivers: locking, hardware
   particulars, DT parsing, error codes.
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Merge tag 'pinctrl-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl fixes from Linus Walleij:
 "First round of pin control fixes for v3.14:

   - Protect pinctrl_list_add() with the proper mutex.  This was
     identified by RedHat.  Caused nasty locking warnings was rootcased
     by Stanislaw Gruszka.

   - Avoid adding dangerous debugfs files when either half of the
     subsystem is unused: pinmux or pinconf.

   - Various fixes to various drivers: locking, hardware particulars, DT
     parsing, error codes"

* tag 'pinctrl-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: tegra: return correct error type
  pinctrl: do not init debugfs entries for unimplemented functionalities
  pinctrl: protect pinctrl_list add
  pinctrl: sirf: correct the pin index of ac97_pins group
  pinctrl: imx27: fix offset calculation in imx_read_2bit
  pinctrl: vt8500: Change devicetree data parsing
  pinctrl: imx27: fix wrong offset to ICONFB
  pinctrl: at91: use locked variant of irq_set_handler
This commit is contained in:
Linus Torvalds 2014-02-08 14:31:39 -08:00
commit 494479038d
6 changed files with 32 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

4
drivers/pinctrl/core.c
View file

@ -851,7 +851,9 @@ static struct pinctrl *create_pinctrl(struct device *dev)
kref_init(&p->users); kref_init(&p->users);
/* Add the pinctrl handle to the global list */ /* Add the pinctrl handle to the global list */
mutex_lock(&pinctrl_list_mutex);
list_add_tail(&p->node, &pinctrl_list); list_add_tail(&p->node, &pinctrl_list);
mutex_unlock(&pinctrl_list_mutex);
return p; return p;
} }
@ -1642,7 +1644,9 @@ static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
device_root, pctldev, &pinctrl_groups_ops); device_root, pctldev, &pinctrl_groups_ops);
debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO,
device_root, pctldev, &pinctrl_gpioranges_ops); device_root, pctldev, &pinctrl_gpioranges_ops);
if (pctldev->desc->pmxops)
pinmux_init_device_debugfs(device_root, pctldev); pinmux_init_device_debugfs(device_root, pctldev);
if (pctldev->desc->confops)
pinconf_init_device_debugfs(device_root, pctldev); pinconf_init_device_debugfs(device_root, pctldev);
} }

10
drivers/pinctrl/pinctrl-at91.c
View file

@ -1286,22 +1286,22 @@ static int alt_gpio_irq_type(struct irq_data *d, unsigned type)
switch (type) { switch (type) {
case IRQ_TYPE_EDGE_RISING: case IRQ_TYPE_EDGE_RISING:
irq_set_handler(d->irq, handle_simple_irq); __irq_set_handler_locked(d->irq, handle_simple_irq);
writel_relaxed(mask, pio + PIO_ESR); writel_relaxed(mask, pio + PIO_ESR);
writel_relaxed(mask, pio + PIO_REHLSR); writel_relaxed(mask, pio + PIO_REHLSR);
break; break;
case IRQ_TYPE_EDGE_FALLING: case IRQ_TYPE_EDGE_FALLING:
irq_set_handler(d->irq, handle_simple_irq); __irq_set_handler_locked(d->irq, handle_simple_irq);
writel_relaxed(mask, pio + PIO_ESR); writel_relaxed(mask, pio + PIO_ESR);
writel_relaxed(mask, pio + PIO_FELLSR); writel_relaxed(mask, pio + PIO_FELLSR);
break; break;
case IRQ_TYPE_LEVEL_LOW: case IRQ_TYPE_LEVEL_LOW:
irq_set_handler(d->irq, handle_level_irq); __irq_set_handler_locked(d->irq, handle_level_irq);
writel_relaxed(mask, pio + PIO_LSR); writel_relaxed(mask, pio + PIO_LSR);
writel_relaxed(mask, pio + PIO_FELLSR); writel_relaxed(mask, pio + PIO_FELLSR);
break; break;
case IRQ_TYPE_LEVEL_HIGH: case IRQ_TYPE_LEVEL_HIGH:
irq_set_handler(d->irq, handle_level_irq); __irq_set_handler_locked(d->irq, handle_level_irq);
writel_relaxed(mask, pio + PIO_LSR); writel_relaxed(mask, pio + PIO_LSR);
writel_relaxed(mask, pio + PIO_REHLSR); writel_relaxed(mask, pio + PIO_REHLSR);
break; break;
@ -1310,7 +1310,7 @@ static int alt_gpio_irq_type(struct irq_data *d, unsigned type)
* disable additional interrupt modes: * disable additional interrupt modes:
* fall back to default behavior * fall back to default behavior
*/ */
irq_set_handler(d->irq, handle_simple_irq); __irq_set_handler_locked(d->irq, handle_simple_irq);
writel_relaxed(mask, pio + PIO_AIMDR); writel_relaxed(mask, pio + PIO_AIMDR);
return 0; return 0;
case IRQ_TYPE_NONE: case IRQ_TYPE_NONE:

10
drivers/pinctrl/pinctrl-imx1-core.c
View file

@ -45,7 +45,7 @@ struct imx1_pinctrl {
#define MX1_DDIR 0x00 #define MX1_DDIR 0x00
#define MX1_OCR 0x04 #define MX1_OCR 0x04
#define MX1_ICONFA 0x0c #define MX1_ICONFA 0x0c
#define MX1_ICONFB 0x10 #define MX1_ICONFB 0x14
#define MX1_GIUS 0x20 #define MX1_GIUS 0x20
#define MX1_GPR 0x38 #define MX1_GPR 0x38
#define MX1_PUEN 0x40 #define MX1_PUEN 0x40
@ -97,13 +97,13 @@ static void imx1_write_2bit(struct imx1_pinctrl *ipctl, unsigned int pin_id,
u32 old_val; u32 old_val;
u32 new_val; u32 new_val;
dev_dbg(ipctl->dev, "write: register 0x%p offset %d value 0x%x\n",
reg, offset, value);
/* Use the next register if the pin's port pin number is >=16 */ /* Use the next register if the pin's port pin number is >=16 */
if (pin_id % 32 >= 16) if (pin_id % 32 >= 16)
reg += 0x04; reg += 0x04;
dev_dbg(ipctl->dev, "write: register 0x%p offset %d value 0x%x\n",
reg, offset, value);
/* Get current state of pins */ /* Get current state of pins */
old_val = readl(reg); old_val = readl(reg);
old_val &= mask; old_val &= mask;
@ -139,7 +139,7 @@ static int imx1_read_2bit(struct imx1_pinctrl *ipctl, unsigned int pin_id,
u32 reg_offset) u32 reg_offset)
{ {
void __iomem *reg = imx1_mem(ipctl, pin_id) + reg_offset; void __iomem *reg = imx1_mem(ipctl, pin_id) + reg_offset;
int offset = pin_id % 16; int offset = (pin_id % 16) * 2;
/* Use the next register if the pin's port pin number is >=16 */ /* Use the next register if the pin's port pin number is >=16 */
if (pin_id % 32 >= 16) if (pin_id % 32 >= 16)

2
drivers/pinctrl/pinctrl-tegra.c
View file

@ -645,7 +645,7 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
GFP_KERNEL); GFP_KERNEL);
if (!pmx->regs) { if (!pmx->regs) {
dev_err(&pdev->dev, "Can't alloc regs pointer\n"); dev_err(&pdev->dev, "Can't alloc regs pointer\n");
return -ENODEV; return -ENOMEM;
} }
for (i = 0; i < pmx->nbanks; i++) { for (i = 0; i < pmx->nbanks; i++) {

2
drivers/pinctrl/sirf/pinctrl-prima2.c
View file

@ -413,7 +413,7 @@ static const struct sirfsoc_padmux ac97_padmux = {
.funcval = 0, .funcval = 0,
}; };
static const unsigned ac97_pins[] = { 33, 34, 35, 36 }; static const unsigned ac97_pins[] = { 43, 44, 45, 46 };
static const struct sirfsoc_muxmask spi1_muxmask[] = { static const struct sirfsoc_muxmask spi1_muxmask[] = {
{ {

15
drivers/pinctrl/vt8500/pinctrl-wmt.c
View file

@ -276,7 +276,20 @@ static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data,
if (!configs) if (!configs)
return -ENOMEM; return -ENOMEM;
configs[0] = pull; switch (pull) {
case 0:
configs[0] = PIN_CONFIG_BIAS_DISABLE;
break;
case 1:
configs[0] = PIN_CONFIG_BIAS_PULL_DOWN;
break;
case 2:
configs[0] = PIN_CONFIG_BIAS_PULL_UP;
break;
default:
configs[0] = PIN_CONFIG_BIAS_DISABLE;
dev_err(data->dev, "invalid pull state %d - disabling\n", pull);
}
map->type = PIN_MAP_TYPE_CONFIGS_PIN; map->type = PIN_MAP_TYPE_CONFIGS_PIN;
map->data.configs.group_or_pin = data->groups[group]; map->data.configs.group_or_pin = data->groups[group];