GPIO: gpio-dwapb: Enable platform driver binding to MFD driver
The Synopsys DesignWare APB GPIO driver only supports open firmware devices. But, like Intel Quark X1000 SOC, which has a single PCI function exporting a GPIO and an I2C controller, it is a Multifunction device. This patch is to enable the current Synopsys DesignWare APB GPIO driver to support the Multifunction device which exports the designware GPIO controller. Reviewed-by: Hock Leong Kweh <hock.leong.kweh@intel.com> Signed-off-by: Weike Chen <alvin.chen@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Weike Chen
Linus Walleij
parent
e1db1706c8
commit
3d2613c428
3 changed files with 199 additions and 58 deletions
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@ -136,7 +136,6 @@ config GPIO_DWAPB
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tristate "Synopsys DesignWare APB GPIO driver"
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select GPIO_GENERIC
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select GENERIC_IRQ_CHIP
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depends on OF_GPIO
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help
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Say Y or M here to build support for the Synopsys DesignWare APB
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GPIO block.
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@ -21,6 +21,8 @@
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/platform_data/gpio-dwapb.h>
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#include <linux/slab.h>
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#define GPIO_SWPORTA_DR 0x00
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#define GPIO_SWPORTA_DDR 0x04
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@ -84,11 +86,10 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs)
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writel(v, gpio->regs + GPIO_INT_POLARITY);
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}
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static void dwapb_irq_handler(u32 irq, struct irq_desc *desc)
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static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
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{
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struct dwapb_gpio *gpio = irq_get_handler_data(irq);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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u32 irq_status = readl_relaxed(gpio->regs + GPIO_INTSTATUS);
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u32 ret = irq_status;
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while (irq_status) {
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int hwirq = fls(irq_status) - 1;
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@ -102,6 +103,16 @@ static void dwapb_irq_handler(u32 irq, struct irq_desc *desc)
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dwapb_toggle_trigger(gpio, hwirq);
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}
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return ret;
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}
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static void dwapb_irq_handler(u32 irq, struct irq_desc *desc)
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{
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struct dwapb_gpio *gpio = irq_get_handler_data(irq);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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dwapb_do_irq(gpio);
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if (chip->irq_eoi)
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chip->irq_eoi(irq_desc_get_irq_data(desc));
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}
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@ -207,22 +218,26 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
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return 0;
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}
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static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id)
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{
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u32 worked;
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struct dwapb_gpio *gpio = dev_id;
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worked = dwapb_do_irq(gpio);
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return worked ? IRQ_HANDLED : IRQ_NONE;
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}
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static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
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struct dwapb_gpio_port *port)
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struct dwapb_gpio_port *port,
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struct dwapb_port_property *pp)
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{
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struct gpio_chip *gc = &port->bgc.gc;
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struct device_node *node = gc->of_node;
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struct irq_chip_generic *irq_gc;
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struct device_node *node = pp->node;
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struct irq_chip_generic *irq_gc = NULL;
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unsigned int hwirq, ngpio = gc->ngpio;
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struct irq_chip_type *ct;
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int err, irq, i;
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irq = irq_of_parse_and_map(node, 0);
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if (!irq) {
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dev_warn(gpio->dev, "no irq for bank %s\n",
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port->bgc.gc.of_node->full_name);
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return;
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}
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int err, i;
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gpio->domain = irq_domain_add_linear(node, ngpio,
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&irq_generic_chip_ops, gpio);
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@ -269,8 +284,24 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
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irq_gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH;
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irq_gc->chip_types[1].handler = handle_edge_irq;
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irq_set_chained_handler(irq, dwapb_irq_handler);
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irq_set_handler_data(irq, gpio);
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if (!pp->irq_shared) {
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irq_set_chained_handler(pp->irq, dwapb_irq_handler);
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irq_set_handler_data(pp->irq, gpio);
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} else {
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/*
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* Request a shared IRQ since where MFD would have devices
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* using the same irq pin
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*/
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err = devm_request_irq(gpio->dev, pp->irq,
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dwapb_irq_handler_mfd,
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IRQF_SHARED, "gpio-dwapb-mfd", gpio);
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if (err) {
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dev_err(gpio->dev, "error requesting IRQ\n");
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irq_domain_remove(gpio->domain);
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gpio->domain = NULL;
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return;
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}
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}
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for (hwirq = 0 ; hwirq < ngpio ; hwirq++)
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irq_create_mapping(gpio->domain, hwirq);
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@ -296,57 +327,42 @@ static void dwapb_irq_teardown(struct dwapb_gpio *gpio)
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}
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static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
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struct device_node *port_np,
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struct dwapb_port_property *pp,
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unsigned int offs)
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{
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struct dwapb_gpio_port *port;
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u32 port_idx, ngpio;
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void __iomem *dat, *set, *dirout;
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int err;
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if (of_property_read_u32(port_np, "reg", &port_idx) ||
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port_idx >= DWAPB_MAX_PORTS) {
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dev_err(gpio->dev, "missing/invalid port index for %s\n",
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port_np->full_name);
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return -EINVAL;
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}
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port = &gpio->ports[offs];
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port->gpio = gpio;
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if (of_property_read_u32(port_np, "snps,nr-gpios", &ngpio)) {
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dev_info(gpio->dev, "failed to get number of gpios for %s\n",
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port_np->full_name);
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ngpio = 32;
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}
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dat = gpio->regs + GPIO_EXT_PORTA + (port_idx * GPIO_EXT_PORT_SIZE);
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set = gpio->regs + GPIO_SWPORTA_DR + (port_idx * GPIO_SWPORT_DR_SIZE);
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dat = gpio->regs + GPIO_EXT_PORTA + (pp->idx * GPIO_EXT_PORT_SIZE);
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set = gpio->regs + GPIO_SWPORTA_DR + (pp->idx * GPIO_SWPORT_DR_SIZE);
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dirout = gpio->regs + GPIO_SWPORTA_DDR +
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(port_idx * GPIO_SWPORT_DDR_SIZE);
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(pp->idx * GPIO_SWPORT_DDR_SIZE);
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err = bgpio_init(&port->bgc, gpio->dev, 4, dat, set, NULL, dirout,
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NULL, false);
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if (err) {
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dev_err(gpio->dev, "failed to init gpio chip for %s\n",
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port_np->full_name);
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pp->name);
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return err;
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}
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port->bgc.gc.ngpio = ngpio;
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port->bgc.gc.of_node = port_np;
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#ifdef CONFIG_OF_GPIO
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port->bgc.gc.of_node = pp->node;
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#endif
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port->bgc.gc.ngpio = pp->ngpio;
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port->bgc.gc.base = pp->gpio_base;
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/*
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* Only port A can provide interrupts in all configurations of the IP.
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*/
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if (port_idx == 0 &&
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of_property_read_bool(port_np, "interrupt-controller"))
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dwapb_configure_irqs(gpio, port);
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if (pp->irq)
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dwapb_configure_irqs(gpio, port, pp);
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err = gpiochip_add(&port->bgc.gc);
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if (err)
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dev_err(gpio->dev, "failed to register gpiochip for %s\n",
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port_np->full_name);
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pp->name);
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else
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port->is_registered = true;
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@ -362,25 +378,116 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
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gpiochip_remove(&gpio->ports[m].bgc.gc);
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}
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static struct dwapb_platform_data *
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dwapb_gpio_get_pdata_of(struct device *dev)
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{
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struct device_node *node, *port_np;
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struct dwapb_platform_data *pdata;
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struct dwapb_port_property *pp;
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int nports;
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int i;
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node = dev->of_node;
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if (!IS_ENABLED(CONFIG_OF_GPIO) || !node)
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return ERR_PTR(-ENODEV);
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nports = of_get_child_count(node);
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if (nports == 0)
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return ERR_PTR(-ENODEV);
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pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return ERR_PTR(-ENOMEM);
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pdata->properties = kcalloc(nports, sizeof(*pp), GFP_KERNEL);
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if (!pdata->properties) {
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kfree(pdata);
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return ERR_PTR(-ENOMEM);
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}
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pdata->nports = nports;
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i = 0;
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for_each_child_of_node(node, port_np) {
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pp = &pdata->properties[i++];
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pp->node = port_np;
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if (of_property_read_u32(port_np, "reg", &pp->idx) ||
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pp->idx >= DWAPB_MAX_PORTS) {
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dev_err(dev, "missing/invalid port index for %s\n",
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port_np->full_name);
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kfree(pdata->properties);
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kfree(pdata);
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return ERR_PTR(-EINVAL);
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}
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if (of_property_read_u32(port_np, "snps,nr-gpios",
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&pp->ngpio)) {
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dev_info(dev, "failed to get number of gpios for %s\n",
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port_np->full_name);
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pp->ngpio = 32;
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}
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/*
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* Only port A can provide interrupts in all configurations of
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* the IP.
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*/
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if (pp->idx == 0 &&
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of_property_read_bool(port_np, "interrupt-controller")) {
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pp->irq = irq_of_parse_and_map(port_np, 0);
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if (!pp->irq) {
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dev_warn(dev, "no irq for bank %s\n",
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port_np->full_name);
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}
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}
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pp->irq_shared = false;
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pp->gpio_base = -1;
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pp->name = port_np->full_name;
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}
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return pdata;
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}
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static inline void dwapb_free_pdata_of(struct dwapb_platform_data *pdata)
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{
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if (!IS_ENABLED(CONFIG_OF_GPIO) || !pdata)
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return;
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kfree(pdata->properties);
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kfree(pdata);
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}
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static int dwapb_gpio_probe(struct platform_device *pdev)
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{
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unsigned int i;
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struct resource *res;
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struct dwapb_gpio *gpio;
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struct device_node *np;
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int err;
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unsigned int offs = 0;
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struct device *dev = &pdev->dev;
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struct dwapb_platform_data *pdata = dev_get_platdata(dev);
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bool is_pdata_alloc = !pdata;
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gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
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if (!gpio)
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return -ENOMEM;
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gpio->dev = &pdev->dev;
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if (is_pdata_alloc) {
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pdata = dwapb_gpio_get_pdata_of(dev);
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if (IS_ERR(pdata))
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return PTR_ERR(pdata);
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}
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gpio->nr_ports = of_get_child_count(pdev->dev.of_node);
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if (!gpio->nr_ports) {
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err = -EINVAL;
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if (!pdata->nports) {
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err = -ENODEV;
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goto out_err;
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}
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gpio->ports = devm_kzalloc(&pdev->dev, gpio->nr_ports *
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gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
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if (!gpio) {
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err = -ENOMEM;
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goto out_err;
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}
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gpio->dev = &pdev->dev;
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gpio->nr_ports = pdata->nports;
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gpio->ports = devm_kcalloc(&pdev->dev, gpio->nr_ports,
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sizeof(*gpio->ports), GFP_KERNEL);
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if (!gpio->ports) {
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err = -ENOMEM;
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@ -394,20 +501,23 @@ static int dwapb_gpio_probe(struct platform_device *pdev)
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goto out_err;
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}
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for_each_child_of_node(pdev->dev.of_node, np) {
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err = dwapb_gpio_add_port(gpio, np, offs++);
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for (i = 0; i < gpio->nr_ports; i++) {
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err = dwapb_gpio_add_port(gpio, &pdata->properties[i], i);
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if (err)
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goto out_unregister;
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}
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platform_set_drvdata(pdev, gpio);
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return 0;
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goto out_err;
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out_unregister:
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dwapb_gpio_unregister(gpio);
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dwapb_irq_teardown(gpio);
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out_err:
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if (is_pdata_alloc)
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dwapb_free_pdata_of(pdata);
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return err;
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}
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32
include/linux/platform_data/gpio-dwapb.h
Normal file
32
include/linux/platform_data/gpio-dwapb.h
Normal file
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@ -0,0 +1,32 @@
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/*
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* Copyright(c) 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef GPIO_DW_APB_H
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#define GPIO_DW_APB_H
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struct dwapb_port_property {
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struct device_node *node;
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const char *name;
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unsigned int idx;
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unsigned int ngpio;
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unsigned int gpio_base;
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unsigned int irq;
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bool irq_shared;
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};
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struct dwapb_platform_data {
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struct dwapb_port_property *properties;
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unsigned int nports;
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};
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#endif
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