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soc: fixes for 6.13, part 3

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A few last minute fixes:
 
  - two driver fixes for samsung/google platforms, both addressing
    mistakes in changes from the 6.15 merge window
 
  - a revert for an allwinner devicetree change that caused problems
 
  - a fix for an older regression with the LEDs on Marvell Armada 3720
 
  - a defconfig change to enable chacha20 again after a crypto
    subsystem change in 6.15 inadventently turned it off
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Merge tag 'soc-fixes-6.15-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
 "A few last minute fixes:

   - two driver fixes for samsung/google platforms, both addressing
     mistakes in changes from the 6.15 merge window

   - a revert for an allwinner devicetree change that caused problems

   - a fix for an older regression with the LEDs on Marvell Armada 3720

   - a defconfig change to enable chacha20 again after a crypto
     subsystem change in 6.15 inadventently turned it off"

* tag 'soc-fixes-6.15-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: defconfig: Ensure CRYPTO_CHACHA20_NEON is selected
  arm64: dts: marvell: uDPU: define pinctrl state for alarm LEDs
  Revert "arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection"
  soc: samsung: usi: prevent wrong bits inversion during unconfiguring
  firmware: exynos-acpm: check saved RX before bailing out on empty RX queue
This commit is contained in:
Linus Torvalds 2025-05-23 08:04:13 -07:00
commit 3d0ebc36b0
7 changed files with 75 additions and 55 deletions
Download patch file Download diff file Expand all files Collapse all files

38
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
View file

@ -152,28 +152,12 @@
vcc-pg-supply = <&reg_aldo1>;
};
&r_ir {
linux,rc-map-name = "rc-beelink-gs1";
status = "okay";
};
&r_pio {
/*
* FIXME: We can't add that supply for now since it would
* create a circular dependency between pinctrl, the regulator
* and the RSB Bus.
*
* vcc-pl-supply = <&reg_aldo1>;
*/
vcc-pm-supply = <&reg_aldo1>;
};
&r_rsb {
&r_i2c {
status = "okay";
axp805: pmic@745 {
axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
reg = <0x745>;
reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@ -291,6 +275,22 @@
};
};
&r_ir {
linux,rc-map-name = "rc-beelink-gs1";
status = "okay";
};
&r_pio {
/*
* PL0 and PL1 are used for PMIC I2C
* don't enable the pl-supply else
* it will fail at boot
*
* vcc-pl-supply = <&reg_aldo1>;
*/
vcc-pm-supply = <&reg_aldo1>;
};
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx_pin>;

14
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
View file

@ -176,16 +176,12 @@
vcc-pg-supply = <&reg_vcc_wifi_io>;
};
&r_ir {
status = "okay";
};
&r_rsb {
&r_i2c {
status = "okay";
axp805: pmic@745 {
axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
reg = <0x745>;
reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@ -296,6 +292,10 @@
};
};
&r_ir {
status = "okay";
};
&rtc {
clocks = <&ext_osc32k>;
};

22
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
View file

@ -113,20 +113,12 @@
vcc-pg-supply = <&reg_aldo1>;
};
&r_ir {
status = "okay";
};
&r_pio {
vcc-pm-supply = <&reg_bldo3>;
};
&r_rsb {
&r_i2c {
status = "okay";
axp805: pmic@745 {
axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
reg = <0x745>;
reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@ -241,6 +233,14 @@
};
};
&r_ir {
status = "okay";
};
&r_pio {
vcc-pm-supply = <&reg_bldo3>;
};
&rtc {
clocks = <&ext_osc32k>;
};

8
arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi
View file

@ -26,6 +26,8 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
led-power1 {
label = "udpu:green:power";
@ -82,8 +84,6 @@
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
flash@0 {
compatible = "jedec,spi-nor";
@ -108,6 +108,10 @@
};
};
&spi_quad_pins {
function = "gpio";
};
&pinctrl_nb {
i2c2_recovery_pins: i2c2-recovery-pins {
groups = "i2c2";

2
arch/arm64/configs/defconfig
View file

@ -1729,12 +1729,12 @@ CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_SECURITY=y
CONFIG_CRYPTO_USER=y
CONFIG_CRYPTO_CHACHA20=m
CONFIG_CRYPTO_TEST=m
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_CHACHA20_NEON=m
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y

44
drivers/firmware/samsung/exynos-acpm.c
View file

@ -184,6 +184,29 @@ struct acpm_match_data {
#define client_to_acpm_chan(c) container_of(c, struct acpm_chan, cl)
#define handle_to_acpm_info(h) container_of(h, struct acpm_info, handle)
/**
* acpm_get_saved_rx() - get the response if it was already saved.
* @achan: ACPM channel info.
* @xfer: reference to the transfer to get response for.
* @tx_seqnum: xfer TX sequence number.
*/
static void acpm_get_saved_rx(struct acpm_chan *achan,
const struct acpm_xfer *xfer, u32 tx_seqnum)
{
const struct acpm_rx_data *rx_data = &achan->rx_data[tx_seqnum - 1];
u32 rx_seqnum;
if (!rx_data->response)
return;
rx_seqnum = FIELD_GET(ACPM_PROTOCOL_SEQNUM, rx_data->cmd[0]);
if (rx_seqnum == tx_seqnum) {
memcpy(xfer->rxd, rx_data->cmd, xfer->rxlen);
clear_bit(rx_seqnum - 1, achan->bitmap_seqnum);
}
}
/**
* acpm_get_rx() - get response from RX queue.
* @achan: ACPM channel info.
@ -204,15 +227,16 @@ static int acpm_get_rx(struct acpm_chan *achan, const struct acpm_xfer *xfer)
rx_front = readl(achan->rx.front);
i = readl(achan->rx.rear);
/* Bail out if RX is empty. */
if (i == rx_front)
tx_seqnum = FIELD_GET(ACPM_PROTOCOL_SEQNUM, xfer->txd[0]);
if (i == rx_front) {
acpm_get_saved_rx(achan, xfer, tx_seqnum);
return 0;
}
base = achan->rx.base;
mlen = achan->mlen;
tx_seqnum = FIELD_GET(ACPM_PROTOCOL_SEQNUM, xfer->txd[0]);
/* Drain RX queue. */
do {
/* Read RX seqnum. */
@ -259,16 +283,8 @@ static int acpm_get_rx(struct acpm_chan *achan, const struct acpm_xfer *xfer)
* If the response was not in this iteration of the queue, check if the
* RX data was previously saved.
*/
rx_data = &achan->rx_data[tx_seqnum - 1];
if (!rx_set && rx_data->response) {
rx_seqnum = FIELD_GET(ACPM_PROTOCOL_SEQNUM,
rx_data->cmd[0]);
if (rx_seqnum == tx_seqnum) {
memcpy(xfer->rxd, rx_data->cmd, xfer->rxlen);
clear_bit(rx_seqnum - 1, achan->bitmap_seqnum);
}
}
if (!rx_set)
acpm_get_saved_rx(achan, xfer, tx_seqnum);
return 0;
}

2
drivers/soc/samsung/exynos-usi.c
View file

@ -233,7 +233,7 @@ static void exynos_usi_unconfigure(void *data)
/* Make sure that we've stopped providing the clock to USI IP */
val = readl(usi->regs + USI_OPTION);
val &= ~USI_OPTION_CLKREQ_ON;
val |= ~USI_OPTION_CLKSTOP_ON;
val |= USI_OPTION_CLKSTOP_ON;
writel(val, usi->regs + USI_OPTION);
/* Set USI block state to reset */