The i.MX clock updates for 4.4:

- A couple of fixes on i.MX31 and i.MX35 clock initialization functions
    which makes mxc_timer_init() currently be called twice for DT boot.
  - Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
    design target.
  - Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
    Vybrid, and SPDIF_GCLK for i.MX6.
  - A series from Lucas to fix early debug UART clock setup.  This is
    currently a one-off fix for i.MX platform, and can be extended to
    become a generic solution later.
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Merge tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next

Pull i.MX updates from Shawn Guo:

"The i.MX clock updates for 4.4:
 - A couple of fixes on i.MX31 and i.MX35 clock initialization functions
   which makes mxc_timer_init() currently be called twice for DT boot.
 - Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
   design target.
 - Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
   Vybrid, and SPDIF_GCLK for i.MX6.
 - A series from Lucas to fix early debug UART clock setup.  This is
   currently a one-off fix for i.MX platform, and can be extended to
   become a generic solution later."

* tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx6: Add SPDIF_GCLK clock in clock tree
  clk: imx7d: add ADC root clock
  clk: imx31: Do not call mxc_timer_init twice when booting with DT
  clk: imx7d: retain early UART clocks during kernel init
  clk: imx6: retain early UART clocks during kernel init
  clk: imx5: retain early UART clocks during kernel init
  clk: imx35: retain early UART clocks during kernel init
  clk: imx31: retain early UART clocks during kernel init
  clk: imx27: retain early UART clocks during kernel init
  clk: imx25: retain early UART clocks during kernel init
  clk: imx: add common logic to detect early UART usage
  clk: imx35: Do not call mxc_timer_init twice when booting with DT
  clk: clk-vf610: Add clock for Vybrid OCOTP controller
  clk: imx: increase AXI clock rate to 264MHz for i.MX6UL

include/dt-bindings/clock/imx6qdl-clock.h

@@ -254,6 +254,7 @@
 #define IMX6QDL_CLK_CAAM_MEM			241
 #define IMX6QDL_CLK_CAAM_ACLK			242
 #define IMX6QDL_CLK_CAAM_IPG			243
-#define IMX6QDL_CLK_END				244
+#define IMX6QDL_CLK_SPDIF_GCLK			244
+#define IMX6QDL_CLK_END				245
 
 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */

include/dt-bindings/clock/imx6sl-clock.h

@@ -174,6 +174,7 @@
 #define IMX6SL_CLK_SSI1_IPG		161
 #define IMX6SL_CLK_SSI2_IPG		162
 #define IMX6SL_CLK_SSI3_IPG		163
-#define IMX6SL_CLK_END			164
+#define IMX6SL_CLK_SPDIF_GCLK		164
+#define IMX6SL_CLK_END			165
 
 #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */

include/dt-bindings/clock/imx6sx-clock.h

@@ -274,6 +274,7 @@
 #define IMX6SX_PLL5_BYPASS		261
 #define IMX6SX_PLL6_BYPASS		262
 #define IMX6SX_PLL7_BYPASS		263
-#define IMX6SX_CLK_CLK_END		264
+#define IMX6SX_CLK_SPDIF_GCLK		264
+#define IMX6SX_CLK_CLK_END		265
 
 #endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */

include/dt-bindings/clock/imx7d-clock.h

@@ -446,5 +446,6 @@
 #define IMX7D_MU_ROOT_CLK		433
 #define IMX7D_SEMA4_HS_ROOT_CLK		434
 #define IMX7D_PLL_DRAM_TEST_DIV		435
-#define IMX7D_CLK_END			436
+#define IMX7D_ADC_ROOT_CLK		436
+#define IMX7D_CLK_END			437
 #endif /* __DT_BINDINGS_CLOCK_IMX7D_H */

include/dt-bindings/clock/vf610-clock.h

@@ -194,6 +194,7 @@
 #define VF610_PLL7_BYPASS		181
 #define VF610_CLK_SNVS			182
 #define VF610_CLK_DAP			183
-#define VF610_CLK_END			184
+#define VF610_CLK_OCOTP         184
+#define VF610_CLK_END			185
 
 #endif /* __DT_BINDINGS_CLOCK_VF610_H */