KVM: x86: Fix CR3 reserved bits
According to Intel specifications, PAE and non-PAE does not have any reserved bits. In long-mode, regardless to PCIDE, only the high bits (above the physical address) are reserved. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
This commit is contained in:
parent
671bd9934a
commit
346874c950
3 changed files with 6 additions and 29 deletions
|
@ -3388,10 +3388,6 @@ static int check_cr_write(struct x86_emulate_ctxt *ctxt)
|
|||
ctxt->ops->get_msr(ctxt, MSR_EFER, &efer);
|
||||
if (efer & EFER_LMA)
|
||||
rsvd = CR3_L_MODE_RESERVED_BITS;
|
||||
else if (ctxt->ops->get_cr(ctxt, 4) & X86_CR4_PAE)
|
||||
rsvd = CR3_PAE_RESERVED_BITS;
|
||||
else if (ctxt->ops->get_cr(ctxt, 0) & X86_CR0_PG)
|
||||
rsvd = CR3_NONPAE_RESERVED_BITS;
|
||||
|
||||
if (new_val & rsvd)
|
||||
return emulate_gp(ctxt, 0);
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue