Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media updates from Mauro Carvalho Chehab: "This series contains: - Exynos s5p-mfc driver got support for VP8 encoder - Some SoC drivers gained support for asynchronous registration (needed for DT) - The RC subsystem gained support for RC activity LED; - New drivers added: a video decoder(adv7842), a video encoder (adv7511), a new GSPCA driver (stk1135) and support for Renesas R-Car (vsp1) - the first SDR kernel driver: mirics msi3101. Due to some troubles with the driver, and because the API is still under discussion, it will be merged at staging for 3.12. Need to rework on it - usual new boards additions, fixes, cleanups and driver improvements" * 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (242 commits) [media] cx88: Fix regression: CX88_AUDIO_WM8775 can't be 0 [media] exynos4-is: Fix entity unregistration on error path [media] exynos-gsc: Register v4l2 device [media] exynos4-is: Fix fimc-lite bayer formats [media] em28xx: fix assignment of the eeprom data [media] hdpvr: fix iteration over uninitialized lists in hdpvr_probe() [media] usbtv: Throw corrupted frames away [media] usbtv: Fix deinterlacing [media] v4l2: added missing mutex.h include to v4l2-ctrls.h [media] DocBook: upgrade media_api DocBook version to 4.2 [media] ml86v7667: fix compile warning: 'ret' set but not used [media] s5p-g2d: Fix registration failure [media] media: coda: Fix DT driver data pointer for i.MX27 [media] s5p-mfc: Fix input/output format reporting [media] v4l: vsp1: Fix mutex double lock at streamon time [media] v4l: vsp1: Add support for RT clock [media] v4l: vsp1: Initialize media device bus_info field [media] davinci: vpif_capture: fix error return code in vpif_probe() [media] davinci: vpif_display: fix error return code in vpif_probe() [media] MAINTAINERS: add entries for adv7511 and adv7842 ...
This commit is contained in:
commit
27c053aa8d
216 changed files with 18975 additions and 2649 deletions
48
Documentation/devicetree/bindings/media/i2c/adv7343.txt
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48
Documentation/devicetree/bindings/media/i2c/adv7343.txt
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* Analog Devices adv7343 video encoder
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The ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP
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package. Six high speed, 3.3 V, 11-bit video DACs provide support for composite
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(CVBS), S-Video (Y-C), and component (YPrPb/RGB) analog outputs in standard
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definition (SD), enhanced definition (ED), or high definition (HD) video
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formats.
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Required Properties :
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- compatible: Must be "adi,adv7343"
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Optional Properties :
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- adi,power-mode-sleep-mode: on enable the current consumption is reduced to
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micro ampere level. All DACs and the internal PLL
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circuit are disabled.
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- adi,power-mode-pll-ctrl: PLL and oversampling control. This control allows
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internal PLL 1 circuit to be powered down and the
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oversampling to be switched off.
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- ad,adv7343-power-mode-dac: array configuring the power on/off DAC's 1..6,
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0 = OFF and 1 = ON, Default value when this
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property is not specified is <0 0 0 0 0 0>.
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- ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF
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and 1 = ON, Default value when this property is
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not specified is <0 0>.
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Example:
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i2c0@1c22000 {
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...
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...
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adv7343@2a {
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compatible = "adi,adv7343";
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reg = <0x2a>;
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port {
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adv7343_1: endpoint {
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adi,power-mode-sleep-mode;
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adi,power-mode-pll-ctrl;
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/* Use DAC1..3, DAC6 */
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adi,dac-enable = <1 1 1 0 0 1>;
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/* Use SD DAC output 1 */
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adi,sd-dac-enable = <1 0>;
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};
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};
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};
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...
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};
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19
Documentation/devicetree/bindings/media/i2c/ths8200.txt
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Documentation/devicetree/bindings/media/i2c/ths8200.txt
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* Texas Instruments THS8200 video encoder
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The ths8200 device is a digital to analog converter used in DVD players, video
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recorders, set-top boxes.
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Required Properties :
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- compatible : value must be "ti,ths8200"
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Example:
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i2c0@1c22000 {
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...
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...
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ths8200@5c {
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compatible = "ti,ths8200";
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reg = <0x5c>;
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};
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...
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};
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53
Documentation/devicetree/bindings/media/i2c/tvp7002.txt
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53
Documentation/devicetree/bindings/media/i2c/tvp7002.txt
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* Texas Instruments TV7002 video decoder
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The TVP7002 device supports digitizing of video and graphics signal in RGB and
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YPbPr color space.
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Required Properties :
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- compatible : Must be "ti,tvp7002"
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Optional Properties:
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- hsync-active: HSYNC Polarity configuration for the bus. Default value when
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this property is not specified is <0>.
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- vsync-active: VSYNC Polarity configuration for the bus. Default value when
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this property is not specified is <0>.
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- pclk-sample: Clock polarity of the bus. Default value when this property is
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not specified is <0>.
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- sync-on-green-active: Active state of Sync-on-green signal property of the
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endpoint.
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0 = Normal Operation (Active Low, Default)
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1 = Inverted operation
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- field-even-active: Active-high Field ID output polarity control of the bus.
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Under normal operation, the field ID output is set to logic 1 for an odd field
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(field 1) and set to logic 0 for an even field (field 0).
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0 = Normal Operation (Active Low, Default)
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1 = FID output polarity inverted
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For further reading of port node refer Documentation/devicetree/bindings/media/
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video-interfaces.txt.
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Example:
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i2c0@1c22000 {
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...
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...
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tvp7002@5c {
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compatible = "ti,tvp7002";
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reg = <0x5c>;
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port {
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tvp7002_1: endpoint {
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hsync-active = <1>;
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vsync-active = <1>;
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pclk-sample = <0>;
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sync-on-green-active = <1>;
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field-even-active = <0>;
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};
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};
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};
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...
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};
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@ -10,6 +10,7 @@ Required properties:
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- compatible : value should be either one among the following
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(a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
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(b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
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(b) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
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- reg : Physical base address of the IP registers and length of memory
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mapped region.
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@ -88,6 +88,8 @@ Optional endpoint properties
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- field-even-active: field signal level during the even field data transmission.
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- pclk-sample: sample data on rising (1) or falling (0) edge of the pixel clock
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signal.
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- sync-on-green-active: active state of Sync-on-green (SoG) signal, 0/1 for
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LOW/HIGH respectively.
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- data-lanes: an array of physical data lane indexes. Position of an entry
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determines the logical lane number, while the value of an entry indicates
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physical lane, e.g. for 2-lane MIPI CSI-2 bus we could have
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