KVM: optimize apic interrupt delivery
Most interrupt are delivered to only one vcpu. Use pre-build tables to find interrupt destination instead of looping through all vcpus. In case of logical mode loop only through vcpus in a logical cluster irq is sent to. Signed-off-by: Gleb Natapov <gleb@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Gleb Natapov
Avi Kivity
parent
1d86b5cc4c
commit
1e08ec4a13
5 changed files with 199 additions and 13 deletions
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@ -525,6 +525,16 @@ struct kvm_arch_memory_slot {
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struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
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};
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struct kvm_apic_map {
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struct rcu_head rcu;
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u8 ldr_bits;
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/* fields bellow are used to decode ldr values in different modes */
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u32 cid_shift, cid_mask, lid_mask;
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struct kvm_lapic *phys_map[256];
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/* first index is cluster id second is cpu id in a cluster */
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struct kvm_lapic *logical_map[16][16];
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};
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struct kvm_arch {
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unsigned int n_used_mmu_pages;
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unsigned int n_requested_mmu_pages;
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@ -542,6 +552,8 @@ struct kvm_arch {
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struct kvm_ioapic *vioapic;
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struct kvm_pit *vpit;
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int vapics_in_nmi_mode;
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struct mutex apic_map_lock;
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struct kvm_apic_map *apic_map;
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unsigned int tss_addr;
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struct page *apic_access_page;
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@ -140,11 +140,110 @@ static inline int apic_enabled(struct kvm_lapic *apic)
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(LVT_MASK | APIC_MODE_MASK | APIC_INPUT_POLARITY | \
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APIC_LVT_REMOTE_IRR | APIC_LVT_LEVEL_TRIGGER)
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static inline int apic_x2apic_mode(struct kvm_lapic *apic)
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{
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return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
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}
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static inline int kvm_apic_id(struct kvm_lapic *apic)
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{
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return (kvm_apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
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}
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static inline u16 apic_cluster_id(struct kvm_apic_map *map, u32 ldr)
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{
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u16 cid;
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ldr >>= 32 - map->ldr_bits;
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cid = (ldr >> map->cid_shift) & map->cid_mask;
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BUG_ON(cid >= ARRAY_SIZE(map->logical_map));
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return cid;
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}
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static inline u16 apic_logical_id(struct kvm_apic_map *map, u32 ldr)
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{
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ldr >>= (32 - map->ldr_bits);
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return ldr & map->lid_mask;
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}
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static void recalculate_apic_map(struct kvm *kvm)
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{
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struct kvm_apic_map *new, *old = NULL;
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struct kvm_vcpu *vcpu;
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int i;
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new = kzalloc(sizeof(struct kvm_apic_map), GFP_KERNEL);
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mutex_lock(&kvm->arch.apic_map_lock);
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if (!new)
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goto out;
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new->ldr_bits = 8;
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/* flat mode is default */
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new->cid_shift = 8;
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new->cid_mask = 0;
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new->lid_mask = 0xff;
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kvm_for_each_vcpu(i, vcpu, kvm) {
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struct kvm_lapic *apic = vcpu->arch.apic;
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u16 cid, lid;
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u32 ldr;
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if (!kvm_apic_present(vcpu))
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continue;
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/*
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* All APICs have to be configured in the same mode by an OS.
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* We take advatage of this while building logical id loockup
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* table. After reset APICs are in xapic/flat mode, so if we
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* find apic with different setting we assume this is the mode
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* OS wants all apics to be in; build lookup table accordingly.
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*/
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if (apic_x2apic_mode(apic)) {
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new->ldr_bits = 32;
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new->cid_shift = 16;
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new->cid_mask = new->lid_mask = 0xffff;
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} else if (kvm_apic_sw_enabled(apic) &&
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!new->cid_mask /* flat mode */ &&
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kvm_apic_get_reg(apic, APIC_DFR) == APIC_DFR_CLUSTER) {
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new->cid_shift = 4;
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new->cid_mask = 0xf;
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new->lid_mask = 0xf;
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}
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new->phys_map[kvm_apic_id(apic)] = apic;
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ldr = kvm_apic_get_reg(apic, APIC_LDR);
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cid = apic_cluster_id(new, ldr);
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lid = apic_logical_id(new, ldr);
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if (lid)
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new->logical_map[cid][ffs(lid) - 1] = apic;
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}
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out:
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old = rcu_dereference_protected(kvm->arch.apic_map,
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lockdep_is_held(&kvm->arch.apic_map_lock));
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rcu_assign_pointer(kvm->arch.apic_map, new);
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mutex_unlock(&kvm->arch.apic_map_lock);
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if (old)
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kfree_rcu(old, rcu);
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}
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static inline void kvm_apic_set_id(struct kvm_lapic *apic, u8 id)
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{
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apic_set_reg(apic, APIC_ID, id << 24);
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recalculate_apic_map(apic->vcpu->kvm);
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}
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static inline void kvm_apic_set_ldr(struct kvm_lapic *apic, u32 id)
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{
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apic_set_reg(apic, APIC_LDR, id);
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recalculate_apic_map(apic->vcpu->kvm);
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}
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static inline int apic_lvt_enabled(struct kvm_lapic *apic, int lvt_type)
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{
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return !(kvm_apic_get_reg(apic, lvt_type) & APIC_LVT_MASKED);
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@ -194,11 +293,6 @@ void kvm_apic_set_version(struct kvm_vcpu *vcpu)
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apic_set_reg(apic, APIC_LVR, v);
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}
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static inline int apic_x2apic_mode(struct kvm_lapic *apic)
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{
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return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
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}
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static const unsigned int apic_lvt_mask[APIC_LVT_NUM] = {
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LVT_MASK , /* part LVTT mask, timer mode mask added at runtime */
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LVT_MASK | APIC_MODE_MASK, /* LVTTHMR */
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@ -483,6 +577,72 @@ int kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
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return result;
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}
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bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
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struct kvm_lapic_irq *irq, int *r)
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{
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struct kvm_apic_map *map;
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unsigned long bitmap = 1;
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struct kvm_lapic **dst;
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int i;
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bool ret = false;
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*r = -1;
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if (irq->shorthand == APIC_DEST_SELF) {
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*r = kvm_apic_set_irq(src->vcpu, irq);
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return true;
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}
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if (irq->shorthand)
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return false;
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rcu_read_lock();
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map = rcu_dereference(kvm->arch.apic_map);
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if (!map)
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goto out;
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if (irq->dest_mode == 0) { /* physical mode */
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if (irq->delivery_mode == APIC_DM_LOWEST ||
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irq->dest_id == 0xff)
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goto out;
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dst = &map->phys_map[irq->dest_id & 0xff];
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} else {
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u32 mda = irq->dest_id << (32 - map->ldr_bits);
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dst = map->logical_map[apic_cluster_id(map, mda)];
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bitmap = apic_logical_id(map, mda);
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if (irq->delivery_mode == APIC_DM_LOWEST) {
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int l = -1;
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for_each_set_bit(i, &bitmap, 16) {
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if (!dst[i])
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continue;
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if (l < 0)
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l = i;
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else if (kvm_apic_compare_prio(dst[i]->vcpu, dst[l]->vcpu) < 0)
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l = i;
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}
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bitmap = (l >= 0) ? 1 << l : 0;
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}
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}
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for_each_set_bit(i, &bitmap, 16) {
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if (!dst[i])
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continue;
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if (*r < 0)
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*r = 0;
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*r += kvm_apic_set_irq(dst[i]->vcpu, irq);
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}
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ret = true;
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out:
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rcu_read_unlock();
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return ret;
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}
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/*
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* Add a pending IRQ into lapic.
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* Return 1 if successfully added and 0 if discarded.
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@ -886,7 +1046,7 @@ static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
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switch (reg) {
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case APIC_ID: /* Local APIC ID */
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if (!apic_x2apic_mode(apic))
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apic_set_reg(apic, APIC_ID, val);
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kvm_apic_set_id(apic, val >> 24);
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else
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ret = 1;
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break;
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@ -902,15 +1062,16 @@ static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
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case APIC_LDR:
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if (!apic_x2apic_mode(apic))
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apic_set_reg(apic, APIC_LDR, val & APIC_LDR_MASK);
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kvm_apic_set_ldr(apic, val & APIC_LDR_MASK);
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else
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ret = 1;
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break;
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case APIC_DFR:
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if (!apic_x2apic_mode(apic))
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if (!apic_x2apic_mode(apic)) {
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apic_set_reg(apic, APIC_DFR, val | 0x0FFFFFFF);
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else
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recalculate_apic_map(apic->vcpu->kvm);
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} else
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ret = 1;
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break;
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@ -1141,6 +1302,7 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value)
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static_key_slow_dec_deferred(&apic_hw_disabled);
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else
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static_key_slow_inc(&apic_hw_disabled.key);
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recalculate_apic_map(vcpu->kvm);
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}
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if (!kvm_vcpu_is_bsp(apic->vcpu))
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@ -1150,7 +1312,7 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value)
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if (apic_x2apic_mode(apic)) {
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u32 id = kvm_apic_id(apic);
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u32 ldr = ((id & ~0xf) << 16) | (1 << (id & 0xf));
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apic_set_reg(apic, APIC_LDR, ldr);
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kvm_apic_set_ldr(apic, ldr);
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}
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apic->base_address = apic->vcpu->arch.apic_base &
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MSR_IA32_APICBASE_BASE;
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@ -1175,7 +1337,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
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/* Stop the timer in case it's a reset to an active apic */
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hrtimer_cancel(&apic->lapic_timer.timer);
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apic_set_reg(apic, APIC_ID, vcpu->vcpu_id << 24);
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kvm_apic_set_id(apic, vcpu->vcpu_id);
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kvm_apic_set_version(apic->vcpu);
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for (i = 0; i < APIC_LVT_NUM; i++)
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@ -1186,7 +1348,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
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apic_set_reg(apic, APIC_DFR, 0xffffffffU);
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apic_set_spiv(apic, 0xff);
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apic_set_reg(apic, APIC_TASKPRI, 0);
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apic_set_reg(apic, APIC_LDR, 0);
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kvm_apic_set_ldr(apic, 0);
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apic_set_reg(apic, APIC_ESR, 0);
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apic_set_reg(apic, APIC_ICR, 0);
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apic_set_reg(apic, APIC_ICR2, 0);
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@ -1404,6 +1566,8 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
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/* set SPIV separately to get count of SW disabled APICs right */
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apic_set_spiv(apic, *((u32 *)(s->regs + APIC_SPIV)));
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memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
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/* call kvm_apic_set_id() to put apic into apic_map */
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kvm_apic_set_id(apic, kvm_apic_id(apic));
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kvm_apic_set_version(vcpu);
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apic_update_ppr(apic);
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@ -52,6 +52,9 @@ int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
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int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq);
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int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
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bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
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struct kvm_lapic_irq *irq, int *r);
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u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
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void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
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void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
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@ -6270,6 +6270,7 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
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set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
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raw_spin_lock_init(&kvm->arch.tsc_write_lock);
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mutex_init(&kvm->arch.apic_map_lock);
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return 0;
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}
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@ -6322,6 +6323,7 @@ void kvm_arch_destroy_vm(struct kvm *kvm)
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put_page(kvm->arch.apic_access_page);
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if (kvm->arch.ept_identity_pagetable)
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put_page(kvm->arch.ept_identity_pagetable);
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kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
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}
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void kvm_arch_free_memslot(struct kvm_memory_slot *free,
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@ -68,8 +68,13 @@ int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
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struct kvm_vcpu *vcpu, *lowest = NULL;
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if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
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kvm_is_dm_lowest_prio(irq))
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kvm_is_dm_lowest_prio(irq)) {
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printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
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irq->delivery_mode = APIC_DM_FIXED;
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}
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if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r))
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return r;
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kvm_for_each_vcpu(i, vcpu, kvm) {
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if (!kvm_apic_present(vcpu))
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