fm10k: Add interrupt support
This patch set adds interrupt support for the fm10k interfaces. The interfaces themselves only support MSI-X, so neither MSI or legacy interrupts are used. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Alexander Duyck
Jeff Kirsher
parent
504c5eac1d
commit
18283cad0a
4 changed files with 973 additions and 0 deletions
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@ -66,3 +66,404 @@ static void __exit fm10k_exit_module(void)
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fm10k_unregister_pci_driver();
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}
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module_exit(fm10k_exit_module);
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/**
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* fm10k_update_itr - update the dynamic ITR value based on packet size
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*
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* Stores a new ITR value based on strictly on packet size. The
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* divisors and thresholds used by this function were determined based
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* on theoretical maximum wire speed and testing data, in order to
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* minimize response time while increasing bulk throughput.
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*
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* @ring_container: Container for rings to have ITR updated
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**/
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static void fm10k_update_itr(struct fm10k_ring_container *ring_container)
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{
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unsigned int avg_wire_size, packets;
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/* Only update ITR if we are using adaptive setting */
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if (!(ring_container->itr & FM10K_ITR_ADAPTIVE))
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goto clear_counts;
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packets = ring_container->total_packets;
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if (!packets)
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goto clear_counts;
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avg_wire_size = ring_container->total_bytes / packets;
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/* Add 24 bytes to size to account for CRC, preamble, and gap */
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avg_wire_size += 24;
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/* Don't starve jumbo frames */
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if (avg_wire_size > 3000)
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avg_wire_size = 3000;
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/* Give a little boost to mid-size frames */
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if ((avg_wire_size > 300) && (avg_wire_size < 1200))
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avg_wire_size /= 3;
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else
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avg_wire_size /= 2;
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/* write back value and retain adaptive flag */
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ring_container->itr = avg_wire_size | FM10K_ITR_ADAPTIVE;
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clear_counts:
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ring_container->total_bytes = 0;
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ring_container->total_packets = 0;
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}
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static void fm10k_qv_enable(struct fm10k_q_vector *q_vector)
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{
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/* Enable auto-mask and clear the current mask */
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u32 itr = FM10K_ITR_ENABLE;
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/* Update Tx ITR */
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fm10k_update_itr(&q_vector->tx);
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/* Update Rx ITR */
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fm10k_update_itr(&q_vector->rx);
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/* Store Tx itr in timer slot 0 */
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itr |= (q_vector->tx.itr & FM10K_ITR_MAX);
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/* Shift Rx itr to timer slot 1 */
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itr |= (q_vector->rx.itr & FM10K_ITR_MAX) << FM10K_ITR_INTERVAL1_SHIFT;
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/* Write the final value to the ITR register */
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writel(itr, q_vector->itr);
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}
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static int fm10k_poll(struct napi_struct *napi, int budget)
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{
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struct fm10k_q_vector *q_vector =
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container_of(napi, struct fm10k_q_vector, napi);
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/* all work done, exit the polling mode */
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napi_complete(napi);
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/* re-enable the q_vector */
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fm10k_qv_enable(q_vector);
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return 0;
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}
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/**
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* fm10k_set_num_queues: Allocate queues for device, feature dependent
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* @interface: board private structure to initialize
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*
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* This is the top level queue allocation routine. The order here is very
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* important, starting with the "most" number of features turned on at once,
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* and ending with the smallest set of features. This way large combinations
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* can be allocated if they're turned on, and smaller combinations are the
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* fallthrough conditions.
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*
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**/
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static void fm10k_set_num_queues(struct fm10k_intfc *interface)
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{
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/* Start with base case */
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interface->num_rx_queues = 1;
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interface->num_tx_queues = 1;
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}
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/**
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* fm10k_alloc_q_vector - Allocate memory for a single interrupt vector
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* @interface: board private structure to initialize
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* @v_count: q_vectors allocated on interface, used for ring interleaving
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* @v_idx: index of vector in interface struct
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* @txr_count: total number of Tx rings to allocate
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* @txr_idx: index of first Tx ring to allocate
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* @rxr_count: total number of Rx rings to allocate
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* @rxr_idx: index of first Rx ring to allocate
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*
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* We allocate one q_vector. If allocation fails we return -ENOMEM.
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**/
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static int fm10k_alloc_q_vector(struct fm10k_intfc *interface,
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unsigned int v_count, unsigned int v_idx,
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unsigned int txr_count, unsigned int txr_idx,
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unsigned int rxr_count, unsigned int rxr_idx)
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{
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struct fm10k_q_vector *q_vector;
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int ring_count, size;
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ring_count = txr_count + rxr_count;
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size = sizeof(struct fm10k_q_vector);
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/* allocate q_vector and rings */
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q_vector = kzalloc(size, GFP_KERNEL);
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if (!q_vector)
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return -ENOMEM;
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/* initialize NAPI */
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netif_napi_add(interface->netdev, &q_vector->napi,
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fm10k_poll, NAPI_POLL_WEIGHT);
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/* tie q_vector and interface together */
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interface->q_vector[v_idx] = q_vector;
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q_vector->interface = interface;
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q_vector->v_idx = v_idx;
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/* save Tx ring container info */
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q_vector->tx.itr = interface->tx_itr;
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q_vector->tx.count = txr_count;
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/* save Rx ring container info */
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q_vector->rx.itr = interface->rx_itr;
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q_vector->rx.count = rxr_count;
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return 0;
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}
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/**
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* fm10k_free_q_vector - Free memory allocated for specific interrupt vector
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* @interface: board private structure to initialize
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* @v_idx: Index of vector to be freed
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*
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* This function frees the memory allocated to the q_vector. In addition if
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* NAPI is enabled it will delete any references to the NAPI struct prior
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* to freeing the q_vector.
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**/
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static void fm10k_free_q_vector(struct fm10k_intfc *interface, int v_idx)
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{
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struct fm10k_q_vector *q_vector = interface->q_vector[v_idx];
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interface->q_vector[v_idx] = NULL;
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netif_napi_del(&q_vector->napi);
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kfree_rcu(q_vector, rcu);
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}
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/**
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* fm10k_alloc_q_vectors - Allocate memory for interrupt vectors
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* @interface: board private structure to initialize
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*
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* We allocate one q_vector per queue interrupt. If allocation fails we
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* return -ENOMEM.
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**/
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static int fm10k_alloc_q_vectors(struct fm10k_intfc *interface)
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{
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unsigned int q_vectors = interface->num_q_vectors;
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unsigned int rxr_remaining = interface->num_rx_queues;
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unsigned int txr_remaining = interface->num_tx_queues;
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unsigned int rxr_idx = 0, txr_idx = 0, v_idx = 0;
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int err;
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if (q_vectors >= (rxr_remaining + txr_remaining)) {
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for (; rxr_remaining; v_idx++) {
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err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
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0, 0, 1, rxr_idx);
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if (err)
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goto err_out;
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/* update counts and index */
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rxr_remaining--;
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rxr_idx++;
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}
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}
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for (; v_idx < q_vectors; v_idx++) {
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int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
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int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
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err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
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tqpv, txr_idx,
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rqpv, rxr_idx);
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if (err)
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goto err_out;
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/* update counts and index */
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rxr_remaining -= rqpv;
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txr_remaining -= tqpv;
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rxr_idx++;
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txr_idx++;
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}
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return 0;
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err_out:
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interface->num_tx_queues = 0;
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interface->num_rx_queues = 0;
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interface->num_q_vectors = 0;
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while (v_idx--)
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fm10k_free_q_vector(interface, v_idx);
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return -ENOMEM;
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}
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/**
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* fm10k_free_q_vectors - Free memory allocated for interrupt vectors
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* @interface: board private structure to initialize
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*
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* This function frees the memory allocated to the q_vectors. In addition if
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* NAPI is enabled it will delete any references to the NAPI struct prior
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* to freeing the q_vector.
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**/
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static void fm10k_free_q_vectors(struct fm10k_intfc *interface)
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{
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int v_idx = interface->num_q_vectors;
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interface->num_tx_queues = 0;
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interface->num_rx_queues = 0;
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interface->num_q_vectors = 0;
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while (v_idx--)
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fm10k_free_q_vector(interface, v_idx);
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}
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/**
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* f10k_reset_msix_capability - reset MSI-X capability
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* @interface: board private structure to initialize
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*
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* Reset the MSI-X capability back to its starting state
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**/
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static void fm10k_reset_msix_capability(struct fm10k_intfc *interface)
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{
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pci_disable_msix(interface->pdev);
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kfree(interface->msix_entries);
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interface->msix_entries = NULL;
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}
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/**
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* f10k_init_msix_capability - configure MSI-X capability
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* @interface: board private structure to initialize
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*
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* Attempt to configure the interrupts using the best available
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* capabilities of the hardware and the kernel.
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**/
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static int fm10k_init_msix_capability(struct fm10k_intfc *interface)
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{
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struct fm10k_hw *hw = &interface->hw;
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int v_budget, vector;
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/* It's easy to be greedy for MSI-X vectors, but it really
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* doesn't do us much good if we have a lot more vectors
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* than CPU's. So let's be conservative and only ask for
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* (roughly) the same number of vectors as there are CPU's.
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* the default is to use pairs of vectors
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*/
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v_budget = max(interface->num_rx_queues, interface->num_tx_queues);
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v_budget = min_t(u16, v_budget, num_online_cpus());
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/* account for vectors not related to queues */
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v_budget += NON_Q_VECTORS(hw);
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/* At the same time, hardware can only support a maximum of
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* hw.mac->max_msix_vectors vectors. With features
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* such as RSS and VMDq, we can easily surpass the number of Rx and Tx
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* descriptor queues supported by our device. Thus, we cap it off in
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* those rare cases where the cpu count also exceeds our vector limit.
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*/
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v_budget = min_t(int, v_budget, hw->mac.max_msix_vectors);
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/* A failure in MSI-X entry allocation is fatal. */
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interface->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
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GFP_KERNEL);
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if (!interface->msix_entries)
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return -ENOMEM;
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/* populate entry values */
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for (vector = 0; vector < v_budget; vector++)
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interface->msix_entries[vector].entry = vector;
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/* Attempt to enable MSI-X with requested value */
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v_budget = pci_enable_msix_range(interface->pdev,
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interface->msix_entries,
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MIN_MSIX_COUNT(hw),
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v_budget);
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if (v_budget < 0) {
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kfree(interface->msix_entries);
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interface->msix_entries = NULL;
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return -ENOMEM;
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}
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/* record the number of queues available for q_vectors */
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interface->num_q_vectors = v_budget - NON_Q_VECTORS(hw);
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return 0;
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}
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static void fm10k_init_reta(struct fm10k_intfc *interface)
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{
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u16 i, rss_i = interface->ring_feature[RING_F_RSS].indices;
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u32 reta, base;
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/* If the netdev is initialized we have to maintain table if possible */
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if (interface->netdev->reg_state) {
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for (i = FM10K_RETA_SIZE; i--;) {
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reta = interface->reta[i];
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if ((((reta << 24) >> 24) < rss_i) &&
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(((reta << 16) >> 24) < rss_i) &&
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(((reta << 8) >> 24) < rss_i) &&
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(((reta) >> 24) < rss_i))
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continue;
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goto repopulate_reta;
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}
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/* do nothing if all of the elements are in bounds */
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return;
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}
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repopulate_reta:
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/* Populate the redirection table 4 entries at a time. To do this
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* we are generating the results for n and n+2 and then interleaving
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* those with the results with n+1 and n+3.
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*/
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for (i = FM10K_RETA_SIZE; i--;) {
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/* first pass generates n and n+2 */
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base = ((i * 0x00040004) + 0x00020000) * rss_i;
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reta = (base & 0x3F803F80) >> 7;
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/* second pass generates n+1 and n+3 */
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base += 0x00010001 * rss_i;
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reta |= (base & 0x3F803F80) << 1;
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interface->reta[i] = reta;
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}
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}
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/**
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* fm10k_init_queueing_scheme - Determine proper queueing scheme
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* @interface: board private structure to initialize
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*
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* We determine which queueing scheme to use based on...
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* - Hardware queue count (num_*_queues)
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* - defined by miscellaneous hardware support/features (RSS, etc.)
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**/
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int fm10k_init_queueing_scheme(struct fm10k_intfc *interface)
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{
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int err;
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/* Number of supported queues */
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fm10k_set_num_queues(interface);
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/* Configure MSI-X capability */
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err = fm10k_init_msix_capability(interface);
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if (err) {
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dev_err(&interface->pdev->dev,
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"Unable to initialize MSI-X capability\n");
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return err;
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}
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/* Allocate memory for queues */
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err = fm10k_alloc_q_vectors(interface);
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if (err)
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return err;
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/* Initialize RSS redirection table */
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fm10k_init_reta(interface);
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return 0;
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}
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/**
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* fm10k_clear_queueing_scheme - Clear the current queueing scheme settings
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* @interface: board private structure to clear queueing scheme on
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*
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* We go through and clear queueing specific resources and reset the structure
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* to pre-load conditions
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**/
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void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface)
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{
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fm10k_free_q_vectors(interface);
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fm10k_reset_msix_capability(interface);
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}
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