Merge commit 'v2.6.36-rc7' into core/memblock
Merge reason: Update from -rc3 to -rc7. Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
commit
153db80f8c
964 changed files with 10076 additions and 5634 deletions
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@ -38,4 +38,10 @@ static inline void amd_iommu_stats_init(void) { }
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#endif /* !CONFIG_AMD_IOMMU_STATS */
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static inline bool is_rd890_iommu(struct pci_dev *pdev)
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{
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return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
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(pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
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}
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#endif /* _ASM_X86_AMD_IOMMU_PROTO_H */
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@ -368,6 +368,9 @@ struct amd_iommu {
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/* capabilities of that IOMMU read from ACPI */
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u32 cap;
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/* flags read from acpi table */
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u8 acpi_flags;
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/*
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* Capability pointer. There could be more than one IOMMU per PCI
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* device function if there are more than one AMD IOMMU capability
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@ -411,6 +414,15 @@ struct amd_iommu {
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/* default dma_ops domain for that IOMMU */
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struct dma_ops_domain *default_dom;
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/*
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* This array is required to work around a potential BIOS bug.
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* The BIOS may miss to restore parts of the PCI configuration
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* space when the system resumes from S3. The result is that the
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* IOMMU does not execute commands anymore which leads to system
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* failure.
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*/
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u32 cache_cfg[4];
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};
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/*
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@ -309,7 +309,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
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static __always_inline int constant_test_bit(unsigned int nr, const volatile unsigned long *addr)
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{
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return ((1UL << (nr % BITS_PER_LONG)) &
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(((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0;
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(addr[nr / BITS_PER_LONG])) != 0;
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}
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static inline int variable_test_bit(int nr, volatile const unsigned long *addr)
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@ -205,7 +205,7 @@ static inline compat_uptr_t ptr_to_compat(void __user *uptr)
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return (u32)(unsigned long)uptr;
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}
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static inline void __user *compat_alloc_user_space(long len)
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static inline void __user *arch_compat_alloc_user_space(long len)
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{
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struct pt_regs *regs = task_pt_regs(current);
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return (void __user *)regs->sp - len;
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@ -168,6 +168,7 @@
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#define X86_FEATURE_XSAVEOPT (7*32+ 4) /* Optimized Xsave */
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#define X86_FEATURE_PLN (7*32+ 5) /* Intel Power Limit Notification */
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#define X86_FEATURE_PTS (7*32+ 6) /* Intel Package Thermal Status */
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#define X86_FEATURE_DTS (7*32+ 7) /* Digital Thermal Sensor */
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/* Virtualization flags: Linux defined, word 8 */
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#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */
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@ -296,6 +297,7 @@ extern const char * const x86_power_flags[32];
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#endif /* CONFIG_X86_64 */
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#if __GNUC__ >= 4
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/*
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* Static testing of CPU features. Used the same as boot_cpu_has().
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* These are only valid after alternatives have run, but will statically
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@ -304,7 +306,7 @@ extern const char * const x86_power_flags[32];
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*/
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static __always_inline __pure bool __static_cpu_has(u16 bit)
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{
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#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
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#if __GNUC__ > 4 || __GNUC_MINOR__ >= 5
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asm goto("1: jmp %l[t_no]\n"
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"2:\n"
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".section .altinstructions,\"a\"\n"
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@ -345,7 +347,6 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
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#endif
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}
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#if __GNUC__ >= 4
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#define static_cpu_has(bit) \
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( \
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__builtin_constant_p(boot_cpu_has(bit)) ? \
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@ -68,7 +68,6 @@ extern unsigned long force_hpet_address;
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extern u8 hpet_blockid;
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extern int hpet_force_user;
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extern u8 hpet_msi_disable;
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extern u8 hpet_readback_cmp;
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extern int is_hpet_enabled(void);
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extern int hpet_enable(void);
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extern void hpet_disable(void);
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@ -20,7 +20,7 @@ struct arch_hw_breakpoint {
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#include <linux/list.h>
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/* Available HW breakpoint length encodings */
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#define X86_BREAKPOINT_LEN_X 0x00
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#define X86_BREAKPOINT_LEN_X 0x40
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#define X86_BREAKPOINT_LEN_1 0x40
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#define X86_BREAKPOINT_LEN_2 0x44
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#define X86_BREAKPOINT_LEN_4 0x4c
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@ -26,11 +26,11 @@
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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void *
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void __iomem *
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iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
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void
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iounmap_atomic(void *kvaddr, enum km_type type);
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iounmap_atomic(void __iomem *kvaddr, enum km_type type);
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int
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iomap_create_wc(resource_size_t base, unsigned long size, pgprot_t *prot);
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@ -152,9 +152,14 @@ struct x86_emulate_ops {
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struct operand {
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enum { OP_REG, OP_MEM, OP_IMM, OP_NONE } type;
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unsigned int bytes;
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unsigned long orig_val, *ptr;
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union {
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unsigned long orig_val;
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u64 orig_val64;
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};
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unsigned long *ptr;
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union {
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unsigned long val;
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u64 val64;
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char valptr[sizeof(unsigned long) + 2];
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};
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};
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@ -27,6 +27,9 @@ extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops,
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int node);
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extern struct pci_bus *pci_scan_bus_with_sysdata(int busno);
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#ifdef CONFIG_PCI
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#ifdef CONFIG_PCI_DOMAINS
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static inline int pci_domain_nr(struct pci_bus *bus)
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{
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struct pci_sysdata *sd = bus->sysdata;
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@ -37,13 +40,12 @@ static inline int pci_proc_domain(struct pci_bus *bus)
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{
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return pci_domain_nr(bus);
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}
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#endif
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/* Can be used to override the logic in pci_scan_bus for skipping
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already-configured bus numbers - to be used for buggy BIOSes
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or architectures with incomplete PCI setup by the loader */
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#ifdef CONFIG_PCI
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extern unsigned int pcibios_assign_all_busses(void);
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extern int pci_legacy_init(void);
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# ifdef CONFIG_ACPI
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