linux 3.19-rc4
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJUsuDQAAoJEHm+PkMAQRiGnecH/0RO9UKnEduOTRPaZGXAjGI8 N0FvNia8qn7f+XnvN62pG/YZZqi2uvuy37vwAXMtS6KXEgaDG9Wq4fVrhOaJ5VgL QOmPdVGUa+1PuPcMYj/QLIFRfIHvIY/XVZWXrcIyYfQdBAAoJ2q23qx/yFmdyTwf +enAv+PV4ZVNMEANyN9KS7xX5gPbSDl36AOhm6lXDvrlem4mbnhRuUtYez9R8KTK VNfkKZQRDOgl4/ns0ndzpAUhaDj1JJGoLRgMXKna33XgtzSEL4XijvImdnoIXp5N Z98Jc1N5Vg5OcUFeGJC3bRR27m39xoOHQk2ufY43uAIfB3Ez/C7m/r7b50ZVWfs= =J7TO -----END PGP SIGNATURE----- Merge tag 'v3.19-rc4' into next Merge with mainline to bring in the latest thermal and other changes.
This commit is contained in:
commit
0c49cd295d
15497 changed files with 878449 additions and 621464 deletions
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@ -27,6 +27,7 @@ struct samsung_i2s {
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#define QUIRK_NO_MUXPSR (1 << 2)
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#define QUIRK_NEED_RSTCLR (1 << 3)
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#define QUIRK_SUPPORTS_TDM (1 << 4)
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#define QUIRK_SUPPORTS_IDMA (1 << 5)
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/* Quirks of the I2S controller */
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u32 quirks;
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dma_addr_t idma_addr;
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18
include/linux/platform_data/bcmgenet.h
Normal file
18
include/linux/platform_data/bcmgenet.h
Normal file
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@ -0,0 +1,18 @@
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#ifndef __LINUX_PLATFORM_DATA_BCMGENET_H__
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#define __LINUX_PLATFORM_DATA_BCMGENET_H__
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#include <linux/types.h>
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#include <linux/if_ether.h>
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#include <linux/phy.h>
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struct bcmgenet_platform_data {
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bool mdio_enabled;
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phy_interface_t phy_interface;
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int phy_address;
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int phy_speed;
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int phy_duplex;
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u8 mac_address[ETH_ALEN];
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int genet_version;
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};
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#endif
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59
include/linux/platform_data/dma-dw.h
Normal file
59
include/linux/platform_data/dma-dw.h
Normal file
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@ -0,0 +1,59 @@
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/*
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* Driver for the Synopsys DesignWare DMA Controller
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*
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* Copyright (C) 2007 Atmel Corporation
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* Copyright (C) 2010-2011 ST Microelectronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _PLATFORM_DATA_DMA_DW_H
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#define _PLATFORM_DATA_DMA_DW_H
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#include <linux/device.h>
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/**
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* struct dw_dma_slave - Controller-specific information about a slave
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*
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* @dma_dev: required DMA master device. Depricated.
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* @src_id: src request line
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* @dst_id: dst request line
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* @src_master: src master for transfers on allocated channel.
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* @dst_master: dest master for transfers on allocated channel.
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*/
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struct dw_dma_slave {
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struct device *dma_dev;
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u8 src_id;
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u8 dst_id;
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u8 src_master;
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u8 dst_master;
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};
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/**
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* struct dw_dma_platform_data - Controller configuration parameters
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* @nr_channels: Number of channels supported by hardware (max 8)
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* @is_private: The device channels should be marked as private and not for
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* by the general purpose DMA channel allocator.
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* @chan_allocation_order: Allocate channels starting from 0 or 7
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* @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
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* @block_size: Maximum block size supported by the controller
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* @nr_masters: Number of AHB masters supported by the controller
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* @data_width: Maximum data width supported by hardware per AHB master
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* (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
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*/
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struct dw_dma_platform_data {
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unsigned int nr_channels;
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bool is_private;
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#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
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#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
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unsigned char chan_allocation_order;
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#define CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */
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#define CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */
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unsigned char chan_priority;
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unsigned short block_size;
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unsigned char nr_masters;
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unsigned char data_width[4];
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};
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#endif /* _PLATFORM_DATA_DMA_DW_H */
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@ -41,6 +41,7 @@ enum sdma_peripheral_type {
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IMX_DMATYPE_ESAI, /* ESAI */
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IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */
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IMX_DMATYPE_ASRC_SP, /* Shared ASRC */
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IMX_DMATYPE_SAI, /* SAI */
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};
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enum imx_dma_prio {
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@ -1,24 +0,0 @@
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/**
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* dwc3-exynos.h - Samsung EXYNOS DWC3 Specific Glue layer, header.
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef _DWC3_EXYNOS_H_
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#define _DWC3_EXYNOS_H_
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struct dwc3_exynos_data {
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int phy_type;
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int (*phy_init)(struct platform_device *pdev, int type);
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int (*phy_exit)(struct platform_device *pdev, int type);
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};
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#endif /* _DWC3_EXYNOS_H_ */
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@ -42,8 +42,24 @@ struct elm_errorvec {
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int error_loc[16];
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};
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#if IS_ENABLED(CONFIG_MTD_NAND_OMAP_BCH)
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void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc,
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struct elm_errorvec *err_vec);
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int elm_config(struct device *dev, enum bch_ecc bch_type,
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int ecc_steps, int ecc_step_size, int ecc_syndrome_size);
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#else
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static inline void
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elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc,
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struct elm_errorvec *err_vec)
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{
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}
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static inline int elm_config(struct device *dev, enum bch_ecc bch_type,
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int ecc_steps, int ecc_step_size,
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int ecc_syndrome_size)
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{
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return -ENOSYS;
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}
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#endif /* CONFIG_MTD_NAND_ECC_BCH */
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#endif /* __ELM_H */
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32
include/linux/platform_data/gpio-dwapb.h
Normal file
32
include/linux/platform_data/gpio-dwapb.h
Normal file
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@ -0,0 +1,32 @@
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/*
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* Copyright(c) 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
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* more details.
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*/
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#ifndef GPIO_DW_APB_H
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#define GPIO_DW_APB_H
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struct dwapb_port_property {
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struct device_node *node;
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const char *name;
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unsigned int idx;
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unsigned int ngpio;
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unsigned int gpio_base;
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unsigned int irq;
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bool irq_shared;
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};
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struct dwapb_platform_data {
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struct dwapb_port_property *properties;
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unsigned int nports;
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};
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#endif
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90
include/linux/platform_data/hsmmc-omap.h
Normal file
90
include/linux/platform_data/hsmmc-omap.h
Normal file
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@ -0,0 +1,90 @@
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/*
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* MMC definitions for OMAP2
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*
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* Copyright (C) 2006 Nokia Corporation
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||||
*
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||||
* This program is free software; you can redistribute it and/or modify
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||||
* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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||||
*/
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/*
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* struct omap_hsmmc_dev_attr.flags possibilities
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*
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* OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can
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* operate with either 1.8Vdc or 3.0Vdc card voltages; this flag
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* should be set if this is the case. See for example Section 22.5.3
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* "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia
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||||
* Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R).
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*
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* OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers
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* don't work correctly on some MMC controller instances on some
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* OMAP3 SoCs; this flag should be set if this is the case. See
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* for example Advisory 2.1.1.128 "MMC: Multiple Block Read
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||||
* Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_
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* Revision F (October 2010) (SPRZ278F).
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*/
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#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0)
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#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1)
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#define OMAP_HSMMC_SWAKEUP_MISSING BIT(2)
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struct omap_hsmmc_dev_attr {
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u8 flags;
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};
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struct mmc_card;
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struct omap_hsmmc_platform_data {
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/* back-link to device */
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struct device *dev;
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/* set if your board has components or wiring that limits the
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* maximum frequency on the MMC bus */
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unsigned int max_freq;
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/* Integrating attributes from the omap_hwmod layer */
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u8 controller_flags;
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/* Register offset deviation */
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u16 reg_offset;
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/*
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* 4/8 wires and any additional host capabilities
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* need to OR'd all capabilities (ref. linux/mmc/host.h)
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*/
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u32 caps; /* Used for the MMC driver on 2430 and later */
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u32 pm_caps; /* PM capabilities of the mmc */
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/* switch pin can be for card detect (default) or card cover */
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unsigned cover:1;
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/* use the internal clock */
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unsigned internal_clock:1;
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/* nonremovable e.g. eMMC */
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unsigned nonremovable:1;
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/* eMMC does not handle power off when not in sleep state */
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unsigned no_regulator_off_init:1;
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/* we can put the features above into this variable */
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#define HSMMC_HAS_PBIAS (1 << 0)
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#define HSMMC_HAS_UPDATED_RESET (1 << 1)
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#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
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unsigned features;
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int switch_pin; /* gpio (card detect) */
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int gpio_wp; /* gpio (write protect) */
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int (*set_power)(struct device *dev, int power_on, int vdd);
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void (*remux)(struct device *dev, int power_on);
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/* Call back before enabling / disabling regulators */
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void (*before_set_reg)(struct device *dev, int power_on, int vdd);
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/* Call back after enabling / disabling regulators */
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void (*after_set_reg)(struct device *dev, int power_on, int vdd);
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/* if we have special card, init it using this callback */
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void (*init_card)(struct mmc_card *card);
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const char *name;
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u32 ocr_mask;
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};
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21
include/linux/platform_data/i2c-designware.h
Normal file
21
include/linux/platform_data/i2c-designware.h
Normal file
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@ -0,0 +1,21 @@
|
|||
/*
|
||||
* Copyright(c) 2014 Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*/
|
||||
|
||||
#ifndef I2C_DESIGNWARE_H
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#define I2C_DESIGNWARE_H
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struct dw_i2c_platform_data {
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unsigned int i2c_scl_freq;
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};
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#endif
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30
include/linux/platform_data/isl9305.h
Normal file
30
include/linux/platform_data/isl9305.h
Normal file
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@ -0,0 +1,30 @@
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/*
|
||||
* isl9305 - Intersil ISL9305 DCDC regulator
|
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*
|
||||
* Copyright 2014 Linaro Ltd
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*
|
||||
* Author: Mark Brown <broonie@kernel.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef __ISL9305_H
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#define __ISL9305_H
|
||||
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#define ISL9305_DCD1 0
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#define ISL9305_DCD2 1
|
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#define ISL9305_LDO1 2
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#define ISL9305_LDO2 3
|
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|
||||
#define ISL9305_MAX_REGULATOR ISL9305_LDO2
|
||||
|
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struct regulator_init_data;
|
||||
|
||||
struct isl9305_pdata {
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struct regulator_init_data *init_data[ISL9305_MAX_REGULATOR];
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
@ -136,6 +136,7 @@ struct lp855x_rom_data {
|
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Only valid when mode is PWM_BASED.
|
||||
* @size_program : total size of lp855x_rom_data
|
||||
* @rom_data : list of new eeprom/eprom registers
|
||||
* @supply : regulator that supplies 3V input
|
||||
*/
|
||||
struct lp855x_platform_data {
|
||||
const char *name;
|
||||
|
|
@ -144,6 +145,7 @@ struct lp855x_platform_data {
|
|||
unsigned int period_ns;
|
||||
int size_program;
|
||||
struct lp855x_rom_data *rom_data;
|
||||
struct regulator *supply;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
|||
22
include/linux/platform_data/mmc-atmel-mci.h
Normal file
22
include/linux/platform_data/mmc-atmel-mci.h
Normal file
|
|
@ -0,0 +1,22 @@
|
|||
#ifndef __MMC_ATMEL_MCI_H
|
||||
#define __MMC_ATMEL_MCI_H
|
||||
|
||||
#include <linux/platform_data/dma-atmel.h>
|
||||
#include <linux/platform_data/dma-dw.h>
|
||||
|
||||
/**
|
||||
* struct mci_dma_data - DMA data for MCI interface
|
||||
*/
|
||||
struct mci_dma_data {
|
||||
#ifdef CONFIG_ARM
|
||||
struct at_dma_slave sdata;
|
||||
#else
|
||||
struct dw_dma_slave sdata;
|
||||
#endif
|
||||
};
|
||||
|
||||
/* accessor macros */
|
||||
#define slave_data_ptr(s) (&(s)->sdata)
|
||||
#define find_slave_dev(s) ((s)->sdata.dma_dev)
|
||||
|
||||
#endif /* __MMC_ATMEL_MCI_H */
|
||||
|
|
@ -10,32 +10,8 @@
|
|||
|
||||
#define OMAP_MMC_MAX_SLOTS 2
|
||||
|
||||
/*
|
||||
* struct omap_mmc_dev_attr.flags possibilities
|
||||
*
|
||||
* OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can
|
||||
* operate with either 1.8Vdc or 3.0Vdc card voltages; this flag
|
||||
* should be set if this is the case. See for example Section 22.5.3
|
||||
* "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia
|
||||
* Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R).
|
||||
*
|
||||
* OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers
|
||||
* don't work correctly on some MMC controller instances on some
|
||||
* OMAP3 SoCs; this flag should be set if this is the case. See
|
||||
* for example Advisory 2.1.1.128 "MMC: Multiple Block Read
|
||||
* Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_
|
||||
* Revision F (October 2010) (SPRZ278F).
|
||||
*/
|
||||
#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0)
|
||||
#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1)
|
||||
#define OMAP_HSMMC_SWAKEUP_MISSING BIT(2)
|
||||
|
||||
struct mmc_card;
|
||||
|
||||
struct omap_mmc_dev_attr {
|
||||
u8 flags;
|
||||
};
|
||||
|
||||
struct omap_mmc_platform_data {
|
||||
/* back-link to device */
|
||||
struct device *dev;
|
||||
|
|
@ -106,9 +82,6 @@ struct omap_mmc_platform_data {
|
|||
unsigned vcc_aux_disable_is_sleep:1;
|
||||
|
||||
/* we can put the features above into this variable */
|
||||
#define HSMMC_HAS_PBIAS (1 << 0)
|
||||
#define HSMMC_HAS_UPDATED_RESET (1 << 1)
|
||||
#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
|
||||
#define MMC_OMAP7XX (1 << 3)
|
||||
#define MMC_OMAP15XX (1 << 4)
|
||||
#define MMC_OMAP16XX (1 << 5)
|
||||
|
|
|
|||
|
|
@ -71,6 +71,7 @@ struct omap_nand_platform_data {
|
|||
struct mtd_partition *parts;
|
||||
int nr_parts;
|
||||
bool dev_ready;
|
||||
bool flash_bbt;
|
||||
enum nand_io xfer_type;
|
||||
int devsize;
|
||||
enum omap_ecc ecc_opt;
|
||||
|
|
|
|||
|
|
@ -55,9 +55,4 @@ struct sdhci_pxa_platdata {
|
|||
unsigned int quirks2;
|
||||
unsigned int pm_caps;
|
||||
};
|
||||
|
||||
struct sdhci_pxa {
|
||||
u8 clk_enable;
|
||||
u8 power_mode;
|
||||
};
|
||||
#endif /* _PXA_SDHCI_H_ */
|
||||
|
|
|
|||
|
|
@ -1,74 +0,0 @@
|
|||
/*
|
||||
* rcar_du.h -- R-Car Display Unit DRM driver
|
||||
*
|
||||
* Copyright (C) 2013 Renesas Corporation
|
||||
*
|
||||
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef __RCAR_DU_H__
|
||||
#define __RCAR_DU_H__
|
||||
|
||||
#include <drm/drm_mode.h>
|
||||
|
||||
enum rcar_du_output {
|
||||
RCAR_DU_OUTPUT_DPAD0,
|
||||
RCAR_DU_OUTPUT_DPAD1,
|
||||
RCAR_DU_OUTPUT_LVDS0,
|
||||
RCAR_DU_OUTPUT_LVDS1,
|
||||
RCAR_DU_OUTPUT_TCON,
|
||||
RCAR_DU_OUTPUT_MAX,
|
||||
};
|
||||
|
||||
enum rcar_du_encoder_type {
|
||||
RCAR_DU_ENCODER_UNUSED = 0,
|
||||
RCAR_DU_ENCODER_NONE,
|
||||
RCAR_DU_ENCODER_VGA,
|
||||
RCAR_DU_ENCODER_LVDS,
|
||||
};
|
||||
|
||||
struct rcar_du_panel_data {
|
||||
unsigned int width_mm; /* Panel width in mm */
|
||||
unsigned int height_mm; /* Panel height in mm */
|
||||
struct drm_mode_modeinfo mode;
|
||||
};
|
||||
|
||||
struct rcar_du_connector_lvds_data {
|
||||
struct rcar_du_panel_data panel;
|
||||
};
|
||||
|
||||
struct rcar_du_connector_vga_data {
|
||||
/* TODO: Add DDC information for EDID retrieval */
|
||||
};
|
||||
|
||||
/*
|
||||
* struct rcar_du_encoder_data - Encoder platform data
|
||||
* @type: the encoder type (RCAR_DU_ENCODER_*)
|
||||
* @output: the DU output the connector is connected to (RCAR_DU_OUTPUT_*)
|
||||
* @connector.lvds: platform data for LVDS connectors
|
||||
* @connector.vga: platform data for VGA connectors
|
||||
*
|
||||
* Encoder platform data describes an on-board encoder, its associated DU SoC
|
||||
* output, and the connector.
|
||||
*/
|
||||
struct rcar_du_encoder_data {
|
||||
enum rcar_du_encoder_type type;
|
||||
enum rcar_du_output output;
|
||||
|
||||
union {
|
||||
struct rcar_du_connector_lvds_data lvds;
|
||||
struct rcar_du_connector_vga_data vga;
|
||||
} connector;
|
||||
};
|
||||
|
||||
struct rcar_du_platform_data {
|
||||
struct rcar_du_encoder_data *encoders;
|
||||
unsigned int num_encoders;
|
||||
};
|
||||
|
||||
#endif /* __RCAR_DU_H__ */
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Samsung Electronics Co.Ltd
|
||||
* http://www.samsung.com/
|
||||
* Author: Praveen Paneri <p.paneri@samsung.com>
|
||||
*
|
||||
* Defines platform data for samsung usb phy driver.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef __SAMSUNG_USBPHY_PLATFORM_H
|
||||
#define __SAMSUNG_USBPHY_PLATFORM_H
|
||||
|
||||
/**
|
||||
* samsung_usbphy_data - Platform data for USB PHY driver.
|
||||
* @pmu_isolation: Function to control usb phy isolation in PMU.
|
||||
*/
|
||||
struct samsung_usbphy_data {
|
||||
void (*pmu_isolation)(int on);
|
||||
};
|
||||
|
||||
extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
|
||||
|
||||
#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
|
||||
|
|
@ -38,9 +38,6 @@ struct omap_uart_port_info {
|
|||
unsigned int dma_rx_timeout;
|
||||
unsigned int autosuspend_timeout;
|
||||
unsigned int dma_rx_poll_rate;
|
||||
int DTR_gpio;
|
||||
int DTR_inverted;
|
||||
int DTR_present;
|
||||
|
||||
int (*get_context_loss_count)(struct device *);
|
||||
void (*enable_wakeup)(struct device *, bool);
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@
|
|||
#define ST21NFCA_HCI_DRIVER_NAME "st21nfca_hci"
|
||||
|
||||
struct st21nfca_nfc_platform_data {
|
||||
unsigned int gpio_irq;
|
||||
unsigned int gpio_ena;
|
||||
unsigned int irq_polarity;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@
|
|||
#define ST21NFCB_NCI_DRIVER_NAME "st21nfcb_nci"
|
||||
|
||||
struct st21nfcb_nfc_platform_data {
|
||||
unsigned int gpio_irq;
|
||||
unsigned int gpio_reset;
|
||||
unsigned int irq_polarity;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,34 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Google, Inc.
|
||||
*
|
||||
* Author:
|
||||
* Colin Cross <ccross@android.com>
|
||||
* Olof Johansson <olof@lixom.net>
|
||||
*
|
||||
* This software is licensed under the terms of the GNU General Public
|
||||
* License version 2, as published by the Free Software Foundation, and
|
||||
* may be copied, distributed, and modified under those terms.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __TEGRA_EMC_H_
|
||||
#define __TEGRA_EMC_H_
|
||||
|
||||
#define TEGRA_EMC_NUM_REGS 46
|
||||
|
||||
struct tegra_emc_table {
|
||||
unsigned long rate;
|
||||
u32 regs[TEGRA_EMC_NUM_REGS];
|
||||
};
|
||||
|
||||
struct tegra_emc_pdata {
|
||||
int num_tables;
|
||||
struct tegra_emc_table *tables;
|
||||
};
|
||||
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue