linux 3.19-rc4

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Merge tag 'v3.19-rc4' into next

Merge with mainline to bring in the latest thermal and other changes.
This commit is contained in:
Dmitry Torokhov 2015-01-15 09:46:14 -08:00
commit 0c49cd295d
15497 changed files with 878449 additions and 621464 deletions

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@ -27,6 +27,7 @@ struct samsung_i2s {
#define QUIRK_NO_MUXPSR (1 << 2)
#define QUIRK_NEED_RSTCLR (1 << 3)
#define QUIRK_SUPPORTS_TDM (1 << 4)
#define QUIRK_SUPPORTS_IDMA (1 << 5)
/* Quirks of the I2S controller */
u32 quirks;
dma_addr_t idma_addr;

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@ -0,0 +1,18 @@
#ifndef __LINUX_PLATFORM_DATA_BCMGENET_H__
#define __LINUX_PLATFORM_DATA_BCMGENET_H__
#include <linux/types.h>
#include <linux/if_ether.h>
#include <linux/phy.h>
struct bcmgenet_platform_data {
bool mdio_enabled;
phy_interface_t phy_interface;
int phy_address;
int phy_speed;
int phy_duplex;
u8 mac_address[ETH_ALEN];
int genet_version;
};
#endif

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@ -0,0 +1,59 @@
/*
* Driver for the Synopsys DesignWare DMA Controller
*
* Copyright (C) 2007 Atmel Corporation
* Copyright (C) 2010-2011 ST Microelectronics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _PLATFORM_DATA_DMA_DW_H
#define _PLATFORM_DATA_DMA_DW_H
#include <linux/device.h>
/**
* struct dw_dma_slave - Controller-specific information about a slave
*
* @dma_dev: required DMA master device. Depricated.
* @src_id: src request line
* @dst_id: dst request line
* @src_master: src master for transfers on allocated channel.
* @dst_master: dest master for transfers on allocated channel.
*/
struct dw_dma_slave {
struct device *dma_dev;
u8 src_id;
u8 dst_id;
u8 src_master;
u8 dst_master;
};
/**
* struct dw_dma_platform_data - Controller configuration parameters
* @nr_channels: Number of channels supported by hardware (max 8)
* @is_private: The device channels should be marked as private and not for
* by the general purpose DMA channel allocator.
* @chan_allocation_order: Allocate channels starting from 0 or 7
* @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
* @block_size: Maximum block size supported by the controller
* @nr_masters: Number of AHB masters supported by the controller
* @data_width: Maximum data width supported by hardware per AHB master
* (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
*/
struct dw_dma_platform_data {
unsigned int nr_channels;
bool is_private;
#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
unsigned char chan_allocation_order;
#define CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */
#define CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */
unsigned char chan_priority;
unsigned short block_size;
unsigned char nr_masters;
unsigned char data_width[4];
};
#endif /* _PLATFORM_DATA_DMA_DW_H */

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@ -41,6 +41,7 @@ enum sdma_peripheral_type {
IMX_DMATYPE_ESAI, /* ESAI */
IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */
IMX_DMATYPE_ASRC_SP, /* Shared ASRC */
IMX_DMATYPE_SAI, /* SAI */
};
enum imx_dma_prio {

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@ -1,24 +0,0 @@
/**
* dwc3-exynos.h - Samsung EXYNOS DWC3 Specific Glue layer, header.
*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef _DWC3_EXYNOS_H_
#define _DWC3_EXYNOS_H_
struct dwc3_exynos_data {
int phy_type;
int (*phy_init)(struct platform_device *pdev, int type);
int (*phy_exit)(struct platform_device *pdev, int type);
};
#endif /* _DWC3_EXYNOS_H_ */

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@ -42,8 +42,24 @@ struct elm_errorvec {
int error_loc[16];
};
#if IS_ENABLED(CONFIG_MTD_NAND_OMAP_BCH)
void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc,
struct elm_errorvec *err_vec);
int elm_config(struct device *dev, enum bch_ecc bch_type,
int ecc_steps, int ecc_step_size, int ecc_syndrome_size);
#else
static inline void
elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc,
struct elm_errorvec *err_vec)
{
}
static inline int elm_config(struct device *dev, enum bch_ecc bch_type,
int ecc_steps, int ecc_step_size,
int ecc_syndrome_size)
{
return -ENOSYS;
}
#endif /* CONFIG_MTD_NAND_ECC_BCH */
#endif /* __ELM_H */

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@ -0,0 +1,32 @@
/*
* Copyright(c) 2014 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef GPIO_DW_APB_H
#define GPIO_DW_APB_H
struct dwapb_port_property {
struct device_node *node;
const char *name;
unsigned int idx;
unsigned int ngpio;
unsigned int gpio_base;
unsigned int irq;
bool irq_shared;
};
struct dwapb_platform_data {
struct dwapb_port_property *properties;
unsigned int nports;
};
#endif

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@ -0,0 +1,90 @@
/*
* MMC definitions for OMAP2
*
* Copyright (C) 2006 Nokia Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* struct omap_hsmmc_dev_attr.flags possibilities
*
* OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can
* operate with either 1.8Vdc or 3.0Vdc card voltages; this flag
* should be set if this is the case. See for example Section 22.5.3
* "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia
* Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R).
*
* OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers
* don't work correctly on some MMC controller instances on some
* OMAP3 SoCs; this flag should be set if this is the case. See
* for example Advisory 2.1.1.128 "MMC: Multiple Block Read
* Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_
* Revision F (October 2010) (SPRZ278F).
*/
#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0)
#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1)
#define OMAP_HSMMC_SWAKEUP_MISSING BIT(2)
struct omap_hsmmc_dev_attr {
u8 flags;
};
struct mmc_card;
struct omap_hsmmc_platform_data {
/* back-link to device */
struct device *dev;
/* set if your board has components or wiring that limits the
* maximum frequency on the MMC bus */
unsigned int max_freq;
/* Integrating attributes from the omap_hwmod layer */
u8 controller_flags;
/* Register offset deviation */
u16 reg_offset;
/*
* 4/8 wires and any additional host capabilities
* need to OR'd all capabilities (ref. linux/mmc/host.h)
*/
u32 caps; /* Used for the MMC driver on 2430 and later */
u32 pm_caps; /* PM capabilities of the mmc */
/* switch pin can be for card detect (default) or card cover */
unsigned cover:1;
/* use the internal clock */
unsigned internal_clock:1;
/* nonremovable e.g. eMMC */
unsigned nonremovable:1;
/* eMMC does not handle power off when not in sleep state */
unsigned no_regulator_off_init:1;
/* we can put the features above into this variable */
#define HSMMC_HAS_PBIAS (1 << 0)
#define HSMMC_HAS_UPDATED_RESET (1 << 1)
#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
unsigned features;
int switch_pin; /* gpio (card detect) */
int gpio_wp; /* gpio (write protect) */
int (*set_power)(struct device *dev, int power_on, int vdd);
void (*remux)(struct device *dev, int power_on);
/* Call back before enabling / disabling regulators */
void (*before_set_reg)(struct device *dev, int power_on, int vdd);
/* Call back after enabling / disabling regulators */
void (*after_set_reg)(struct device *dev, int power_on, int vdd);
/* if we have special card, init it using this callback */
void (*init_card)(struct mmc_card *card);
const char *name;
u32 ocr_mask;
};

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@ -0,0 +1,21 @@
/*
* Copyright(c) 2014 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef I2C_DESIGNWARE_H
#define I2C_DESIGNWARE_H
struct dw_i2c_platform_data {
unsigned int i2c_scl_freq;
};
#endif

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@ -0,0 +1,30 @@
/*
* isl9305 - Intersil ISL9305 DCDC regulator
*
* Copyright 2014 Linaro Ltd
*
* Author: Mark Brown <broonie@kernel.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __ISL9305_H
#define __ISL9305_H
#define ISL9305_DCD1 0
#define ISL9305_DCD2 1
#define ISL9305_LDO1 2
#define ISL9305_LDO2 3
#define ISL9305_MAX_REGULATOR ISL9305_LDO2
struct regulator_init_data;
struct isl9305_pdata {
struct regulator_init_data *init_data[ISL9305_MAX_REGULATOR];
};
#endif

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@ -136,6 +136,7 @@ struct lp855x_rom_data {
Only valid when mode is PWM_BASED.
* @size_program : total size of lp855x_rom_data
* @rom_data : list of new eeprom/eprom registers
* @supply : regulator that supplies 3V input
*/
struct lp855x_platform_data {
const char *name;
@ -144,6 +145,7 @@ struct lp855x_platform_data {
unsigned int period_ns;
int size_program;
struct lp855x_rom_data *rom_data;
struct regulator *supply;
};
#endif

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@ -0,0 +1,22 @@
#ifndef __MMC_ATMEL_MCI_H
#define __MMC_ATMEL_MCI_H
#include <linux/platform_data/dma-atmel.h>
#include <linux/platform_data/dma-dw.h>
/**
* struct mci_dma_data - DMA data for MCI interface
*/
struct mci_dma_data {
#ifdef CONFIG_ARM
struct at_dma_slave sdata;
#else
struct dw_dma_slave sdata;
#endif
};
/* accessor macros */
#define slave_data_ptr(s) (&(s)->sdata)
#define find_slave_dev(s) ((s)->sdata.dma_dev)
#endif /* __MMC_ATMEL_MCI_H */

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@ -10,32 +10,8 @@
#define OMAP_MMC_MAX_SLOTS 2
/*
* struct omap_mmc_dev_attr.flags possibilities
*
* OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can
* operate with either 1.8Vdc or 3.0Vdc card voltages; this flag
* should be set if this is the case. See for example Section 22.5.3
* "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia
* Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R).
*
* OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers
* don't work correctly on some MMC controller instances on some
* OMAP3 SoCs; this flag should be set if this is the case. See
* for example Advisory 2.1.1.128 "MMC: Multiple Block Read
* Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_
* Revision F (October 2010) (SPRZ278F).
*/
#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0)
#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1)
#define OMAP_HSMMC_SWAKEUP_MISSING BIT(2)
struct mmc_card;
struct omap_mmc_dev_attr {
u8 flags;
};
struct omap_mmc_platform_data {
/* back-link to device */
struct device *dev;
@ -106,9 +82,6 @@ struct omap_mmc_platform_data {
unsigned vcc_aux_disable_is_sleep:1;
/* we can put the features above into this variable */
#define HSMMC_HAS_PBIAS (1 << 0)
#define HSMMC_HAS_UPDATED_RESET (1 << 1)
#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
#define MMC_OMAP7XX (1 << 3)
#define MMC_OMAP15XX (1 << 4)
#define MMC_OMAP16XX (1 << 5)

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@ -71,6 +71,7 @@ struct omap_nand_platform_data {
struct mtd_partition *parts;
int nr_parts;
bool dev_ready;
bool flash_bbt;
enum nand_io xfer_type;
int devsize;
enum omap_ecc ecc_opt;

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@ -55,9 +55,4 @@ struct sdhci_pxa_platdata {
unsigned int quirks2;
unsigned int pm_caps;
};
struct sdhci_pxa {
u8 clk_enable;
u8 power_mode;
};
#endif /* _PXA_SDHCI_H_ */

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@ -1,74 +0,0 @@
/*
* rcar_du.h -- R-Car Display Unit DRM driver
*
* Copyright (C) 2013 Renesas Corporation
*
* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __RCAR_DU_H__
#define __RCAR_DU_H__
#include <drm/drm_mode.h>
enum rcar_du_output {
RCAR_DU_OUTPUT_DPAD0,
RCAR_DU_OUTPUT_DPAD1,
RCAR_DU_OUTPUT_LVDS0,
RCAR_DU_OUTPUT_LVDS1,
RCAR_DU_OUTPUT_TCON,
RCAR_DU_OUTPUT_MAX,
};
enum rcar_du_encoder_type {
RCAR_DU_ENCODER_UNUSED = 0,
RCAR_DU_ENCODER_NONE,
RCAR_DU_ENCODER_VGA,
RCAR_DU_ENCODER_LVDS,
};
struct rcar_du_panel_data {
unsigned int width_mm; /* Panel width in mm */
unsigned int height_mm; /* Panel height in mm */
struct drm_mode_modeinfo mode;
};
struct rcar_du_connector_lvds_data {
struct rcar_du_panel_data panel;
};
struct rcar_du_connector_vga_data {
/* TODO: Add DDC information for EDID retrieval */
};
/*
* struct rcar_du_encoder_data - Encoder platform data
* @type: the encoder type (RCAR_DU_ENCODER_*)
* @output: the DU output the connector is connected to (RCAR_DU_OUTPUT_*)
* @connector.lvds: platform data for LVDS connectors
* @connector.vga: platform data for VGA connectors
*
* Encoder platform data describes an on-board encoder, its associated DU SoC
* output, and the connector.
*/
struct rcar_du_encoder_data {
enum rcar_du_encoder_type type;
enum rcar_du_output output;
union {
struct rcar_du_connector_lvds_data lvds;
struct rcar_du_connector_vga_data vga;
} connector;
};
struct rcar_du_platform_data {
struct rcar_du_encoder_data *encoders;
unsigned int num_encoders;
};
#endif /* __RCAR_DU_H__ */

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@ -1,27 +0,0 @@
/*
* Copyright (C) 2012 Samsung Electronics Co.Ltd
* http://www.samsung.com/
* Author: Praveen Paneri <p.paneri@samsung.com>
*
* Defines platform data for samsung usb phy driver.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __SAMSUNG_USBPHY_PLATFORM_H
#define __SAMSUNG_USBPHY_PLATFORM_H
/**
* samsung_usbphy_data - Platform data for USB PHY driver.
* @pmu_isolation: Function to control usb phy isolation in PMU.
*/
struct samsung_usbphy_data {
void (*pmu_isolation)(int on);
};
extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
#endif /* __SAMSUNG_USBPHY_PLATFORM_H */

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@ -38,9 +38,6 @@ struct omap_uart_port_info {
unsigned int dma_rx_timeout;
unsigned int autosuspend_timeout;
unsigned int dma_rx_poll_rate;
int DTR_gpio;
int DTR_inverted;
int DTR_present;
int (*get_context_loss_count)(struct device *);
void (*enable_wakeup)(struct device *, bool);

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@ -24,7 +24,6 @@
#define ST21NFCA_HCI_DRIVER_NAME "st21nfca_hci"
struct st21nfca_nfc_platform_data {
unsigned int gpio_irq;
unsigned int gpio_ena;
unsigned int irq_polarity;
};

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@ -24,7 +24,6 @@
#define ST21NFCB_NCI_DRIVER_NAME "st21nfcb_nci"
struct st21nfcb_nfc_platform_data {
unsigned int gpio_irq;
unsigned int gpio_reset;
unsigned int irq_polarity;
};

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@ -1,34 +0,0 @@
/*
* Copyright (C) 2011 Google, Inc.
*
* Author:
* Colin Cross <ccross@android.com>
* Olof Johansson <olof@lixom.net>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __TEGRA_EMC_H_
#define __TEGRA_EMC_H_
#define TEGRA_EMC_NUM_REGS 46
struct tegra_emc_table {
unsigned long rate;
u32 regs[TEGRA_EMC_NUM_REGS];
};
struct tegra_emc_pdata {
int num_tables;
struct tegra_emc_table *tables;
};
#endif