drm/radeon/kms: remove useless clock code
This code was originally for forcing some clocks on certain asics. However, this code was later moved to asic specific functions for all of the affected asics. The only users of the original code at this point were r600, rv770, and evergreen and the code was not relevant for those asics. So, remove it. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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7 changed files with 0 additions and 98 deletions
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@ -905,53 +905,3 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
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}
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}
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static void radeon_apply_clock_quirks(struct radeon_device *rdev)
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{
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uint32_t tmp;
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/* XXX make sure engine is idle */
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if (rdev->family < CHIP_RS600) {
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tmp = RREG32_PLL(RADEON_SCLK_CNTL);
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if (ASIC_IS_R300(rdev) || ASIC_IS_RV100(rdev))
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tmp |= RADEON_SCLK_FORCE_CP | RADEON_SCLK_FORCE_VIP;
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if ((rdev->family == CHIP_RV250)
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|| (rdev->family == CHIP_RV280))
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tmp |=
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RADEON_SCLK_FORCE_DISP1 | RADEON_SCLK_FORCE_DISP2;
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if ((rdev->family == CHIP_RV350)
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|| (rdev->family == CHIP_RV380))
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tmp |= R300_SCLK_FORCE_VAP;
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if (rdev->family == CHIP_R420)
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tmp |= R300_SCLK_FORCE_PX | R300_SCLK_FORCE_TX;
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WREG32_PLL(RADEON_SCLK_CNTL, tmp);
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} else if (rdev->family < CHIP_R600) {
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tmp = RREG32_PLL(AVIVO_CP_DYN_CNTL);
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tmp |= AVIVO_CP_FORCEON;
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WREG32_PLL(AVIVO_CP_DYN_CNTL, tmp);
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tmp = RREG32_PLL(AVIVO_E2_DYN_CNTL);
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tmp |= AVIVO_E2_FORCEON;
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WREG32_PLL(AVIVO_E2_DYN_CNTL, tmp);
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tmp = RREG32_PLL(AVIVO_IDCT_DYN_CNTL);
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tmp |= AVIVO_IDCT_FORCEON;
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WREG32_PLL(AVIVO_IDCT_DYN_CNTL, tmp);
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}
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}
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int radeon_static_clocks_init(struct drm_device *dev)
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{
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struct radeon_device *rdev = dev->dev_private;
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/* XXX make sure engine is idle */
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if (radeon_dynclks != -1) {
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if (radeon_dynclks) {
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if (rdev->asic->set_clock_gating)
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radeon_set_clock_gating(rdev, 1);
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}
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}
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radeon_apply_clock_quirks(rdev);
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return 0;
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}
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