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This is the bulk of pin control changes for the v4.1 development

Browse source 
cycle:
 
 New drivers:
   - Intel Sunrisepoint
   - AMD KERNCZ GPIO
   - Broadcom Cygnus IOMUX
 
 New subdrivers:
   - Marvell MVEBU Armada 39x SoCs
   - Samsung Exynos 5433
   - nVidia Tegra 210
   - Mediatek MT8135
   - Mediatek MT8173
   - AMLogic Meson8b
   - Qualcomm PM8916
 
 On top of this cleanups and development history for the above
 drivers as issues were fixed after merging.
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Merge tag 'pinctrl-v4.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pincontrol updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.1 development
  cycle.  Nothing really exciting this time: we basically added a few
  new drivers and subdrivers and stabilized them in linux-next.  Some
  cleanups too.  With sunrisepoint Intel has a real fine fully featured
  pin control driver for contemporary hardware, and the AMD driver is
  also for large deployments.  Most of the others are ARM devices.

  New drivers:
    - Intel Sunrisepoint
    - AMD KERNCZ GPIO
    - Broadcom Cygnus IOMUX

  New subdrivers:
    - Marvell MVEBU Armada 39x SoCs
    - Samsung Exynos 5433
    - nVidia Tegra 210
    - Mediatek MT8135
    - Mediatek MT8173
    - AMLogic Meson8b
    - Qualcomm PM8916

  On top of this cleanups and development history for the above drivers
  as issues were fixed after merging"

* tag 'pinctrl-v4.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (71 commits)
  pinctrl: sirf: move sgpio lock into state container
  pinctrl: Add support for PM8916 GPIO's and MPP's
  pinctrl: bcm2835: Fix support for threaded level triggered IRQs
  sh-pfc: r8a7790: add EtherAVB pin groups
  pinctrl: Document "function" + "pins" pinmux binding
  pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support
  pinctrl: fsl: imx: Check for 0 config register
  pinctrl: Add support for Meson8b
  documentation: Extend pinctrl docs for Meson8b
  pinctrl: Cleanup Meson8 driver
  Fix inconsistent spinlock of AMD GPIO driver which can be recognized by static analysis tool smatch. Declare constant Variables with Sparse's suggestion.
  pinctrl: at91: convert __raw to endian agnostic IO
  pinctrl: constify of_device_id array
  pinctrl: pinconf-generic: add dt node names to error messages
  pinctrl: pinconf-generic: scan also referenced phandle node
  pinctrl: mvebu: add suspend/resume support to Armada XP pinctrl driver
  pinctrl: st: Display pin's function when printing pinctrl debug information
  pinctrl: st: Show correct pin direction also in GPIO mode
  pinctrl: st: Supply a GPIO get_direction() call-back
  pinctrl: st: Move st_get_pio_control() further up the source file
  ...
This commit is contained in:
Linus Torvalds 2015-04-14 17:58:15 -07:00
commit 07e492eb89
96 changed files with 15302 additions and 936 deletions
Download patch file Download diff file Expand all files Collapse all files

32
include/dt-bindings/gpio/meson8b-gpio.h Normal file
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@ -0,0 +1,32 @@
/*
* GPIO definitions for Amlogic Meson8b SoCs
*
* Copyright (C) 2015 Endless Mobile, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _DT_BINDINGS_MESON8B_GPIO_H
#define _DT_BINDINGS_MESON8B_GPIO_H
#include <dt-bindings/gpio/meson8-gpio.h>
/* GPIO Bank DIF */
#define DIF_0_P 120
#define DIF_0_N 121
#define DIF_1_P 122
#define DIF_1_N 123
#define DIF_2_P 124
#define DIF_2_N 125
#define DIF_3_P 126
#define DIF_3_N 127
#define DIF_4_P 128
#define DIF_4_N 129
#endif /* _DT_BINDINGS_MESON8B_GPIO_H */

40
include/dt-bindings/pinctrl/mt65xx.h Normal file
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@ -0,0 +1,40 @@
/*
* Copyright (c) 2014 MediaTek Inc.
* Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _DT_BINDINGS_PINCTRL_MT65XX_H
#define _DT_BINDINGS_PINCTRL_MT65XX_H
#define MTK_PIN_NO(x) ((x) << 8)
#define MTK_GET_PIN_NO(x) ((x) >> 8)
#define MTK_GET_PIN_FUNC(x) ((x) & 0xf)
#define MTK_PUPD_SET_R1R0_00 100
#define MTK_PUPD_SET_R1R0_01 101
#define MTK_PUPD_SET_R1R0_10 102
#define MTK_PUPD_SET_R1R0_11 103
#define MTK_DRIVE_2mA 2
#define MTK_DRIVE_4mA 4
#define MTK_DRIVE_6mA 6
#define MTK_DRIVE_8mA 8
#define MTK_DRIVE_10mA 10
#define MTK_DRIVE_12mA 12
#define MTK_DRIVE_14mA 14
#define MTK_DRIVE_16mA 16
#define MTK_DRIVE_20mA 20
#define MTK_DRIVE_24mA 24
#define MTK_DRIVE_28mA 28
#define MTK_DRIVE_32mA 32
#endif /* _DT_BINDINGS_PINCTRL_MT65XX_H */

15
include/dt-bindings/pinctrl/qcom,pmic-gpio.h
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@ -48,6 +48,14 @@
#define PM8058_GPIO_L5 6
#define PM8058_GPIO_L2 7
/*
* Note: PM8916 GPIO1 and GPIO2 are supporting
* only L2(1.15V) and L5(1.8V) options
*/
#define PM8916_GPIO_VPH 0
#define PM8916_GPIO_L2 2
#define PM8916_GPIO_L5 3
#define PM8917_GPIO_VPH 0
#define PM8917_GPIO_S4 2
#define PM8917_GPIO_L15 3
@ -115,6 +123,13 @@
#define PM8058_GPIO39_MP3_CLK PMIC_GPIO_FUNC_FUNC1
#define PM8058_GPIO40_EXT_BB_EN PMIC_GPIO_FUNC_FUNC1
#define PM8916_GPIO1_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1
#define PM8916_GPIO1_KEYP_DRV PMIC_GPIO_FUNC_FUNC2
#define PM8916_GPIO2_DIV_CLK PMIC_GPIO_FUNC_FUNC1
#define PM8916_GPIO2_SLEEP_CLK PMIC_GPIO_FUNC_FUNC2
#define PM8916_GPIO3_KEYP_DRV PMIC_GPIO_FUNC_FUNC1
#define PM8916_GPIO4_KEYP_DRV PMIC_GPIO_FUNC_FUNC2
#define PM8917_GPIO9_18_KEYP_DRV PMIC_GPIO_FUNC_FUNC1
#define PM8917_GPIO20_BAT_ALRM_OUT PMIC_GPIO_FUNC_FUNC1
#define PM8917_GPIO21_23_UART_TX PMIC_GPIO_FUNC_FUNC2

4
include/dt-bindings/pinctrl/qcom,pmic-mpp.h
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@ -10,6 +10,10 @@
#define PM8841_MPP_VPH 0
#define PM8841_MPP_S3 2
#define PM8916_MPP_VPH 0
#define PM8916_MPP_L2 2
#define PM8916_MPP_L5 3
#define PM8941_MPP_VPH 0
#define PM8941_MPP_L1 1
#define PM8941_MPP_S3 2