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spi/mcspi: allow configuration of pin directions

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Allow D0 to be an input and D1 to be an output, configurable via
platform data and a new DT property.

Based on a patch from  Matus Ujhelyi <matus.ujhelyi@streamunlimited.com>

Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Daniel Mack 2012-10-07 18:19:44 +02:00 • committed by Mark Brown
commit 0384e90b85
3 changed files with 25 additions and 8 deletions
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4
Documentation/devicetree/bindings/spi/omap-spi.txt
View file

@ -6,7 +6,9 @@ Required properties:
- "ti,omap4-spi" for OMAP4+. - "ti,omap4-spi" for OMAP4+.
- ti,spi-num-cs : Number of chipselect supported by the instance. - ti,spi-num-cs : Number of chipselect supported by the instance.
- ti,hwmods: Name of the hwmod associated to the McSPI - ti,hwmods: Name of the hwmod associated to the McSPI
- ti,pindir-d0-in-d1-out: Select the D0 pin as input and D1 as
output. The default is D0 as output and
D1 as input.
Example: Example:

23
drivers/spi/spi-omap2-mcspi.c
View file

@ -130,6 +130,7 @@ struct omap2_mcspi {
struct omap2_mcspi_dma *dma_channels; struct omap2_mcspi_dma *dma_channels;
struct device *dev; struct device *dev;
struct omap2_mcspi_regs ctx; struct omap2_mcspi_regs ctx;
unsigned int pin_dir:1;
}; };
struct omap2_mcspi_cs { struct omap2_mcspi_cs {
@ -765,8 +766,15 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi,
/* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
* REVISIT: this controller could support SPI_3WIRE mode. * REVISIT: this controller could support SPI_3WIRE mode.
*/ */
l &= ~(OMAP2_MCSPI_CHCONF_IS|OMAP2_MCSPI_CHCONF_DPE1); if (mcspi->pin_dir == MCSPI_PINDIR_D0_OUT_D1_IN) {
l &= ~OMAP2_MCSPI_CHCONF_IS;
l &= ~OMAP2_MCSPI_CHCONF_DPE1;
l |= OMAP2_MCSPI_CHCONF_DPE0; l |= OMAP2_MCSPI_CHCONF_DPE0;
} else {
l |= OMAP2_MCSPI_CHCONF_IS;
l |= OMAP2_MCSPI_CHCONF_DPE1;
l &= ~OMAP2_MCSPI_CHCONF_DPE0;
}
/* wordlength */ /* wordlength */
l &= ~OMAP2_MCSPI_CHCONF_WL_MASK; l &= ~OMAP2_MCSPI_CHCONF_WL_MASK;
@ -1167,6 +1175,11 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev)
master->cleanup = omap2_mcspi_cleanup; master->cleanup = omap2_mcspi_cleanup;
master->dev.of_node = node; master->dev.of_node = node;
dev_set_drvdata(&pdev->dev, master);
mcspi = spi_master_get_devdata(master);
mcspi->master = master;
match = of_match_device(omap_mcspi_of_match, &pdev->dev); match = of_match_device(omap_mcspi_of_match, &pdev->dev);
if (match) { if (match) {
u32 num_cs = 1; /* default number of chipselect */ u32 num_cs = 1; /* default number of chipselect */
@ -1175,19 +1188,17 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev)
of_property_read_u32(node, "ti,spi-num-cs", &num_cs); of_property_read_u32(node, "ti,spi-num-cs", &num_cs);
master->num_chipselect = num_cs; master->num_chipselect = num_cs;
master->bus_num = bus_num++; master->bus_num = bus_num++;
if (of_get_property(node, "ti,pindir-d0-in-d1-out", NULL))
mcspi->pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT;
} else { } else {
pdata = pdev->dev.platform_data; pdata = pdev->dev.platform_data;
master->num_chipselect = pdata->num_cs; master->num_chipselect = pdata->num_cs;
if (pdev->id != -1) if (pdev->id != -1)
master->bus_num = pdev->id; master->bus_num = pdev->id;
mcspi->pin_dir = pdata->pin_dir;
} }
regs_offset = pdata->regs_offset; regs_offset = pdata->regs_offset;
dev_set_drvdata(&pdev->dev, master);
mcspi = spi_master_get_devdata(master);
mcspi->master = master;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0); r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (r == NULL) { if (r == NULL) {
status = -ENODEV; status = -ENODEV;

4
include/linux/platform_data/spi-omap2-mcspi.h
View file

@ -7,9 +7,13 @@
#define OMAP4_MCSPI_REG_OFFSET 0x100 #define OMAP4_MCSPI_REG_OFFSET 0x100
#define MCSPI_PINDIR_D0_OUT_D1_IN 0
#define MCSPI_PINDIR_D0_IN_D1_OUT 1
struct omap2_mcspi_platform_config { struct omap2_mcspi_platform_config {
unsigned short num_cs; unsigned short num_cs;
unsigned int regs_offset; unsigned int regs_offset;
unsigned int pin_dir:1;
}; };
struct omap2_mcspi_dev_attr { struct omap2_mcspi_dev_attr {