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i2c: piix4: Add support for AMD ML and CZ SMBus changes

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The locations of SMBus register base address and enablement bit are changed
from AMD ML, which need this patch to be supported.

Signed-off-by: Shane Huang <shane.huang@amd.com>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@vger.kernel.org
This commit is contained in:
Shane Huang 2014-01-22 14:05:46 -08:00 • committed by Wolfram Sang
parent 3aacd625f2
commit 032f708bc4
3 changed files with 25 additions and 6 deletions
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2
Documentation/i2c/busses/i2c-piix4
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@ -13,7 +13,7 @@ Supported adapters:
* AMD SP5100 (SB700 derivative found on some server mainboards)
Datasheet: Publicly available at the AMD website
http://support.amd.com/us/Embedded_TechDocs/44413.pdf
* AMD Hudson-2, CZ
* AMD Hudson-2, ML, CZ
Datasheet: Not publicly available
* Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
Datasheet: Publicly available at the SMSC website http://www.smsc.com