2009-01-14 20:17:06 +01:00
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/*
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2011-05-17 13:36:18 +05:30
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* Copyright (c) 2008-2011 Atheros Communications Inc.
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2009-01-14 20:17:06 +01:00
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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2012-03-18 17:30:52 -07:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2009-01-14 20:17:06 +01:00
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#include <linux/nl80211.h>
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#include <linux/pci.h>
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2011-07-29 15:59:08 +02:00
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#include <linux/pci-aspm.h>
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2010-11-17 04:25:33 +01:00
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#include <linux/ath9k_platform.h>
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2011-07-03 15:21:01 -04:00
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#include <linux/module.h>
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2009-02-09 13:26:54 +05:30
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#include "ath9k.h"
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2009-01-14 20:17:06 +01:00
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2010-01-07 11:58:11 +00:00
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static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
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2009-01-14 20:17:06 +01:00
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{ PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
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{ PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
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{ PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
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{ PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
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{ PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
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2013-08-04 14:21:58 +05:30
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2013-08-25 16:30:40 +05:30
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002A,
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PCI_VENDOR_ID_AZWAVE,
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0x1C71),
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.driver_data = ATH9K_PCI_D3_L1_WAR },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002A,
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PCI_VENDOR_ID_FOXCONN,
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0xE01F),
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.driver_data = ATH9K_PCI_D3_L1_WAR },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002A,
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0x11AD, /* LITEON */
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0x6632),
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.driver_data = ATH9K_PCI_D3_L1_WAR },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002A,
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0x11AD, /* LITEON */
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0x6642),
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.driver_data = ATH9K_PCI_D3_L1_WAR },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002A,
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PCI_VENDOR_ID_QMI,
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0x0306),
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.driver_data = ATH9K_PCI_D3_L1_WAR },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002A,
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0x185F, /* WNC */
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0x309D),
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.driver_data = ATH9K_PCI_D3_L1_WAR },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002A,
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0x10CF, /* Fujitsu */
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0x147C),
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.driver_data = ATH9K_PCI_D3_L1_WAR },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002A,
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0x10CF, /* Fujitsu */
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0x147D),
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.driver_data = ATH9K_PCI_D3_L1_WAR },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002A,
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0x10CF, /* Fujitsu */
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0x1536),
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.driver_data = ATH9K_PCI_D3_L1_WAR },
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2013-08-04 14:21:58 +05:30
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/* AR9285 card for Asus */
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x002B,
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PCI_VENDOR_ID_AZWAVE,
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0x2C37),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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2009-01-14 20:17:06 +01:00
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{ PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
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2010-02-02 11:58:33 -05:00
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{ PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
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2009-07-23 10:59:57 +05:30
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{ PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */
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{ PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
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2010-06-12 00:34:02 -04:00
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{ PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
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2013-06-13 22:51:26 +05:30
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/* PCI-E CUS198 */
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x2086),
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2013-08-04 14:21:58 +05:30
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.driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
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2013-06-13 22:51:26 +05:30
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x1237),
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2013-08-04 14:21:58 +05:30
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.driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
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2013-06-13 22:51:26 +05:30
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x2126),
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2013-08-04 14:21:58 +05:30
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.driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
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2013-08-20 13:05:58 +05:30
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x126A),
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.driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
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2013-06-18 10:13:43 +05:30
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/* PCI-E CUS230 */
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2013-06-13 22:51:26 +05:30
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x2152),
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2013-08-04 14:21:58 +05:30
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.driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
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2013-06-13 22:51:26 +05:30
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_FOXCONN,
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0xE075),
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2013-08-04 14:21:58 +05:30
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.driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
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2013-06-13 22:51:26 +05:30
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2013-08-05 15:08:28 +05:30
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/* WB225 */
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_ATHEROS,
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0x3119),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_ATHEROS,
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0x3122),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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0x185F, /* WNC */
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0x3119),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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0x185F, /* WNC */
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0x3027),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_SAMSUNG,
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0x4105),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_SAMSUNG,
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0x4106),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_SAMSUNG,
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0x410D),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_SAMSUNG,
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0x410E),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_SAMSUNG,
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0x410F),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_SAMSUNG,
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0xC706),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_SAMSUNG,
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0xC680),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_SAMSUNG,
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0xC708),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_LENOVO,
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0x3218),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_LENOVO,
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0x3219),
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.driver_data = ATH9K_PCI_BT_ANT_DIV },
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2013-11-08 11:45:25 +05:30
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/* AR9485 cards with PLL power-save disabled by default. */
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x2C97),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x2100),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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0x1C56, /* ASKEY */
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0x4001),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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0x11AD, /* LITEON */
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0x6627),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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0x11AD, /* LITEON */
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0x6628),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_FOXCONN,
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0xE04E),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_FOXCONN,
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0xE04F),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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0x144F, /* ASKEY */
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0x7197),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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0x1B9A, /* XAVI */
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0x2000),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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0x1B9A, /* XAVI */
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0x2001),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x1186),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x1F86),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x1195),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
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0x0032,
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PCI_VENDOR_ID_AZWAVE,
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0x1F95),
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.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
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|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0032,
|
|
|
|
|
0x1B9A, /* XAVI */
|
|
|
|
|
0x1C00),
|
|
|
|
|
.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0032,
|
|
|
|
|
0x1B9A, /* XAVI */
|
|
|
|
|
0x1C01),
|
|
|
|
|
.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0032,
|
|
|
|
|
PCI_VENDOR_ID_ASUSTEK,
|
|
|
|
|
0x850D),
|
|
|
|
|
.driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
|
|
|
|
|
|
2010-12-06 04:28:00 -08:00
|
|
|
{ PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
|
2011-08-23 13:37:07 -07:00
|
|
|
{ PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
|
2013-06-18 15:42:36 +05:30
|
|
|
|
|
|
|
|
/* PCI-E CUS217 */
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
PCI_VENDOR_ID_AZWAVE,
|
|
|
|
|
0x2116),
|
|
|
|
|
.driver_data = ATH9K_PCI_CUS217 },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x6661),
|
|
|
|
|
.driver_data = ATH9K_PCI_CUS217 },
|
|
|
|
|
|
2013-06-21 11:11:52 +05:30
|
|
|
/* AR9462 with WoW support */
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x3117),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
PCI_VENDOR_ID_LENOVO,
|
|
|
|
|
0x3214),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
PCI_VENDOR_ID_ATTANSIC,
|
|
|
|
|
0x0091),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
PCI_VENDOR_ID_AZWAVE,
|
|
|
|
|
0x2110),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
PCI_VENDOR_ID_ASUSTEK,
|
|
|
|
|
0x850E),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x6631),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x6641),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
PCI_VENDOR_ID_HP,
|
|
|
|
|
0x1864),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
0x14CD, /* USI */
|
|
|
|
|
0x0063),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
0x14CD, /* USI */
|
|
|
|
|
0x0064),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0034,
|
|
|
|
|
0x10CF, /* Fujitsu */
|
|
|
|
|
0x1783),
|
|
|
|
|
.driver_data = ATH9K_PCI_WOW },
|
|
|
|
|
|
2011-10-13 11:00:44 +05:30
|
|
|
{ PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9462 */
|
2012-08-02 11:58:50 +05:30
|
|
|
{ PCI_VDEVICE(ATHEROS, 0x0037) }, /* PCI-E AR1111/AR9485 */
|
2013-09-02 13:59:04 +05:30
|
|
|
|
2013-09-02 13:59:05 +05:30
|
|
|
/* CUS252 */
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x3028),
|
2013-09-02 13:59:06 +05:30
|
|
|
.driver_data = ATH9K_PCI_CUS252 |
|
|
|
|
|
ATH9K_PCI_AR9565_2ANT |
|
|
|
|
|
ATH9K_PCI_BT_ANT_DIV },
|
2013-09-02 13:59:05 +05:30
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_AZWAVE,
|
|
|
|
|
0x2176),
|
2013-09-02 13:59:06 +05:30
|
|
|
.driver_data = ATH9K_PCI_CUS252 |
|
|
|
|
|
ATH9K_PCI_AR9565_2ANT |
|
|
|
|
|
ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
|
|
|
|
|
/* WB335 1-ANT */
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_FOXCONN,
|
|
|
|
|
0xE068),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x185F, /* WNC */
|
|
|
|
|
0xA119),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x0632),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x6671),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x1B9A, /* XAVI */
|
|
|
|
|
0x2811),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x1B9A, /* XAVI */
|
|
|
|
|
0x2812),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT },
|
|
|
|
|
|
|
|
|
|
/* WB335 1-ANT / Antenna Diversity */
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x3025),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x3026),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x302B),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_FOXCONN,
|
|
|
|
|
0xE069),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x185F, /* WNC */
|
|
|
|
|
0x3028),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x0622),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x0672),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x0662),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_AZWAVE,
|
|
|
|
|
0x213A),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_LENOVO,
|
|
|
|
|
0x3026),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_HP,
|
|
|
|
|
0x18E3),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_HP,
|
|
|
|
|
0x217F),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
2013-09-05 10:56:54 +05:30
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_DELL,
|
|
|
|
|
0x020E),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
|
2013-09-02 13:59:06 +05:30
|
|
|
|
|
|
|
|
/* WB335 2-ANT */
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_SAMSUNG,
|
|
|
|
|
0x411A),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_SAMSUNG,
|
|
|
|
|
0x411B),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_SAMSUNG,
|
|
|
|
|
0x411C),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_SAMSUNG,
|
|
|
|
|
0x411D),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_SAMSUNG,
|
|
|
|
|
0x411E),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT },
|
|
|
|
|
|
|
|
|
|
/* WB335 2-ANT / Antenna-Diversity */
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x3027),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x302C),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x0642),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x0652),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x11AD, /* LITEON */
|
|
|
|
|
0x0612),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
PCI_VENDOR_ID_AZWAVE,
|
|
|
|
|
0x2130),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x144F, /* ASKEY */
|
|
|
|
|
0x7202),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x1B9A, /* XAVI */
|
|
|
|
|
0x2810),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
|
|
|
|
|
0x0036,
|
|
|
|
|
0x185F, /* WNC */
|
|
|
|
|
0x3027),
|
|
|
|
|
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
2013-09-02 13:59:05 +05:30
|
|
|
|
2013-09-02 13:59:04 +05:30
|
|
|
/* PCI-E AR9565 (WB335) */
|
|
|
|
|
{ PCI_VDEVICE(ATHEROS, 0x0036),
|
|
|
|
|
.driver_data = ATH9K_PCI_BT_ANT_DIV },
|
|
|
|
|
|
2009-01-14 20:17:06 +01:00
|
|
|
{ 0 }
|
|
|
|
|
};
|
|
|
|
|
|
2011-08-05 13:10:32 +02:00
|
|
|
|
2009-01-14 20:17:06 +01:00
|
|
|
/* return bus cachesize in 4B word units */
|
2009-09-14 00:55:09 -07:00
|
|
|
static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
|
2009-01-14 20:17:06 +01:00
|
|
|
{
|
2009-09-28 02:54:40 -04:00
|
|
|
struct ath_softc *sc = (struct ath_softc *) common->priv;
|
2009-01-14 20:17:06 +01:00
|
|
|
u8 u8tmp;
|
|
|
|
|
|
2009-09-07 17:46:50 +05:30
|
|
|
pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
|
2009-01-14 20:17:06 +01:00
|
|
|
*csz = (int)u8tmp;
|
|
|
|
|
|
|
|
|
|
/*
|
2011-03-30 22:57:33 -03:00
|
|
|
* This check was put in to avoid "unpleasant" consequences if
|
2009-01-14 20:17:06 +01:00
|
|
|
* the bootrom has not fully initialized all PCI devices.
|
|
|
|
|
* Sometimes the cache line size register is not set
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
if (*csz == 0)
|
|
|
|
|
*csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
|
|
|
|
|
}
|
|
|
|
|
|
2009-09-14 00:55:09 -07:00
|
|
|
static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
|
2009-01-14 20:17:08 +01:00
|
|
|
{
|
2010-11-17 04:25:33 +01:00
|
|
|
struct ath_softc *sc = (struct ath_softc *) common->priv;
|
|
|
|
|
struct ath9k_platform_data *pdata = sc->dev->platform_data;
|
|
|
|
|
|
|
|
|
|
if (pdata) {
|
|
|
|
|
if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
|
2010-12-02 19:12:36 -08:00
|
|
|
ath_err(common,
|
|
|
|
|
"%s: eeprom read failed, offset %08x is out of range\n",
|
|
|
|
|
__func__, off);
|
2010-11-17 04:25:33 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
*data = pdata->eeprom_data[off];
|
|
|
|
|
} else {
|
|
|
|
|
struct ath_hw *ah = (struct ath_hw *) common->ah;
|
|
|
|
|
|
|
|
|
|
common->ops->read(ah, AR5416_EEPROM_OFFSET +
|
|
|
|
|
(off << AR5416_EEPROM_S));
|
|
|
|
|
|
|
|
|
|
if (!ath9k_hw_wait(ah,
|
|
|
|
|
AR_EEPROM_STATUS_DATA,
|
|
|
|
|
AR_EEPROM_STATUS_DATA_BUSY |
|
|
|
|
|
AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
|
|
|
|
|
AH_WAIT_TIMEOUT)) {
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
*data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
|
|
|
|
|
AR_EEPROM_STATUS_DATA_VAL);
|
2009-01-14 20:17:08 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
2011-08-05 13:10:34 +02:00
|
|
|
/* Need to be called after we discover btcoex capabilities */
|
2011-07-29 15:59:08 +02:00
|
|
|
static void ath_pci_aspm_init(struct ath_common *common)
|
|
|
|
|
{
|
|
|
|
|
struct ath_softc *sc = (struct ath_softc *) common->priv;
|
|
|
|
|
struct ath_hw *ah = sc->sc_ah;
|
|
|
|
|
struct pci_dev *pdev = to_pci_dev(sc->dev);
|
|
|
|
|
struct pci_dev *parent;
|
2012-07-24 17:20:25 +08:00
|
|
|
u16 aspm;
|
2011-07-29 15:59:08 +02:00
|
|
|
|
2012-06-04 16:27:14 +05:30
|
|
|
if (!ah->is_pciexpress)
|
|
|
|
|
return;
|
|
|
|
|
|
2011-07-29 15:59:08 +02:00
|
|
|
parent = pdev->bus->self;
|
2011-08-24 14:08:41 -04:00
|
|
|
if (!parent)
|
|
|
|
|
return;
|
2011-08-05 13:10:34 +02:00
|
|
|
|
2012-09-22 00:14:28 +05:30
|
|
|
if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
|
|
|
|
|
(AR_SREV_9285(ah))) {
|
2012-12-05 13:51:19 -07:00
|
|
|
/* Bluetooth coexistence requires disabling ASPM. */
|
2012-07-24 17:20:25 +08:00
|
|
|
pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
|
2012-12-05 13:51:19 -07:00
|
|
|
PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
|
2011-08-05 13:10:34 +02:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Both upstream and downstream PCIe components should
|
|
|
|
|
* have the same ASPM settings.
|
|
|
|
|
*/
|
2012-07-24 17:20:25 +08:00
|
|
|
pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
|
2012-12-05 13:51:19 -07:00
|
|
|
PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
|
2011-08-05 13:10:34 +02:00
|
|
|
|
2012-06-04 16:27:14 +05:30
|
|
|
ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
|
2011-08-05 13:10:34 +02:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2013-08-25 14:43:09 +05:30
|
|
|
/*
|
|
|
|
|
* 0x70c - Ack Frequency Register.
|
|
|
|
|
*
|
|
|
|
|
* Bits 27:29 - DEFAULT_L1_ENTRANCE_LATENCY.
|
|
|
|
|
*
|
|
|
|
|
* 000 : 1 us
|
|
|
|
|
* 001 : 2 us
|
|
|
|
|
* 010 : 4 us
|
|
|
|
|
* 011 : 8 us
|
|
|
|
|
* 100 : 16 us
|
|
|
|
|
* 101 : 32 us
|
|
|
|
|
* 110/111 : 64 us
|
|
|
|
|
*/
|
|
|
|
|
if (AR_SREV_9462(ah))
|
|
|
|
|
pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
|
|
|
|
|
|
2012-07-24 17:20:25 +08:00
|
|
|
pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
|
2012-12-05 13:51:19 -07:00
|
|
|
if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
|
2011-07-29 15:59:08 +02:00
|
|
|
ah->aspm_enabled = true;
|
|
|
|
|
/* Initialize PCIe PM and SERDES registers. */
|
2011-08-05 13:10:32 +02:00
|
|
|
ath9k_hw_configpcipowersave(ah, false);
|
2012-06-04 16:27:14 +05:30
|
|
|
ath_info(common, "ASPM enabled: 0x%x\n", aspm);
|
2011-07-29 15:59:08 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2009-12-23 14:04:43 +01:00
|
|
|
static const struct ath_bus_ops ath_pci_bus_ops = {
|
2010-04-01 10:28:20 +05:30
|
|
|
.ath_bus_type = ATH_PCI,
|
2009-01-14 20:17:06 +01:00
|
|
|
.read_cachesize = ath_pci_read_cachesize,
|
2009-01-14 20:17:08 +01:00
|
|
|
.eeprom_read = ath_pci_eeprom_read,
|
2011-07-29 15:59:08 +02:00
|
|
|
.aspm_init = ath_pci_aspm_init,
|
2009-01-14 20:17:06 +01:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
|
|
{
|
|
|
|
|
struct ath_softc *sc;
|
|
|
|
|
struct ieee80211_hw *hw;
|
|
|
|
|
u8 csz;
|
ath9k: Fix PCI FATAL interrupts by restoring RETRY_TIMEOUT disabling
An earlier commit, 'ath9k: remove dummy PCI "retry timeout" fix', removed
code that was documented to disable RETRY_TIMEOUT register (PCI reg
0x41) since it was claimed to be a no-op. However, it turns out that
there are some combinations of hosts and ath9k-supported cards for
which this is not a no-op (reg 0x41 has value 0x80, not 0) and this
code (or something similar) is needed. In such cases, the driver may
be next to unusable due to very frequent PCI FATAL interrupts from the
card.
Reverting the earlier commit, i.e., restoring the RETRY_TIMEOUT
disabling, seems to resolve the issue. Since the removal of this code
was not based on any known issue and was purely a cleanup change, the
safest option here is to just revert that commit. Should there be
desire to clean this up in the future, the change will need to be
tested with a more complete coverage of cards and host systems.
http://bugzilla.kernel.org/show_bug.cgi?id=13483
Cc: stable@kernel.org
Signed-off-by: Jouni Malinen <jouni.malinen@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2009-06-16 11:59:23 +03:00
|
|
|
u32 val;
|
2009-01-14 20:17:06 +01:00
|
|
|
int ret = 0;
|
2009-10-27 12:59:34 -04:00
|
|
|
char hw_name[64];
|
2009-01-14 20:17:06 +01:00
|
|
|
|
2012-12-12 13:14:22 +01:00
|
|
|
if (pcim_enable_device(pdev))
|
2009-01-14 20:17:06 +01:00
|
|
|
return -EIO;
|
|
|
|
|
|
2009-04-13 14:40:14 -07:00
|
|
|
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
2009-01-14 20:17:06 +01:00
|
|
|
if (ret) {
|
2012-03-18 17:30:52 -07:00
|
|
|
pr_err("32-bit DMA not available\n");
|
2012-12-12 13:14:22 +01:00
|
|
|
return ret;
|
2009-01-14 20:17:06 +01:00
|
|
|
}
|
|
|
|
|
|
2009-04-13 14:40:14 -07:00
|
|
|
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
|
2009-01-14 20:17:06 +01:00
|
|
|
if (ret) {
|
2012-03-18 17:30:52 -07:00
|
|
|
pr_err("32-bit DMA consistent DMA enable failed\n");
|
2012-12-12 13:14:22 +01:00
|
|
|
return ret;
|
2009-01-14 20:17:06 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Cache line size is used to size and align various
|
|
|
|
|
* structures used to communicate with the hardware.
|
|
|
|
|
*/
|
|
|
|
|
pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
|
|
|
|
|
if (csz == 0) {
|
|
|
|
|
/*
|
|
|
|
|
* Linux 2.4.18 (at least) writes the cache line size
|
|
|
|
|
* register as a 16-bit wide register which is wrong.
|
|
|
|
|
* We must have this setup properly for rx buffer
|
|
|
|
|
* DMA to work so force a reasonable value here if it
|
|
|
|
|
* comes up zero.
|
|
|
|
|
*/
|
|
|
|
|
csz = L1_CACHE_BYTES / sizeof(u32);
|
|
|
|
|
pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
|
|
|
|
|
}
|
|
|
|
|
/*
|
|
|
|
|
* The default setting of latency timer yields poor results,
|
|
|
|
|
* set it to the value used by other systems. It may be worth
|
|
|
|
|
* tweaking this setting more.
|
|
|
|
|
*/
|
|
|
|
|
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
|
|
|
|
|
|
|
|
|
|
pci_set_master(pdev);
|
|
|
|
|
|
ath9k: Fix PCI FATAL interrupts by restoring RETRY_TIMEOUT disabling
An earlier commit, 'ath9k: remove dummy PCI "retry timeout" fix', removed
code that was documented to disable RETRY_TIMEOUT register (PCI reg
0x41) since it was claimed to be a no-op. However, it turns out that
there are some combinations of hosts and ath9k-supported cards for
which this is not a no-op (reg 0x41 has value 0x80, not 0) and this
code (or something similar) is needed. In such cases, the driver may
be next to unusable due to very frequent PCI FATAL interrupts from the
card.
Reverting the earlier commit, i.e., restoring the RETRY_TIMEOUT
disabling, seems to resolve the issue. Since the removal of this code
was not based on any known issue and was purely a cleanup change, the
safest option here is to just revert that commit. Should there be
desire to clean this up in the future, the change will need to be
tested with a more complete coverage of cards and host systems.
http://bugzilla.kernel.org/show_bug.cgi?id=13483
Cc: stable@kernel.org
Signed-off-by: Jouni Malinen <jouni.malinen@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2009-06-16 11:59:23 +03:00
|
|
|
/*
|
|
|
|
|
* Disable the RETRY_TIMEOUT register (0x41) to keep
|
|
|
|
|
* PCI Tx retries from interfering with C3 CPU state.
|
|
|
|
|
*/
|
|
|
|
|
pci_read_config_dword(pdev, 0x40, &val);
|
|
|
|
|
if ((val & 0x0000ff00) != 0)
|
|
|
|
|
pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
|
|
|
|
|
|
2012-12-12 13:14:22 +01:00
|
|
|
ret = pcim_iomap_regions(pdev, BIT(0), "ath9k");
|
2009-01-14 20:17:06 +01:00
|
|
|
if (ret) {
|
|
|
|
|
dev_err(&pdev->dev, "PCI memory region reserve error\n");
|
2012-12-12 13:14:22 +01:00
|
|
|
return -ENODEV;
|
2009-01-14 20:17:06 +01:00
|
|
|
}
|
|
|
|
|
|
2011-01-24 19:23:18 +01:00
|
|
|
hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
|
2009-09-02 16:34:57 -07:00
|
|
|
if (!hw) {
|
2010-01-08 10:36:07 +05:30
|
|
|
dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
|
2012-12-12 13:14:22 +01:00
|
|
|
return -ENOMEM;
|
2009-01-14 20:17:06 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
SET_IEEE80211_DEV(hw, &pdev->dev);
|
|
|
|
|
pci_set_drvdata(pdev, hw);
|
|
|
|
|
|
2011-01-24 19:23:18 +01:00
|
|
|
sc = hw->priv;
|
2009-01-14 20:17:06 +01:00
|
|
|
sc->hw = hw;
|
|
|
|
|
sc->dev = &pdev->dev;
|
2012-12-12 13:14:22 +01:00
|
|
|
sc->mem = pcim_iomap_table(pdev)[0];
|
2013-06-13 22:51:26 +05:30
|
|
|
sc->driver_data = id->driver_data;
|
2009-01-14 20:17:06 +01:00
|
|
|
|
2010-01-14 10:20:57 +05:30
|
|
|
/* Will be cleared in ath9k_start() */
|
2012-06-04 20:23:55 +05:30
|
|
|
set_bit(SC_OP_INVALID, &sc->sc_flags);
|
2009-01-14 20:17:06 +01:00
|
|
|
|
2009-09-02 17:06:21 -07:00
|
|
|
ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
|
2009-09-02 17:02:18 -07:00
|
|
|
if (ret) {
|
|
|
|
|
dev_err(&pdev->dev, "request_irq failed\n");
|
2010-01-08 10:36:07 +05:30
|
|
|
goto err_irq;
|
2009-01-14 20:17:06 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
sc->irq = pdev->irq;
|
|
|
|
|
|
2011-07-23 03:55:39 -04:00
|
|
|
ret = ath9k_init_device(id->device, sc, &ath_pci_bus_ops);
|
2010-01-08 10:36:07 +05:30
|
|
|
if (ret) {
|
|
|
|
|
dev_err(&pdev->dev, "Failed to initialize device\n");
|
|
|
|
|
goto err_init;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
|
2010-07-26 14:39:58 -07:00
|
|
|
wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
|
2012-12-12 13:14:22 +01:00
|
|
|
hw_name, (unsigned long)sc->mem, pdev->irq);
|
2009-01-14 20:17:06 +01:00
|
|
|
|
|
|
|
|
return 0;
|
2010-01-08 10:36:07 +05:30
|
|
|
|
|
|
|
|
err_init:
|
|
|
|
|
free_irq(sc->irq, sc);
|
|
|
|
|
err_irq:
|
2009-01-14 20:17:06 +01:00
|
|
|
ieee80211_free_hw(hw);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ath_pci_remove(struct pci_dev *pdev)
|
|
|
|
|
{
|
|
|
|
|
struct ieee80211_hw *hw = pci_get_drvdata(pdev);
|
2011-01-24 19:23:18 +01:00
|
|
|
struct ath_softc *sc = hw->priv;
|
2009-01-14 20:17:06 +01:00
|
|
|
|
2010-12-20 14:39:51 +05:30
|
|
|
if (!is_ath9k_unloaded)
|
|
|
|
|
sc->sc_ah->ah_flags |= AH_UNPLUGGED;
|
2010-01-08 10:36:07 +05:30
|
|
|
ath9k_deinit_device(sc);
|
|
|
|
|
free_irq(sc->irq, sc);
|
|
|
|
|
ieee80211_free_hw(sc->hw);
|
2009-01-14 20:17:06 +01:00
|
|
|
}
|
|
|
|
|
|
2012-11-29 23:27:15 +01:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2009-01-14 20:17:06 +01:00
|
|
|
|
2010-10-16 00:36:17 +02:00
|
|
|
static int ath_pci_suspend(struct device *device)
|
2009-01-14 20:17:06 +01:00
|
|
|
{
|
2010-10-16 00:36:17 +02:00
|
|
|
struct pci_dev *pdev = to_pci_dev(device);
|
2009-01-14 20:17:06 +01:00
|
|
|
struct ieee80211_hw *hw = pci_get_drvdata(pdev);
|
2011-01-24 19:23:18 +01:00
|
|
|
struct ath_softc *sc = hw->priv;
|
2009-01-14 20:17:06 +01:00
|
|
|
|
2012-07-10 14:57:11 +05:30
|
|
|
if (sc->wow_enabled)
|
|
|
|
|
return 0;
|
|
|
|
|
|
2011-06-28 18:21:19 +05:30
|
|
|
/* The device has to be moved to FULLSLEEP forcibly.
|
|
|
|
|
* Otherwise the chip never moved to full sleep,
|
|
|
|
|
* when no interface is up.
|
|
|
|
|
*/
|
2012-08-09 12:37:26 +05:30
|
|
|
ath9k_stop_btcoex(sc);
|
2011-11-16 13:08:41 +01:00
|
|
|
ath9k_hw_disable(sc->sc_ah);
|
2011-06-28 18:21:19 +05:30
|
|
|
ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
|
|
|
|
|
|
2009-01-14 20:17:06 +01:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2010-10-16 00:36:17 +02:00
|
|
|
static int ath_pci_resume(struct device *device)
|
2009-01-14 20:17:06 +01:00
|
|
|
{
|
2010-10-16 00:36:17 +02:00
|
|
|
struct pci_dev *pdev = to_pci_dev(device);
|
2012-10-03 21:07:50 +02:00
|
|
|
struct ieee80211_hw *hw = pci_get_drvdata(pdev);
|
|
|
|
|
struct ath_softc *sc = hw->priv;
|
2012-10-03 21:07:51 +02:00
|
|
|
struct ath_hw *ah = sc->sc_ah;
|
|
|
|
|
struct ath_common *common = ath9k_hw_common(ah);
|
ath9k: Fix PCI FATAL interrupts by restoring RETRY_TIMEOUT disabling
An earlier commit, 'ath9k: remove dummy PCI "retry timeout" fix', removed
code that was documented to disable RETRY_TIMEOUT register (PCI reg
0x41) since it was claimed to be a no-op. However, it turns out that
there are some combinations of hosts and ath9k-supported cards for
which this is not a no-op (reg 0x41 has value 0x80, not 0) and this
code (or something similar) is needed. In such cases, the driver may
be next to unusable due to very frequent PCI FATAL interrupts from the
card.
Reverting the earlier commit, i.e., restoring the RETRY_TIMEOUT
disabling, seems to resolve the issue. Since the removal of this code
was not based on any known issue and was purely a cleanup change, the
safest option here is to just revert that commit. Should there be
desire to clean this up in the future, the change will need to be
tested with a more complete coverage of cards and host systems.
http://bugzilla.kernel.org/show_bug.cgi?id=13483
Cc: stable@kernel.org
Signed-off-by: Jouni Malinen <jouni.malinen@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2009-06-16 11:59:23 +03:00
|
|
|
u32 val;
|
2009-08-13 09:34:35 +05:30
|
|
|
|
ath9k: Fix PCI FATAL interrupts by restoring RETRY_TIMEOUT disabling
An earlier commit, 'ath9k: remove dummy PCI "retry timeout" fix', removed
code that was documented to disable RETRY_TIMEOUT register (PCI reg
0x41) since it was claimed to be a no-op. However, it turns out that
there are some combinations of hosts and ath9k-supported cards for
which this is not a no-op (reg 0x41 has value 0x80, not 0) and this
code (or something similar) is needed. In such cases, the driver may
be next to unusable due to very frequent PCI FATAL interrupts from the
card.
Reverting the earlier commit, i.e., restoring the RETRY_TIMEOUT
disabling, seems to resolve the issue. Since the removal of this code
was not based on any known issue and was purely a cleanup change, the
safest option here is to just revert that commit. Should there be
desire to clean this up in the future, the change will need to be
tested with a more complete coverage of cards and host systems.
http://bugzilla.kernel.org/show_bug.cgi?id=13483
Cc: stable@kernel.org
Signed-off-by: Jouni Malinen <jouni.malinen@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2009-06-16 11:59:23 +03:00
|
|
|
/*
|
|
|
|
|
* Suspend/Resume resets the PCI configuration space, so we have to
|
|
|
|
|
* re-disable the RETRY_TIMEOUT register (0x41) to keep
|
|
|
|
|
* PCI Tx retries from interfering with C3 CPU state
|
|
|
|
|
*/
|
|
|
|
|
pci_read_config_dword(pdev, 0x40, &val);
|
|
|
|
|
if ((val & 0x0000ff00) != 0)
|
|
|
|
|
pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
|
2009-01-14 20:17:06 +01:00
|
|
|
|
2012-10-03 21:07:50 +02:00
|
|
|
ath_pci_aspm_init(common);
|
2012-10-03 21:07:51 +02:00
|
|
|
ah->reset_power_on = false;
|
2012-10-03 21:07:50 +02:00
|
|
|
|
2009-01-14 20:17:06 +01:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2012-11-29 23:27:15 +01:00
|
|
|
static SIMPLE_DEV_PM_OPS(ath9k_pm_ops, ath_pci_suspend, ath_pci_resume);
|
2010-10-16 00:36:17 +02:00
|
|
|
|
|
|
|
|
#define ATH9K_PM_OPS (&ath9k_pm_ops)
|
|
|
|
|
|
2012-11-29 23:27:15 +01:00
|
|
|
#else /* !CONFIG_PM_SLEEP */
|
2010-10-16 00:36:17 +02:00
|
|
|
|
|
|
|
|
#define ATH9K_PM_OPS NULL
|
|
|
|
|
|
2012-11-29 23:27:15 +01:00
|
|
|
#endif /* !CONFIG_PM_SLEEP */
|
2010-10-16 00:36:17 +02:00
|
|
|
|
2009-01-14 20:17:06 +01:00
|
|
|
|
|
|
|
|
MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
|
|
|
|
|
|
|
|
|
|
static struct pci_driver ath_pci_driver = {
|
|
|
|
|
.name = "ath9k",
|
|
|
|
|
.id_table = ath_pci_id_table,
|
|
|
|
|
.probe = ath_pci_probe,
|
|
|
|
|
.remove = ath_pci_remove,
|
2010-10-16 00:36:17 +02:00
|
|
|
.driver.pm = ATH9K_PM_OPS,
|
2009-01-14 20:17:06 +01:00
|
|
|
};
|
|
|
|
|
|
2009-02-20 15:13:26 +05:30
|
|
|
int ath_pci_init(void)
|
2009-01-14 20:17:06 +01:00
|
|
|
{
|
|
|
|
|
return pci_register_driver(&ath_pci_driver);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ath_pci_exit(void)
|
|
|
|
|
{
|
|
|
|
|
pci_unregister_driver(&ath_pci_driver);
|
|
|
|
|
}
|