[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
											
										 
										
											2008-06-22 22:45:02 +02:00
										 
									 
								 
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								/*
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											2008-08-05 16:14:15 +01:00
										 
									 
								 
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								 * arch/arm/mach-loki/include/mach/system.h
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												[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
											
										 
										
											2008-06-22 22:45:02 +02:00
										 
									 
								 
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								 *
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								 * This file is licensed under the terms of the GNU General Public
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								 * License version 2.  This program is licensed "as is" without any
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								 * warranty of any kind, whether express or implied.
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								 */
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								#ifndef __ASM_ARCH_SYSTEM_H
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								#define __ASM_ARCH_SYSTEM_H
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								#include <mach/hardware.h>
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								#include <mach/loki.h>
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												[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
											
										 
										
											2008-06-22 22:45:02 +02:00
										 
									 
								 
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								static inline void arch_idle(void)
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								{
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									cpu_do_idle();
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								}
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								static inline void arch_reset(char mode)
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								{
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									/*
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									 * Enable soft reset to assert RSTOUTn.
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									 */
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									writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
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									/*
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									 * Assert soft reset.
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									 */
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									writel(SOFT_RESET, SYSTEM_SOFT_RESET);
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									while (1)
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										;
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								}
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								#endif
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