105 lines
		
	
	
	
		
			2.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			105 lines
		
	
	
	
		
			2.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
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								/*
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								 * This file is subject to the terms and conditions of the GNU General Public
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								 * License.  See the file "COPYING" in the main directory of this archive
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								 * for more details.
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								 *
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								 * Copyright (C) 2001  Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
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								 * Copyright (C) 2004, 2006  Hirokazu Takata <takata at linux-m32r.org>
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								 */
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								#ifndef _ASM_M32R_IRQFLAGS_H
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								#define _ASM_M32R_IRQFLAGS_H
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								#include <linux/types.h>
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								static inline unsigned long arch_local_save_flags(void)
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								{
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									unsigned long flags;
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									asm volatile("mvfc %0,psw" : "=r"(flags));
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									return flags;
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								}
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								static inline void arch_local_irq_disable(void)
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								{
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								#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
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									asm volatile (
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										"clrpsw #0x40 -> nop"
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										: : : "memory");
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								#else
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									unsigned long tmpreg0, tmpreg1;
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									asm volatile (
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										"ld24	%0, #0	; Use 32-bit insn.			\n\t"
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										"mvfc	%1, psw	; No interrupt can be accepted here.	\n\t"
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										"mvtc	%0, psw						\n\t"
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										"and3	%0, %1, #0xffbf					\n\t"
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										"mvtc	%0, psw						\n\t"
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										: "=&r" (tmpreg0), "=&r" (tmpreg1)
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										:
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										: "cbit", "memory");
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								#endif
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								}
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								static inline void arch_local_irq_enable(void)
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								{
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								#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
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									asm volatile (
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										"setpsw #0x40 -> nop"
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										: : : "memory");
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								#else
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									unsigned long tmpreg;
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									asm volatile (
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										"mvfc	%0, psw;		\n\t"
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										"or3	%0, %0, #0x0040;	\n\t"
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										"mvtc	%0, psw;		\n\t"
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										: "=&r" (tmpreg)
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										:
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										: "cbit", "memory");
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								#endif
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								}
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								static inline unsigned long arch_local_irq_save(void)
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								{
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									unsigned long flags;
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								#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
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									asm volatile (
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										"mvfc	%0, psw;	\n\t"
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										"clrpsw	#0x40 -> nop;	\n\t"
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										: "=r" (flags)
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										:
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										: "memory");
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								#else
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									unsigned long tmpreg;
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									asm volatile (
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										"ld24	%1, #0		\n\t"
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										"mvfc	%0, psw		\n\t"
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										"mvtc	%1, psw		\n\t"
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										"and3	%1, %0, #0xffbf	\n\t"
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										"mvtc	%1, psw		\n\t"
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										: "=r" (flags), "=&r" (tmpreg)
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										:
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										: "cbit", "memory");
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								#endif
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									return flags;
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								}
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								static inline void arch_local_irq_restore(unsigned long flags)
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								{
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									asm volatile("mvtc %0,psw"
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										     :
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										     : "r" (flags)
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										     : "cbit", "memory");
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								}
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								static inline bool arch_irqs_disabled_flags(unsigned long flags)
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								{
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									return !(flags & 0x40);
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								}
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								static inline bool arch_irqs_disabled(void)
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								{
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									return arch_irqs_disabled_flags(arch_local_save_flags());
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								}
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								#endif /* _ASM_M32R_IRQFLAGS_H */
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