[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
											
										 
										
											2006-09-25 23:32:13 -07:00
										 
									 
								 
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								/*
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								 * Copyright (C) 2006 Atmel Corporation
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								 *
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								 * This program is free software; you can redistribute it and/or modify
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								 * it under the terms of the GNU General Public License version 2 as
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								 * published by the Free Software Foundation.
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								 */
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								#include <linux/linkage.h>
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									.text
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									/*
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									 * unsigned long find_first_zero_bit(const unsigned long *addr,
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									 *				     unsigned long size)
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									 */
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								ENTRY(find_first_zero_bit)
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									cp.w	r11, 0
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									reteq	r11
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									mov	r9, r11
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								1:	ld.w	r8, r12[0]
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									com	r8
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									brne	.L_found
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									sub	r12, -4
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									sub	r9, 32
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									brgt	1b
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									retal	r11
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									/*
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									 * unsigned long find_next_zero_bit(const unsigned long *addr,
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									 *				    unsigned long size,
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									 *				    unsigned long offset)
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									 */
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								ENTRY(find_next_zero_bit)
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									lsr	r8, r10, 5
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									sub	r9, r11, r10
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									retle	r11
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									lsl	r8, 2
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									add	r12, r8
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									andl	r10, 31, COH
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									breq	1f
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									/* offset is not word-aligned. Handle the first (32 - r10) bits */
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									ld.w	r8, r12[0]
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									com	r8
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									sub	r12, -4
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									lsr	r8, r8, r10
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									brne	.L_found
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									/* r9 = r9 - (32 - r10) = r9 + r10 - 32 */
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									add	r9, r10
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									sub	r9, 32
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									retle	r11
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									/* Main loop. offset must be word-aligned */
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								1:	ld.w	r8, r12[0]
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									com	r8
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									brne	.L_found
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									sub	r12, -4
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									sub	r9, 32
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									brgt	1b
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									retal	r11
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									/* Common return path for when a bit is actually found. */
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								.L_found:
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									brev	r8
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									clz	r10, r8
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									rsub	r9, r11
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									add	r10, r9
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									/* XXX: If we don't have to return exactly "size" when the bit
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									   is not found, we may drop this "min" thing */
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									min	r12, r11, r10
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									retal	r12
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									/*
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									 * unsigned long find_first_bit(const unsigned long *addr,
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									 *				unsigned long size)
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									 */
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								ENTRY(find_first_bit)
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									cp.w	r11, 0
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									reteq	r11
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									mov	r9, r11
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								1:	ld.w	r8, r12[0]
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									cp.w	r8, 0
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									brne	.L_found
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									sub	r12, -4
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									sub	r9, 32
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									brgt	1b
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									retal	r11
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									/*
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									 * unsigned long find_next_bit(const unsigned long *addr,
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									 *			       unsigned long size,
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									 *			       unsigned long offset)
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									 */
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								ENTRY(find_next_bit)
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									lsr	r8, r10, 5
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									sub	r9, r11, r10
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									retle	r11
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									lsl	r8, 2
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									add	r12, r8
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									andl	r10, 31, COH
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									breq	1f
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									/* offset is not word-aligned. Handle the first (32 - r10) bits */
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									ld.w	r8, r12[0]
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									sub	r12, -4
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									lsr	r8, r8, r10
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									brne	.L_found
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									/* r9 = r9 - (32 - r10) = r9 + r10 - 32 */
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									add	r9, r10
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									sub	r9, 32
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									retle	r11
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									/* Main loop. offset must be word-aligned */
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								1:	ld.w	r8, r12[0]
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									cp.w	r8, 0
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									brne	.L_found
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									sub	r12, -4
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									sub	r9, 32
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									brgt	1b
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									retal	r11
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											2011-03-23 16:41:47 -07:00
										 
									 
								 
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								ENTRY(find_next_bit_le)
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											2008-09-10 15:52:04 +02:00
										 
									 
								 
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									lsr	r8, r10, 5
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									sub	r9, r11, r10
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									retle	r11
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									lsl	r8, 2
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									add	r12, r8
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									andl	r10, 31, COH
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									breq	1f
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									/* offset is not word-aligned. Handle the first (32 - r10) bits */
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									ldswp.w	r8, r12[0]
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									sub	r12, -4
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									lsr	r8, r8, r10
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									brne	.L_found
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									/* r9 = r9 - (32 - r10) = r9 + r10 - 32 */
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									add	r9, r10
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									sub	r9, 32
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									retle	r11
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							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									/* Main loop. offset must be word-aligned */
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
								1:	ldswp.w	r8, r12[0]
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									cp.w	r8, 0
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									brne	.L_found
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									sub	r12, -4
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									sub	r9, 32
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									brgt	1b
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									retal	r11
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
								
							 | 
						
					
						
							
								
									
										
										
										
											2011-03-23 16:41:47 -07:00
										 
									 
								 
							 | 
							
								
									
										
									
								
							 | 
							
								
							 | 
							
							
								ENTRY(find_next_zero_bit_le)
							 | 
						
					
						
							
								
									
										
											 
										 
										
											
												[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
											
										 
										
											2006-09-25 23:32:13 -07:00
										 
									 
								 
							 | 
							
								
							 | 
							
								
							 | 
							
							
									lsr	r8, r10, 5
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									sub	r9, r11, r10
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									retle	r11
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
								
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									lsl	r8, 2
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									add	r12, r8
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									andl	r10, 31, COH
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									breq	1f
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
								
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									/* offset is not word-aligned. Handle the first (32 - r10) bits */
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									ldswp.w	r8, r12[0]
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									sub	r12, -4
							 | 
						
					
						
							
								
									
										
										
										
											2006-10-31 20:01:11 +01:00
										 
									 
								 
							 | 
							
								
									
										
									
								
							 | 
							
								
							 | 
							
							
									com	r8
							 | 
						
					
						
							
								
									
										
											 
										 
										
											
												[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
											
										 
										
											2006-09-25 23:32:13 -07:00
										 
									 
								 
							 | 
							
								
							 | 
							
								
							 | 
							
							
									lsr	r8, r8, r10
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									brne	.L_found
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
								
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									/* r9 = r9 - (32 - r10) = r9 + r10 - 32 */
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									add	r9, r10
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									sub	r9, 32
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									retle	r11
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
								
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									/* Main loop. offset must be word-aligned */
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
								1:	ldswp.w	r8, r12[0]
							 | 
						
					
						
							
								
									
										
										
										
											2006-10-31 20:01:11 +01:00
										 
									 
								 
							 | 
							
								
									
										
									
								
							 | 
							
								
							 | 
							
							
									com	r8
							 | 
						
					
						
							
								
									
										
											 
										 
										
											
												[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
											
										 
										
											2006-09-25 23:32:13 -07:00
										 
									 
								 
							 | 
							
								
							 | 
							
								
							 | 
							
							
									brne	.L_found
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									sub	r12, -4
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									sub	r9, 32
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									brgt	1b
							 | 
						
					
						
							| 
								
							 | 
							
								
							 | 
							
								
							 | 
							
							
									retal	r11
							 |