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										 |  |  | /******************************************************************************
 | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright(c) 2009-2014  Realtek Corporation. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify it | 
					
						
							|  |  |  |  * under the terms of version 2 of the GNU General Public License as | 
					
						
							|  |  |  |  * published by the Free Software Foundation. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is distributed in the hope that it will be useful, but WITHOUT | 
					
						
							|  |  |  |  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 
					
						
							|  |  |  |  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for | 
					
						
							|  |  |  |  * more details. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * The full GNU General Public License is included in this distribution in the | 
					
						
							|  |  |  |  * file called LICENSE. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Contact Information: | 
					
						
							|  |  |  |  * wlanfae <wlanfae@realtek.com> | 
					
						
							|  |  |  |  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, | 
					
						
							|  |  |  |  * Hsinchu 300, Taiwan. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Larry Finger <Larry.Finger@lwfinger.net> | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  *****************************************************************************/ | 
					
						
							|  |  |  | 
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							|  |  |  | #include "../wifi.h"
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							|  |  |  | #include "../core.h"
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							|  |  |  | #include "../pci.h"
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							|  |  |  | #include "reg.h"
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							|  |  |  | #include "def.h"
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							|  |  |  | #include "phy.h"
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							|  |  |  | #include "../rtl8723com/phy_common.h"
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							|  |  |  | #include "dm.h"
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										 |  |  | #include "../rtl8723com/dm_common.h"
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										 |  |  | #include "hw.h"
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							|  |  |  | #include "fw.h"
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							|  |  |  | #include "../rtl8723com/fw_common.h"
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							|  |  |  | #include "sw.h"
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							|  |  |  | #include "trx.h"
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							|  |  |  | #include "led.h"
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							|  |  |  | #include "table.h"
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							|  |  |  | #include "../btcoexist/rtl_btc.h"
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							|  |  |  | 
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							|  |  |  | #include <linux/vmalloc.h>
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							|  |  |  | #include <linux/module.h>
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							|  |  |  | 
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							|  |  |  | static void rtl8723be_init_aspm_vars(struct ieee80211_hw *hw) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	/*close ASPM for AMD defaultly */ | 
					
						
							|  |  |  | 	rtlpci->const_amdpci_aspm = 0; | 
					
						
							|  |  |  | 
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							|  |  |  | 	/* ASPM PS mode.
 | 
					
						
							|  |  |  | 	 * 0 - Disable ASPM, | 
					
						
							|  |  |  | 	 * 1 - Enable ASPM without Clock Req, | 
					
						
							|  |  |  | 	 * 2 - Enable ASPM with Clock Req, | 
					
						
							|  |  |  | 	 * 3 - Alwyas Enable ASPM with Clock Req, | 
					
						
							|  |  |  | 	 * 4 - Always Enable ASPM without Clock Req. | 
					
						
							|  |  |  | 	 * set defult to RTL8192CE:3 RTL8192E:2 | 
					
						
							|  |  |  | 	 */ | 
					
						
							|  |  |  | 	rtlpci->const_pci_aspm = 3; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	/*Setting for PCI-E device */ | 
					
						
							|  |  |  | 	rtlpci->const_devicepci_aspm_setting = 0x03; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	/*Setting for PCI-E bridge */ | 
					
						
							|  |  |  | 	rtlpci->const_hostpci_aspm_setting = 0x02; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	/* In Hw/Sw Radio Off situation.
 | 
					
						
							|  |  |  | 	 * 0 - Default, | 
					
						
							|  |  |  | 	 * 1 - From ASPM setting without low Mac Pwr, | 
					
						
							|  |  |  | 	 * 2 - From ASPM setting with low Mac Pwr, | 
					
						
							|  |  |  | 	 * 3 - Bus D3 | 
					
						
							|  |  |  | 	 * set default to RTL8192CE:0 RTL8192SE:2 | 
					
						
							|  |  |  | 	 */ | 
					
						
							|  |  |  | 	rtlpci->const_hwsw_rfoff_d3 = 0; | 
					
						
							|  |  |  | 
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							|  |  |  | 	/* This setting works for those device with
 | 
					
						
							|  |  |  | 	 * backdoor ASPM setting such as EPHY setting. | 
					
						
							|  |  |  | 	 * 0 - Not support ASPM, | 
					
						
							|  |  |  | 	 * 1 - Support ASPM, | 
					
						
							|  |  |  | 	 * 2 - According to chipset. | 
					
						
							|  |  |  | 	 */ | 
					
						
							|  |  |  | 	rtlpci->const_support_pciaspm = 1; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | int rtl8723be_init_sw_vars(struct ieee80211_hw *hw) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	int err = 0; | 
					
						
							|  |  |  | 	struct rtl_priv *rtlpriv = rtl_priv(hw); | 
					
						
							|  |  |  | 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | 
					
						
							|  |  |  | 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	rtl8723be_bt_reg_init(hw); | 
					
						
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										 |  |  | 	rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; | 
					
						
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										 |  |  | 	rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer(); | 
					
						
							|  |  |  | 
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							|  |  |  | 	rtlpriv->dm.dm_initialgain_enable = 1; | 
					
						
							|  |  |  | 	rtlpriv->dm.dm_flag = 0; | 
					
						
							|  |  |  | 	rtlpriv->dm.disable_framebursting = 0; | 
					
						
							|  |  |  | 	rtlpriv->dm.thermalvalue = 0; | 
					
						
							|  |  |  | 	rtlpci->transmit_config = CFENDFORM | BIT(15) | BIT(24) | BIT(25); | 
					
						
							|  |  |  | 
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										 |  |  | 	rtlpriv->phy.lck_inprogress = false; | 
					
						
							|  |  |  | 
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										 |  |  | 	mac->ht_enable = true; | 
					
						
							|  |  |  | 
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							|  |  |  | 	/* compatible 5G band 88ce just 2.4G band & smsp */ | 
					
						
							|  |  |  | 	rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G; | 
					
						
							|  |  |  | 	rtlpriv->rtlhal.bandset = BAND_ON_2_4G; | 
					
						
							|  |  |  | 	rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	rtlpci->receive_config = (RCR_APPFCS		| | 
					
						
							|  |  |  | 				  RCR_APP_MIC		| | 
					
						
							|  |  |  | 				  RCR_APP_ICV		| | 
					
						
							|  |  |  | 				  RCR_APP_PHYST_RXFF	| | 
					
						
							|  |  |  | 				  RCR_HTC_LOC_CTRL	| | 
					
						
							|  |  |  | 				  RCR_AMF		| | 
					
						
							|  |  |  | 				  RCR_ACF		| | 
					
						
							|  |  |  | 				  RCR_ADF		| | 
					
						
							|  |  |  | 				  RCR_AICV		| | 
					
						
							|  |  |  | 				  RCR_AB		| | 
					
						
							|  |  |  | 				  RCR_AM		| | 
					
						
							|  |  |  | 				  RCR_APM		| | 
					
						
							|  |  |  | 				  0); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	rtlpci->irq_mask[0] = (u32) (IMR_PSTIMEOUT	| | 
					
						
							|  |  |  | 				     IMR_HSISR_IND_ON_INT	| | 
					
						
							|  |  |  | 				     IMR_C2HCMD		| | 
					
						
							|  |  |  | 				     IMR_HIGHDOK	| | 
					
						
							|  |  |  | 				     IMR_MGNTDOK	| | 
					
						
							|  |  |  | 				     IMR_BKDOK		| | 
					
						
							|  |  |  | 				     IMR_BEDOK		| | 
					
						
							|  |  |  | 				     IMR_VIDOK		| | 
					
						
							|  |  |  | 				     IMR_VODOK		| | 
					
						
							|  |  |  | 				     IMR_RDU		| | 
					
						
							|  |  |  | 				     IMR_ROK		| | 
					
						
							|  |  |  | 				     0); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	rtlpci->irq_mask[1] = (u32)(IMR_RXFOVW | 0); | 
					
						
							|  |  |  | 
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										 |  |  | 	rtlpci->sys_irq_mask = (u32)(HSIMR_PDN_INT_EN	| | 
					
						
							|  |  |  | 				     HSIMR_RON_INT_EN	| | 
					
						
							|  |  |  | 				     0); | 
					
						
							|  |  |  | 
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										 |  |  | 	/* for debug level */ | 
					
						
							|  |  |  | 	rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug; | 
					
						
							|  |  |  | 	/* for LPS & IPS */ | 
					
						
							|  |  |  | 	rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; | 
					
						
							|  |  |  | 	rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; | 
					
						
							|  |  |  | 	rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; | 
					
						
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										 |  |  | 	rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; | 
					
						
							|  |  |  | 	if (rtlpriv->cfg->mod_params->disable_watchdog) | 
					
						
							|  |  |  | 		pr_info("watchdog disabled\n"); | 
					
						
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										 |  |  | 	rtlpriv->psc.reg_fwctrl_lps = 3; | 
					
						
							|  |  |  | 	rtlpriv->psc.reg_max_lps_awakeintvl = 5; | 
					
						
							|  |  |  | 	/* for ASPM, you can close aspm through
 | 
					
						
							|  |  |  | 	 * set const_support_pciaspm = 0 | 
					
						
							|  |  |  | 	 */ | 
					
						
							|  |  |  | 	rtl8723be_init_aspm_vars(hw); | 
					
						
							|  |  |  | 
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							|  |  |  | 	if (rtlpriv->psc.reg_fwctrl_lps == 1) | 
					
						
							|  |  |  | 		rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE; | 
					
						
							|  |  |  | 	else if (rtlpriv->psc.reg_fwctrl_lps == 2) | 
					
						
							|  |  |  | 		rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE; | 
					
						
							|  |  |  | 	else if (rtlpriv->psc.reg_fwctrl_lps == 3) | 
					
						
							|  |  |  | 		rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE; | 
					
						
							|  |  |  | 
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										 |  |  | 	/*low power: Disable 32k */ | 
					
						
							|  |  |  | 	rtlpriv->psc.low_power_enable = false; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	rtlpriv->rtlhal.earlymode_enable = false; | 
					
						
							|  |  |  | 
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										 |  |  | 	/* for firmware buf */ | 
					
						
							|  |  |  | 	rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); | 
					
						
							|  |  |  | 	if (!rtlpriv->rtlhal.pfirmware) { | 
					
						
							|  |  |  | 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 
					
						
							|  |  |  | 			 "Can't alloc buffer for fw.\n"); | 
					
						
							|  |  |  | 		return 1; | 
					
						
							|  |  |  | 	} | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	rtlpriv->max_fw_size = 0x8000; | 
					
						
							|  |  |  | 	pr_info("Using firmware %s\n", rtlpriv->cfg->fw_name); | 
					
						
							|  |  |  | 	err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name, | 
					
						
							|  |  |  | 				      rtlpriv->io.dev, GFP_KERNEL, hw, | 
					
						
							|  |  |  | 				      rtl_fw_cb); | 
					
						
							|  |  |  | 	if (err) { | 
					
						
							|  |  |  | 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 
					
						
							|  |  |  | 			 "Failed to request firmware!\n"); | 
					
						
							|  |  |  | 		return 1; | 
					
						
							|  |  |  | 	} | 
					
						
							|  |  |  | 	return 0; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | void rtl8723be_deinit_sw_vars(struct ieee80211_hw *hw) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	struct rtl_priv *rtlpriv = rtl_priv(hw); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	if (rtlpriv->rtlhal.pfirmware) { | 
					
						
							|  |  |  | 		vfree(rtlpriv->rtlhal.pfirmware); | 
					
						
							|  |  |  | 		rtlpriv->rtlhal.pfirmware = NULL; | 
					
						
							|  |  |  | 	} | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /* get bt coexist status */ | 
					
						
							|  |  |  | bool rtl8723be_get_btc_status(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	return true; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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										 |  |  | static bool is_fw_header(struct rtl8723e_firmware_header *hdr) | 
					
						
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										 |  |  | { | 
					
						
							|  |  |  | 	return (hdr->signature & 0xfff0) == 0x5300; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | static struct rtl_hal_ops rtl8723be_hal_ops = { | 
					
						
							|  |  |  | 	.init_sw_vars = rtl8723be_init_sw_vars, | 
					
						
							|  |  |  | 	.deinit_sw_vars = rtl8723be_deinit_sw_vars, | 
					
						
							|  |  |  | 	.read_eeprom_info = rtl8723be_read_eeprom_info, | 
					
						
							|  |  |  | 	.interrupt_recognized = rtl8723be_interrupt_recognized, | 
					
						
							|  |  |  | 	.hw_init = rtl8723be_hw_init, | 
					
						
							|  |  |  | 	.hw_disable = rtl8723be_card_disable, | 
					
						
							|  |  |  | 	.hw_suspend = rtl8723be_suspend, | 
					
						
							|  |  |  | 	.hw_resume = rtl8723be_resume, | 
					
						
							|  |  |  | 	.enable_interrupt = rtl8723be_enable_interrupt, | 
					
						
							|  |  |  | 	.disable_interrupt = rtl8723be_disable_interrupt, | 
					
						
							|  |  |  | 	.set_network_type = rtl8723be_set_network_type, | 
					
						
							|  |  |  | 	.set_chk_bssid = rtl8723be_set_check_bssid, | 
					
						
							|  |  |  | 	.set_qos = rtl8723be_set_qos, | 
					
						
							|  |  |  | 	.set_bcn_reg = rtl8723be_set_beacon_related_registers, | 
					
						
							|  |  |  | 	.set_bcn_intv = rtl8723be_set_beacon_interval, | 
					
						
							|  |  |  | 	.update_interrupt_mask = rtl8723be_update_interrupt_mask, | 
					
						
							|  |  |  | 	.get_hw_reg = rtl8723be_get_hw_reg, | 
					
						
							|  |  |  | 	.set_hw_reg = rtl8723be_set_hw_reg, | 
					
						
							|  |  |  | 	.update_rate_tbl = rtl8723be_update_hal_rate_tbl, | 
					
						
							|  |  |  | 	.fill_tx_desc = rtl8723be_tx_fill_desc, | 
					
						
							|  |  |  | 	.fill_tx_cmddesc = rtl8723be_tx_fill_cmddesc, | 
					
						
							|  |  |  | 	.query_rx_desc = rtl8723be_rx_query_desc, | 
					
						
							|  |  |  | 	.set_channel_access = rtl8723be_update_channel_access_setting, | 
					
						
							|  |  |  | 	.radio_onoff_checking = rtl8723be_gpio_radio_on_off_checking, | 
					
						
							|  |  |  | 	.set_bw_mode = rtl8723be_phy_set_bw_mode, | 
					
						
							|  |  |  | 	.switch_channel = rtl8723be_phy_sw_chnl, | 
					
						
							|  |  |  | 	.dm_watchdog = rtl8723be_dm_watchdog, | 
					
						
							|  |  |  | 	.scan_operation_backup = rtl8723be_phy_scan_operation_backup, | 
					
						
							|  |  |  | 	.set_rf_power_state = rtl8723be_phy_set_rf_power_state, | 
					
						
							|  |  |  | 	.led_control = rtl8723be_led_control, | 
					
						
							|  |  |  | 	.set_desc = rtl8723be_set_desc, | 
					
						
							|  |  |  | 	.get_desc = rtl8723be_get_desc, | 
					
						
							|  |  |  | 	.is_tx_desc_closed = rtl8723be_is_tx_desc_closed, | 
					
						
							|  |  |  | 	.tx_polling = rtl8723be_tx_polling, | 
					
						
							|  |  |  | 	.enable_hw_sec = rtl8723be_enable_hw_security_config, | 
					
						
							|  |  |  | 	.set_key = rtl8723be_set_key, | 
					
						
							|  |  |  | 	.init_sw_leds = rtl8723be_init_sw_leds, | 
					
						
							|  |  |  | 	.get_bbreg = rtl8723_phy_query_bb_reg, | 
					
						
							|  |  |  | 	.set_bbreg = rtl8723_phy_set_bb_reg, | 
					
						
							|  |  |  | 	.get_rfreg = rtl8723be_phy_query_rf_reg, | 
					
						
							|  |  |  | 	.set_rfreg = rtl8723be_phy_set_rf_reg, | 
					
						
							|  |  |  | 	.fill_h2c_cmd = rtl8723be_fill_h2c_cmd, | 
					
						
							|  |  |  | 	.get_btc_status = rtl8723be_get_btc_status, | 
					
						
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										 |  |  | 	.rx_command_packet = rtl8723be_rx_command_packet, | 
					
						
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										 |  |  | 	.is_fw_header = is_fw_header, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | static struct rtl_mod_params rtl8723be_mod_params = { | 
					
						
							|  |  |  | 	.sw_crypto = false, | 
					
						
							|  |  |  | 	.inactiveps = true, | 
					
						
							|  |  |  | 	.swctrl_lps = false, | 
					
						
							|  |  |  | 	.fwctrl_lps = true, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | static struct rtl_hal_cfg rtl8723be_hal_cfg = { | 
					
						
							|  |  |  | 	.bar_id = 2, | 
					
						
							|  |  |  | 	.write_readback = true, | 
					
						
							|  |  |  | 	.name = "rtl8723be_pci", | 
					
						
							|  |  |  | 	.fw_name = "rtlwifi/rtl8723befw.bin", | 
					
						
							|  |  |  | 	.ops = &rtl8723be_hal_ops, | 
					
						
							|  |  |  | 	.mod_params = &rtl8723be_mod_params, | 
					
						
							|  |  |  | 	.maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL, | 
					
						
							|  |  |  | 	.maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN, | 
					
						
							|  |  |  | 	.maps[SYS_CLK] = REG_SYS_CLKR, | 
					
						
							|  |  |  | 	.maps[MAC_RCR_AM] = AM, | 
					
						
							|  |  |  | 	.maps[MAC_RCR_AB] = AB, | 
					
						
							|  |  |  | 	.maps[MAC_RCR_ACRC32] = ACRC32, | 
					
						
							|  |  |  | 	.maps[MAC_RCR_ACF] = ACF, | 
					
						
							|  |  |  | 	.maps[MAC_RCR_AAP] = AAP, | 
					
						
							| 
									
										
										
										
											2014-09-26 16:40:25 -05:00
										 |  |  | 	.maps[MAC_HIMR] = REG_HIMR, | 
					
						
							|  |  |  | 	.maps[MAC_HIMRE] = REG_HIMRE, | 
					
						
							|  |  |  | 	.maps[MAC_HSISR] = REG_HSISR, | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | 
 | 
					
						
							|  |  |  | 	.maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS, | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	.maps[EFUSE_TEST] = REG_EFUSE_TEST, | 
					
						
							|  |  |  | 	.maps[EFUSE_CTRL] = REG_EFUSE_CTRL, | 
					
						
							|  |  |  | 	.maps[EFUSE_CLK] = 0, | 
					
						
							|  |  |  | 	.maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL, | 
					
						
							|  |  |  | 	.maps[EFUSE_PWC_EV12V] = PWC_EV12V, | 
					
						
							|  |  |  | 	.maps[EFUSE_FEN_ELDR] = FEN_ELDR, | 
					
						
							|  |  |  | 	.maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN, | 
					
						
							|  |  |  | 	.maps[EFUSE_ANA8M] = ANA8M, | 
					
						
							|  |  |  | 	.maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE, | 
					
						
							|  |  |  | 	.maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION, | 
					
						
							|  |  |  | 	.maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN, | 
					
						
							|  |  |  | 	.maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES, | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	.maps[RWCAM] = REG_CAMCMD, | 
					
						
							|  |  |  | 	.maps[WCAMI] = REG_CAMWRITE, | 
					
						
							|  |  |  | 	.maps[RCAMO] = REG_CAMREAD, | 
					
						
							|  |  |  | 	.maps[CAMDBG] = REG_CAMDBG, | 
					
						
							|  |  |  | 	.maps[SECR] = REG_SECCFG, | 
					
						
							|  |  |  | 	.maps[SEC_CAM_NONE] = CAM_NONE, | 
					
						
							|  |  |  | 	.maps[SEC_CAM_WEP40] = CAM_WEP40, | 
					
						
							|  |  |  | 	.maps[SEC_CAM_TKIP] = CAM_TKIP, | 
					
						
							|  |  |  | 	.maps[SEC_CAM_AES] = CAM_AES, | 
					
						
							|  |  |  | 	.maps[SEC_CAM_WEP104] = CAM_WEP104, | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1, | 
					
						
							| 
									
										
										
										
											2014-09-26 16:40:25 -05:00
										 |  |  | /*	.maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,     */   /*need check*/ | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | 	.maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1, | 
					
						
							| 
									
										
										
										
											2014-09-26 16:40:25 -05:00
										 |  |  | /*	.maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,*/ | 
					
						
							|  |  |  | /*	.maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,*/ | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | 
 | 
					
						
							|  |  |  | 	.maps[RTL_IMR_TXFOVW] = IMR_TXFOVW, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_RXFOVW] = IMR_RXFOVW, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_RDU] = IMR_RDU, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_ATIMEND] = IMR_ATIMEND, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BDOK] = IMR_BCNDOK0, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_TBDER] = IMR_TBDER, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_TBDOK] = IMR_TBDOK, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BKDOK] = IMR_BKDOK, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_BEDOK] = IMR_BEDOK, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_VIDOK] = IMR_VIDOK, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_VODOK] = IMR_VODOK, | 
					
						
							|  |  |  | 	.maps[RTL_IMR_ROK] = IMR_ROK, | 
					
						
							| 
									
										
										
										
											2014-09-26 16:40:25 -05:00
										 |  |  | 	.maps[RTL_IMR_HSISR_IND] = IMR_HSISR_IND_ON_INT, | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | 	.maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER), | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	.maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M, | 
					
						
							|  |  |  | 	.maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M, | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	.maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7, | 
					
						
							|  |  |  | 	.maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2014-09-26 16:40:25 -05:00
										 |  |  | static struct pci_device_id rtl8723be_pci_ids[] = { | 
					
						
							|  |  |  | 	{RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xB723, rtl8723be_hal_cfg)}, | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | 	{}, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2014-09-26 16:40:25 -05:00
										 |  |  | MODULE_DEVICE_TABLE(pci, rtl8723be_pci_ids); | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | 
 | 
					
						
							|  |  |  | MODULE_AUTHOR("PageHe	<page_he@realsil.com.cn>"); | 
					
						
							|  |  |  | MODULE_AUTHOR("Realtek WlanFAE	<wlanfae@realtek.com>"); | 
					
						
							|  |  |  | MODULE_LICENSE("GPL"); | 
					
						
							|  |  |  | MODULE_DESCRIPTION("Realtek 8723BE 802.11n PCI wireless"); | 
					
						
							|  |  |  | MODULE_FIRMWARE("rtlwifi/rtl8723befw.bin"); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | module_param_named(swenc, rtl8723be_mod_params.sw_crypto, bool, 0444); | 
					
						
							|  |  |  | module_param_named(debug, rtl8723be_mod_params.debug, int, 0444); | 
					
						
							|  |  |  | module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444); | 
					
						
							|  |  |  | module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444); | 
					
						
							|  |  |  | module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444); | 
					
						
							| 
									
										
										
										
											2014-09-26 16:40:25 -05:00
										 |  |  | module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog, | 
					
						
							|  |  |  | 		   bool, 0444); | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | MODULE_PARM_DESC(swenc, "using hardware crypto (default 0 [hardware])\n"); | 
					
						
							|  |  |  | MODULE_PARM_DESC(ips, "using no link power save (default 1 is open)\n"); | 
					
						
							|  |  |  | MODULE_PARM_DESC(fwlps, "using linked fw control power save (default 1 is open)\n"); | 
					
						
							| 
									
										
										
										
											2014-05-05 16:33:38 +08:00
										 |  |  | MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 0)\n"); | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)"); | 
					
						
							| 
									
										
										
										
											2014-09-26 16:40:25 -05:00
										 |  |  | MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n"); | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | 
 | 
					
						
							| 
									
										
										
										
											2014-03-05 17:26:00 -06:00
										 |  |  | static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume); | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | 
 | 
					
						
							|  |  |  | static struct pci_driver rtl8723be_driver = { | 
					
						
							|  |  |  | 	.name = KBUILD_MODNAME, | 
					
						
							| 
									
										
										
										
											2014-09-26 16:40:25 -05:00
										 |  |  | 	.id_table = rtl8723be_pci_ids, | 
					
						
							| 
									
										
										
										
											2014-02-28 15:16:50 -06:00
										 |  |  | 	.probe = rtl_pci_probe, | 
					
						
							|  |  |  | 	.remove = rtl_pci_disconnect, | 
					
						
							|  |  |  | 	.driver.pm = &rtlwifi_pm_ops, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | module_pci_driver(rtl8723be_driver); |