2014-05-17 11:19:54 +10:00
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/*
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* Copyright 2014 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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2014-08-10 04:10:20 +10:00
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#include <core/os.h>
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#include <nvif/event.h>
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2014-05-17 11:19:54 +10:00
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#include <subdev/i2c.h>
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#include "outpdp.h"
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#include "conn.h"
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2014-05-19 11:54:09 +10:00
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#include "dport.h"
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2014-05-17 11:19:54 +10:00
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2014-05-20 10:18:03 +10:00
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int
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nvkm_output_dp_train(struct nvkm_output *base, u32 datarate, bool wait)
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{
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struct nvkm_output_dp *outp = (void *)base;
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bool retrain = true;
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u8 link[2], stat[3];
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2014-07-01 10:54:52 +10:00
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u32 linkrate;
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2014-05-20 10:18:03 +10:00
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int ret, i;
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/* check that the link is trained at a high enough rate */
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ret = nv_rdaux(outp->base.edid, DPCD_LC00_LINK_BW_SET, link, 2);
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if (ret) {
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DBG("failed to read link config, assuming no sink\n");
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goto done;
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}
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2014-07-01 10:54:52 +10:00
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linkrate = link[0] * 27000 * (link[1] & DPCD_LC01_LANE_COUNT_SET);
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linkrate = (linkrate * 8) / 10; /* 8B/10B coding overhead */
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datarate = (datarate + 9) / 10; /* -> decakilobits */
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if (linkrate < datarate) {
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2014-05-20 10:18:03 +10:00
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DBG("link not trained at sufficient rate\n");
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goto done;
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}
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/* check that link is still trained */
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ret = nv_rdaux(outp->base.edid, DPCD_LS02, stat, 3);
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if (ret) {
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DBG("failed to read link status, assuming no sink\n");
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goto done;
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}
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if (stat[2] & DPCD_LS04_INTERLANE_ALIGN_DONE) {
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for (i = 0; i < (link[1] & DPCD_LC01_LANE_COUNT_SET); i++) {
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u8 lane = (stat[i >> 1] >> ((i & 1) * 4)) & 0x0f;
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if (!(lane & DPCD_LS02_LANE0_CR_DONE) ||
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!(lane & DPCD_LS02_LANE0_CHANNEL_EQ_DONE) ||
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!(lane & DPCD_LS02_LANE0_SYMBOL_LOCKED)) {
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DBG("lane %d not equalised\n", lane);
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goto done;
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}
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}
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retrain = false;
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} else {
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DBG("no inter-lane alignment\n");
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}
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done:
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if (retrain || !atomic_read(&outp->lt.done)) {
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/* no sink, but still need to configure source */
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if (outp->dpcd[DPCD_RC00_DPCD_REV] == 0x00) {
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outp->dpcd[DPCD_RC01_MAX_LINK_RATE] =
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outp->base.info.dpconf.link_bw;
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outp->dpcd[DPCD_RC02] =
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outp->base.info.dpconf.link_nr;
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}
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atomic_set(&outp->lt.done, 0);
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schedule_work(&outp->lt.work);
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} else {
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2014-08-10 04:10:20 +10:00
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nvkm_notify_get(&outp->irq);
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2014-05-20 10:18:03 +10:00
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}
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if (wait) {
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if (!wait_event_timeout(outp->lt.wait,
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atomic_read(&outp->lt.done),
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msecs_to_jiffies(2000)))
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ret = -ETIMEDOUT;
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}
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return ret;
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}
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2014-05-19 11:54:09 +10:00
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static void
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nvkm_output_dp_enable(struct nvkm_output_dp *outp, bool present)
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2014-05-17 11:19:54 +10:00
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{
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2014-05-19 11:54:09 +10:00
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struct nouveau_i2c_port *port = outp->base.edid;
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if (present) {
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if (!outp->present) {
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nouveau_i2c(port)->acquire_pad(port, 0);
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DBG("aux power -> always\n");
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outp->present = true;
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}
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2014-05-20 10:18:03 +10:00
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nvkm_output_dp_train(&outp->base, 0, true);
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2014-05-19 11:54:09 +10:00
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} else {
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if (outp->present) {
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nouveau_i2c(port)->release_pad(port);
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DBG("aux power -> demand\n");
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outp->present = false;
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}
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2014-05-20 10:18:03 +10:00
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atomic_set(&outp->lt.done, 0);
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2014-05-19 11:54:09 +10:00
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}
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}
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static void
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nvkm_output_dp_detect(struct nvkm_output_dp *outp)
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{
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struct nouveau_i2c_port *port = outp->base.edid;
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int ret = nouveau_i2c(port)->acquire_pad(port, 0);
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if (ret == 0) {
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ret = nv_rdaux(outp->base.edid, DPCD_RC00_DPCD_REV,
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outp->dpcd, sizeof(outp->dpcd));
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nvkm_output_dp_enable(outp, ret == 0);
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nouveau_i2c(port)->release_pad(port);
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}
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}
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2014-08-10 04:10:20 +10:00
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static int
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nvkm_output_dp_hpd(struct nvkm_notify *notify)
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2014-05-19 11:54:09 +10:00
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{
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2014-08-10 04:10:20 +10:00
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struct nvkm_connector *conn = container_of(notify, typeof(*conn), hpd);
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struct nvkm_output_dp *outp;
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struct nouveau_disp *disp = nouveau_disp(conn);
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const struct nvkm_i2c_ntfy_rep *line = notify->data;
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struct nvif_notify_conn_rep_v0 rep = {};
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list_for_each_entry(outp, &disp->outp, base.head) {
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if (outp->base.conn == conn &&
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outp->info.type == DCB_OUTPUT_DP) {
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DBG("HPD: %d\n", line->mask);
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nvkm_output_dp_detect(outp);
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if (line->mask & NVKM_I2C_UNPLUG)
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rep.mask |= NVIF_NOTIFY_CONN_V0_UNPLUG;
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if (line->mask & NVKM_I2C_PLUG)
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rep.mask |= NVIF_NOTIFY_CONN_V0_PLUG;
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nvkm_event_send(&disp->hpd, rep.mask, conn->index,
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&rep, sizeof(rep));
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return NVKM_NOTIFY_KEEP;
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}
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2014-05-19 11:54:09 +10:00
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}
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2014-08-10 04:10:20 +10:00
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WARN_ON(1);
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return NVKM_NOTIFY_DROP;
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2014-05-17 11:19:54 +10:00
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}
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static int
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2014-08-10 04:10:20 +10:00
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nvkm_output_dp_irq(struct nvkm_notify *notify)
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2014-05-17 11:19:54 +10:00
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{
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2014-08-10 04:10:20 +10:00
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struct nvkm_output_dp *outp = container_of(notify, typeof(*outp), irq);
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struct nouveau_disp *disp = nouveau_disp(outp);
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const struct nvkm_i2c_ntfy_rep *line = notify->data;
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struct nvif_notify_conn_rep_v0 rep = {
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.mask = NVIF_NOTIFY_CONN_V0_IRQ,
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};
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int index = outp->base.info.connector;
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DBG("IRQ: %d\n", line->mask);
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nvkm_output_dp_train(&outp->base, 0, true);
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nvkm_event_send(&disp->hpd, rep.mask, index, &rep, sizeof(rep));
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return NVKM_NOTIFY_DROP;
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2014-05-17 11:19:54 +10:00
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}
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int
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_nvkm_output_dp_fini(struct nouveau_object *object, bool suspend)
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{
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struct nvkm_output_dp *outp = (void *)object;
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2014-08-10 04:10:20 +10:00
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nvkm_notify_put(&outp->irq);
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2014-05-19 11:54:09 +10:00
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nvkm_output_dp_enable(outp, false);
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2014-05-17 11:19:54 +10:00
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return nvkm_output_fini(&outp->base, suspend);
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}
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int
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_nvkm_output_dp_init(struct nouveau_object *object)
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{
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struct nvkm_output_dp *outp = (void *)object;
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2014-05-19 11:54:09 +10:00
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nvkm_output_dp_detect(outp);
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2014-05-17 11:19:54 +10:00
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return nvkm_output_init(&outp->base);
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}
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void
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_nvkm_output_dp_dtor(struct nouveau_object *object)
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{
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struct nvkm_output_dp *outp = (void *)object;
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2014-08-10 04:10:20 +10:00
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nvkm_notify_fini(&outp->irq);
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2014-05-17 11:19:54 +10:00
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nvkm_output_destroy(&outp->base);
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}
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int
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nvkm_output_dp_create_(struct nouveau_object *parent,
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struct nouveau_object *engine,
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struct nouveau_oclass *oclass,
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struct dcb_output *info, int index,
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int length, void **pobject)
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{
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struct nouveau_bios *bios = nouveau_bios(parent);
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struct nouveau_i2c *i2c = nouveau_i2c(parent);
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struct nvkm_output_dp *outp;
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u8 hdr, cnt, len;
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u32 data;
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int ret;
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ret = nvkm_output_create_(parent, engine, oclass, info, index,
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length, pobject);
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outp = *pobject;
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if (ret)
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return ret;
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2014-08-10 04:10:20 +10:00
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nvkm_notify_fini(&outp->base.conn->hpd);
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2014-05-17 11:19:54 +10:00
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/* access to the aux channel is not optional... */
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if (!outp->base.edid) {
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ERR("aux channel not found\n");
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return -ENODEV;
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}
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/* nor is the bios data for this output... */
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data = nvbios_dpout_match(bios, outp->base.info.hasht,
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outp->base.info.hashm, &outp->version,
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&hdr, &cnt, &len, &outp->info);
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if (!data) {
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ERR("no bios dp data\n");
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return -ENODEV;
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}
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DBG("bios dp %02x %02x %02x %02x\n", outp->version, hdr, cnt, len);
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2014-05-20 10:18:03 +10:00
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/* link training */
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INIT_WORK(&outp->lt.work, nouveau_dp_train);
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init_waitqueue_head(&outp->lt.wait);
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atomic_set(&outp->lt.done, 0);
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2014-05-17 11:19:54 +10:00
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/* link maintenance */
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2014-08-11 13:56:56 +10:00
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ret = nvkm_notify_init(NULL, &i2c->event, nvkm_output_dp_irq, true,
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2014-08-10 04:10:20 +10:00
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&(struct nvkm_i2c_ntfy_req) {
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.mask = NVKM_I2C_IRQ,
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.port = outp->base.edid->index,
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},
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sizeof(struct nvkm_i2c_ntfy_req),
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sizeof(struct nvkm_i2c_ntfy_rep),
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&outp->irq);
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2014-05-17 11:19:54 +10:00
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if (ret) {
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ERR("error monitoring aux irq event: %d\n", ret);
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return ret;
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}
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/* hotplug detect, replaces gpio-based mechanism with aux events */
|
2014-08-11 13:56:56 +10:00
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ret = nvkm_notify_init(NULL, &i2c->event, nvkm_output_dp_hpd, true,
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2014-08-10 04:10:20 +10:00
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&(struct nvkm_i2c_ntfy_req) {
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.mask = NVKM_I2C_PLUG | NVKM_I2C_UNPLUG,
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.port = outp->base.edid->index,
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},
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sizeof(struct nvkm_i2c_ntfy_req),
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sizeof(struct nvkm_i2c_ntfy_rep),
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&outp->base.conn->hpd);
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2014-05-17 11:19:54 +10:00
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if (ret) {
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ERR("error monitoring aux hpd events: %d\n", ret);
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return ret;
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}
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return 0;
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}
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int
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|
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_nvkm_output_dp_ctor(struct nouveau_object *parent,
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struct nouveau_object *engine,
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struct nouveau_oclass *oclass, void *info, u32 index,
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|
|
|
struct nouveau_object **pobject)
|
|
|
|
|
{
|
|
|
|
|
struct nvkm_output_dp *outp;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
ret = nvkm_output_dp_create(parent, engine, oclass, info, index, &outp);
|
|
|
|
|
*pobject = nv_object(outp);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|