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										 |  |  | /*
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							|  |  |  |  * Copyright IBM Corp. 1999, 2009 | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> | 
					
						
							|  |  |  |  */ | 
					
						
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							|  |  |  | #ifndef __ASM_BARRIER_H
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							|  |  |  | #define __ASM_BARRIER_H
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							|  |  |  | /*
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							|  |  |  |  * Force strict CPU ordering. | 
					
						
							|  |  |  |  * And yes, this is required on UP too when we're talking | 
					
						
							|  |  |  |  * to devices. | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | #ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
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										 |  |  | /* Fast-BCR without checkpoint synchronization */ | 
					
						
							|  |  |  | #define mb() do {  asm volatile("bcr 14,0" : : : "memory"); } while (0)
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										 |  |  | #else
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										 |  |  | #define mb() do {  asm volatile("bcr 15,0" : : : "memory"); } while (0)
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										 |  |  | #endif
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							|  |  |  | #define rmb()				mb()
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							|  |  |  | #define wmb()				mb()
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							|  |  |  | #define read_barrier_depends()		do { } while(0)
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							|  |  |  | #define smp_mb()			mb()
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							|  |  |  | #define smp_rmb()			rmb()
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							|  |  |  | #define smp_wmb()			wmb()
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							|  |  |  | #define smp_read_barrier_depends()	read_barrier_depends()
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							|  |  |  | #define smp_mb__before_clear_bit()	smp_mb()
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							|  |  |  | #define smp_mb__after_clear_bit()	smp_mb()
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										 |  |  | #define set_mb(var, value)		do { var = value; mb(); } while (0)
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							|  |  |  | #endif /* __ASM_BARRIER_H */
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