2012-05-30 21:02:49 +00:00
										 
									 
								 
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								/*
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								 * This file is subject to the terms and conditions of the GNU General Public
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								 * License.  See the file "COPYING" in the main directory of this archive
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								 * for more details.
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								 *
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								 * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
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								 */
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								#include <linux/delay.h>
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								#include <linux/kernel.h>
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								#include <linux/spinlock.h>
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								#include <linux/init.h>
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								#include <linux/io.h>
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								#include <linux/errno.h>
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								#define PIC32_NULL	0x00
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								#define PIC32_RD	0x01
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								#define PIC32_SYSRD	0x02
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								#define PIC32_WR	0x10
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								#define PIC32_SYSWR	0x20
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								#define PIC32_IRQ_CLR	0x40
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								#define PIC32_STATUS	0x80
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								#define DELAY() udelay(100)	/* FIXME: needed? */
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								/* spinlock to ensure atomic access to PIC32 */
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								static DEFINE_SPINLOCK(pic32_bus_lock);
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								/* FIXME: io_remap these */
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								static void __iomem *bus_xfer	= (void __iomem *)0xbf000600;
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								static void __iomem *bus_status = (void __iomem *)0xbf000060;
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								static inline unsigned int ioready(void)
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								{
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									return readl(bus_status) & 1;
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								}
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								static inline void wait_ioready(void)
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								{
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									do { } while (!ioready());
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								}
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								static inline void wait_ioclear(void)
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								{
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									do { } while (ioready());
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								}
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								static inline void check_ioclear(void)
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								{
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									if (ioready()) {
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										pr_debug("ioclear: initially busy\n");
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										do {
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											(void) readl(bus_xfer);
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											DELAY();
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										} while (ioready());
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										pr_debug("ioclear: cleared busy\n");
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									}
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								}
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								u32 pic32_bus_readl(u32 reg)
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								{
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									unsigned long flags;
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									u32 status, val;
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									spin_lock_irqsave(&pic32_bus_lock, flags);
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									check_ioclear();
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									writel((PIC32_RD << 24) | (reg & 0x00ffffff), bus_xfer);
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									DELAY();
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									wait_ioready();
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									status = readl(bus_xfer);
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									DELAY();
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									val = readl(bus_xfer);
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									wait_ioclear();
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									pr_debug("pic32_bus_readl: *%x -> %x (status=%x)\n", reg, val, status);
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									spin_unlock_irqrestore(&pic32_bus_lock, flags);
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									return val;
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								}
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								void pic32_bus_writel(u32 val, u32 reg)
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								{
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									unsigned long flags;
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									u32 status;
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									spin_lock_irqsave(&pic32_bus_lock, flags);
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									check_ioclear();
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									writel((PIC32_WR << 24) | (reg & 0x00ffffff), bus_xfer);
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									DELAY();
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									writel(val, bus_xfer);
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									DELAY();
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									wait_ioready();
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									status = readl(bus_xfer);
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									wait_ioclear();
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									pr_debug("pic32_bus_writel: *%x <- %x (status=%x)\n", reg, val, status);
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									spin_unlock_irqrestore(&pic32_bus_lock, flags);
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								}
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