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										 |  |  | /*
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							|  |  |  |  * arch/arch/mach-ixp4xx/fsg-pci.c | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * FSG board-level PCI initialization | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Author: Rod Whitby <rod@whitby.id.au> | 
					
						
							|  |  |  |  * Maintainer: http://www.nslu2-linux.org/
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							|  |  |  |  * | 
					
						
							|  |  |  |  * based on ixdp425-pci.c: | 
					
						
							|  |  |  |  *	Copyright (C) 2002 Intel Corporation. | 
					
						
							|  |  |  |  *	Copyright (C) 2003-2004 MontaVista Software, Inc. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License version 2 as | 
					
						
							|  |  |  |  * published by the Free Software Foundation. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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							|  |  |  | #include <linux/pci.h>
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							|  |  |  | #include <linux/init.h>
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							|  |  |  | #include <linux/irq.h>
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							|  |  |  | #include <asm/mach/pci.h>
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							|  |  |  | #include <asm/mach-types.h>
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										 |  |  | #define MAX_DEV		3
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							|  |  |  | #define IRQ_LINES	3
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							|  |  |  | /* PCI controller GPIO to IRQ pin mappings */ | 
					
						
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										 |  |  | #define INTA	6
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							|  |  |  | #define INTB	7
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							|  |  |  | #define INTC	5
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										 |  |  | void __init fsg_pci_preinit(void) | 
					
						
							|  |  |  | { | 
					
						
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										 |  |  | 	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); | 
					
						
							|  |  |  | 	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); | 
					
						
							|  |  |  | 	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); | 
					
						
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										 |  |  | 	ixp4xx_pci_preinit(); | 
					
						
							|  |  |  | } | 
					
						
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										 |  |  | static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | 
					
						
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										 |  |  | { | 
					
						
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										 |  |  | 	static int pci_irq_table[IRQ_LINES] = { | 
					
						
							|  |  |  | 		IXP4XX_GPIO_IRQ(INTC), | 
					
						
							|  |  |  | 		IXP4XX_GPIO_IRQ(INTB), | 
					
						
							|  |  |  | 		IXP4XX_GPIO_IRQ(INTA), | 
					
						
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										 |  |  | 	}; | 
					
						
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							|  |  |  | 	int irq = -1; | 
					
						
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										 |  |  | 	slot -= 11; | 
					
						
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										 |  |  | 	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) | 
					
						
							|  |  |  | 		irq = pci_irq_table[slot - 1]; | 
					
						
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										 |  |  | 	printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n", | 
					
						
							|  |  |  | 	       __func__, slot, pin, irq); | 
					
						
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							|  |  |  | 	return irq; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | struct hw_pci fsg_pci __initdata = { | 
					
						
							|  |  |  | 	.nr_controllers = 1, | 
					
						
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										 |  |  | 	.ops		= &ixp4xx_ops, | 
					
						
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										 |  |  | 	.preinit =	  fsg_pci_preinit, | 
					
						
							|  |  |  | 	.setup =	  ixp4xx_setup, | 
					
						
							|  |  |  | 	.map_irq =	  fsg_map_irq, | 
					
						
							|  |  |  | }; | 
					
						
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							|  |  |  | int __init fsg_pci_init(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	if (machine_is_fsg()) | 
					
						
							|  |  |  | 		pci_common_init(&fsg_pci); | 
					
						
							|  |  |  | 	return 0; | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | subsys_initcall(fsg_pci_init); |