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										 |  |  | /* linux/arch/arm/mach-exynos/include/mach/map.h
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										 |  |  |  * | 
					
						
							|  |  |  |  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | 
					
						
							|  |  |  |  *		http://www.samsung.com/
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							|  |  |  |  * | 
					
						
							|  |  |  |  * EXYNOS4 - Memory map definitions | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License version 2 as | 
					
						
							|  |  |  |  * published by the Free Software Foundation. | 
					
						
							|  |  |  | */ | 
					
						
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							|  |  |  | #ifndef __ASM_ARCH_MAP_H
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							|  |  |  | #define __ASM_ARCH_MAP_H __FILE__
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							|  |  |  | #include <plat/map-base.h>
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							|  |  |  | /*
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							|  |  |  |  * EXYNOS4 UART offset is 0x10000 but the older S5P SoCs are 0x400. | 
					
						
							|  |  |  |  * So need to define it, and here is to avoid redefinition warning. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #define S3C_UART_OFFSET			(0x10000)
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							|  |  |  | #include <plat/map-s5p.h>
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										 |  |  | #define EXYNOS4_PA_SYSRAM0		0x02025000
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							|  |  |  | #define EXYNOS4_PA_SYSRAM1		0x02020000
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										 |  |  | #define EXYNOS5_PA_SYSRAM		0x02020000
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										 |  |  | #define EXYNOS4210_PA_SYSRAM_NS		0x0203F000
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							|  |  |  | #define EXYNOS4x12_PA_SYSRAM_NS		0x0204F000
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							|  |  |  | #define EXYNOS5250_PA_SYSRAM_NS		0x0204F000
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										 |  |  | #define EXYNOS_PA_CHIPID		0x10000000
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							|  |  |  | #define EXYNOS4_PA_SYSCON		0x10010000
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										 |  |  | #define EXYNOS5_PA_SYSCON		0x10050100
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										 |  |  | #define EXYNOS4_PA_PMU			0x10020000
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										 |  |  | #define EXYNOS5_PA_PMU			0x10040000
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										 |  |  | #define EXYNOS4_PA_CMU			0x10030000
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										 |  |  | #define EXYNOS5_PA_CMU			0x10010000
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										 |  |  | #define EXYNOS4_PA_SYSTIMER		0x10050000
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										 |  |  | #define EXYNOS4_PA_WATCHDOG		0x10060000
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										 |  |  | #define EXYNOS5_PA_WATCHDOG		0x101D0000
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										 |  |  | #define EXYNOS4_PA_DMC0			0x10400000
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										 |  |  | #define EXYNOS4_PA_DMC1			0x10410000
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										 |  |  | #define EXYNOS4_PA_COMBINER		0x10440000
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										 |  |  | #define EXYNOS5_PA_COMBINER		0x10440000
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							|  |  |  | #define EXYNOS4_PA_GIC_CPU		0x10480000
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							|  |  |  | #define EXYNOS4_PA_GIC_DIST		0x10490000
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										 |  |  | #define EXYNOS5_PA_GIC_CPU		0x10482000
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							|  |  |  | #define EXYNOS5_PA_GIC_DIST		0x10481000
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							|  |  |  | #define EXYNOS4_PA_COREPERI		0x10500000
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							|  |  |  | #define EXYNOS4_PA_L2CC			0x10502000
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							|  |  |  | #define EXYNOS4_PA_SROMC		0x12570000
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										 |  |  | #define EXYNOS5_PA_SROMC		0x12250000
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										 |  |  | #define EXYNOS4_PA_HSPHY		0x125B0000
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										 |  |  | #define EXYNOS4_PA_UART			0x13800000
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										 |  |  | #define EXYNOS5_PA_UART			0x12C00000
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							|  |  |  | #define EXYNOS4_PA_TIMER		0x139D0000
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										 |  |  | #define EXYNOS5_PA_TIMER		0x12DD0000
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										 |  |  | /* Compatibility UART */ | 
					
						
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										 |  |  | #define EXYNOS5440_PA_UART0		0x000B0000
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										 |  |  | #define S3C_VA_UARTx(x)			(S3C_VA_UART + ((x) * S3C_UART_OFFSET))
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							|  |  |  | #endif /* __ASM_ARCH_MAP_H */
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