| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | /*
 | 
					
						
							|  |  |  |  * ci.h - common structures, functions, and macros of the ChipIdea driver | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Author: David Lopo | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License version 2 as | 
					
						
							|  |  |  |  * published by the Free Software Foundation. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | #ifndef __DRIVERS_USB_CHIPIDEA_CI_H
 | 
					
						
							|  |  |  | #define __DRIVERS_USB_CHIPIDEA_CI_H
 | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | #include <linux/list.h>
 | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:47 +03:00
										 |  |  | #include <linux/irqreturn.h>
 | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:54 +03:00
										 |  |  | #include <linux/usb.h>
 | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | #include <linux/usb/gadget.h>
 | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /******************************************************************************
 | 
					
						
							|  |  |  |  * DEFINE | 
					
						
							|  |  |  |  *****************************************************************************/ | 
					
						
							| 
									
										
										
										
											2013-03-30 12:54:10 +02:00
										 |  |  | #define TD_PAGE_COUNT      5
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | #define CI_HDRC_PAGE_SIZE  4096ul /* page size for TD's */
 | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | #define ENDPT_MAX          32
 | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /******************************************************************************
 | 
					
						
							|  |  |  |  * STRUCTURES | 
					
						
							|  |  |  |  *****************************************************************************/ | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | /**
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  |  * struct ci_hw_ep - endpoint representation | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  |  * @ep: endpoint structure for gadget drivers | 
					
						
							|  |  |  |  * @dir: endpoint direction (TX/RX) | 
					
						
							|  |  |  |  * @num: endpoint number | 
					
						
							|  |  |  |  * @type: endpoint type | 
					
						
							|  |  |  |  * @name: string description of the endpoint | 
					
						
							|  |  |  |  * @qh: queue head for this endpoint | 
					
						
							|  |  |  |  * @wedge: is the endpoint wedged | 
					
						
							| 
									
										
										
										
											2012-07-07 22:56:40 +08:00
										 |  |  |  * @ci: pointer to the controller | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  |  * @lock: pointer to controller's spinlock | 
					
						
							|  |  |  |  * @td_pool: pointer to controller's TD pool | 
					
						
							|  |  |  |  */ | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | struct ci_hw_ep { | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 	struct usb_ep				ep; | 
					
						
							|  |  |  | 	u8					dir; | 
					
						
							|  |  |  | 	u8					num; | 
					
						
							|  |  |  | 	u8					type; | 
					
						
							|  |  |  | 	char					name[16]; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 	struct { | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 		struct list_head	queue; | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | 		struct ci_hw_qh		*ptr; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 		dma_addr_t		dma; | 
					
						
							|  |  |  | 	}					qh; | 
					
						
							|  |  |  | 	int					wedge; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 
 | 
					
						
							|  |  |  | 	/* global resources */ | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | 	struct ci_hdrc				*ci; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 	spinlock_t				*lock; | 
					
						
							|  |  |  | 	struct dma_pool				*td_pool; | 
					
						
							| 
									
										
										
										
											2013-06-13 17:59:54 +03:00
										 |  |  | 	struct td_node				*pending_td; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:47 +03:00
										 |  |  | enum ci_role { | 
					
						
							|  |  |  | 	CI_ROLE_HOST = 0, | 
					
						
							|  |  |  | 	CI_ROLE_GADGET, | 
					
						
							|  |  |  | 	CI_ROLE_END, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /**
 | 
					
						
							|  |  |  |  * struct ci_role_driver - host/gadget role driver | 
					
						
							|  |  |  |  * start: start this role | 
					
						
							|  |  |  |  * stop: stop this role | 
					
						
							|  |  |  |  * irq: irq handler for this role | 
					
						
							|  |  |  |  * name: role name string (host/gadget) | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | struct ci_role_driver { | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | 	int		(*start)(struct ci_hdrc *); | 
					
						
							|  |  |  | 	void		(*stop)(struct ci_hdrc *); | 
					
						
							|  |  |  | 	irqreturn_t	(*irq)(struct ci_hdrc *); | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:47 +03:00
										 |  |  | 	const char	*name; | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | /**
 | 
					
						
							|  |  |  |  * struct hw_bank - hardware register mapping representation | 
					
						
							|  |  |  |  * @lpm: set if the device is LPM capable | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:54 +03:00
										 |  |  |  * @phys: physical address of the controller's registers | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  |  * @abs: absolute address of the beginning of register window | 
					
						
							|  |  |  |  * @cap: capability registers | 
					
						
							|  |  |  |  * @op: operational registers | 
					
						
							|  |  |  |  * @size: size of the register window | 
					
						
							|  |  |  |  * @regmap: register lookup table | 
					
						
							|  |  |  |  */ | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | struct hw_bank { | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 	unsigned	lpm; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:54 +03:00
										 |  |  | 	resource_size_t	phys; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 	void __iomem	*abs; | 
					
						
							|  |  |  | 	void __iomem	*cap; | 
					
						
							|  |  |  | 	void __iomem	*op; | 
					
						
							|  |  |  | 	size_t		size; | 
					
						
							|  |  |  | 	void __iomem	**regmap; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | /**
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  |  * struct ci_hdrc - chipidea device representation | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  |  * @dev: pointer to parent device | 
					
						
							|  |  |  |  * @lock: access synchronization | 
					
						
							|  |  |  |  * @hw_bank: hardware register mapping | 
					
						
							|  |  |  |  * @irq: IRQ number | 
					
						
							|  |  |  |  * @roles: array of supported roles for this controller | 
					
						
							|  |  |  |  * @role: current role | 
					
						
							|  |  |  |  * @is_otg: if the device is otg-capable | 
					
						
							|  |  |  |  * @work: work for role changing | 
					
						
							|  |  |  |  * @wq: workqueue thread | 
					
						
							|  |  |  |  * @qh_pool: allocation pool for queue heads | 
					
						
							|  |  |  |  * @td_pool: allocation pool for transfer descriptors | 
					
						
							|  |  |  |  * @gadget: device side representation for peripheral controller | 
					
						
							|  |  |  |  * @driver: gadget driver | 
					
						
							|  |  |  |  * @hw_ep_max: total number of endpoints supported by hardware | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  |  * @ci_hw_ep: array of endpoints | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  |  * @ep0_dir: ep0 direction | 
					
						
							|  |  |  |  * @ep0out: pointer to ep0 OUT endpoint | 
					
						
							|  |  |  |  * @ep0in: pointer to ep0 IN endpoint | 
					
						
							|  |  |  |  * @status: ep0 status request | 
					
						
							|  |  |  |  * @setaddr: if we should set the address on status completion | 
					
						
							|  |  |  |  * @address: usb address received from the host | 
					
						
							|  |  |  |  * @remote_wakeup: host-enabled remote wakeup | 
					
						
							|  |  |  |  * @suspended: suspended by host | 
					
						
							|  |  |  |  * @test_mode: the selected test mode | 
					
						
							| 
									
										
										
										
											2012-06-29 17:48:53 +08:00
										 |  |  |  * @platdata: platform specific information supplied by parent device | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  |  * @vbus_active: is VBUS active | 
					
						
							|  |  |  |  * @transceiver: pointer to USB PHY, if any | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:54 +03:00
										 |  |  |  * @hcd: pointer to usb_hcd for ehci host driver | 
					
						
							| 
									
										
										
										
											2013-03-30 12:53:51 +02:00
										 |  |  |  * @debugfs: root dentry for this controller in debugfs | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  |  */ | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | struct ci_hdrc { | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 	struct device			*dev; | 
					
						
							|  |  |  | 	spinlock_t			lock; | 
					
						
							|  |  |  | 	struct hw_bank			hw_bank; | 
					
						
							|  |  |  | 	int				irq; | 
					
						
							|  |  |  | 	struct ci_role_driver		*roles[CI_ROLE_END]; | 
					
						
							|  |  |  | 	enum ci_role			role; | 
					
						
							|  |  |  | 	bool				is_otg; | 
					
						
							|  |  |  | 	struct work_struct		work; | 
					
						
							|  |  |  | 	struct workqueue_struct		*wq; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	struct dma_pool			*qh_pool; | 
					
						
							|  |  |  | 	struct dma_pool			*td_pool; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	struct usb_gadget		gadget; | 
					
						
							|  |  |  | 	struct usb_gadget_driver	*driver; | 
					
						
							|  |  |  | 	unsigned			hw_ep_max; | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | 	struct ci_hw_ep			ci_hw_ep[ENDPT_MAX]; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 	u32				ep0_dir; | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | 	struct ci_hw_ep			*ep0out, *ep0in; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 
 | 
					
						
							|  |  |  | 	struct usb_request		*status; | 
					
						
							|  |  |  | 	bool				setaddr; | 
					
						
							|  |  |  | 	u8				address; | 
					
						
							|  |  |  | 	u8				remote_wakeup; | 
					
						
							|  |  |  | 	u8				suspended; | 
					
						
							|  |  |  | 	u8				test_mode; | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | 	struct ci_hdrc_platform_data	*platdata; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 	int				vbus_active; | 
					
						
							| 
									
										
										
										
											2012-07-07 22:56:46 +08:00
										 |  |  | 	/* FIXME: some day, we'll not use global phy */ | 
					
						
							|  |  |  | 	bool				global_phy; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:49 +03:00
										 |  |  | 	struct usb_phy			*transceiver; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:54 +03:00
										 |  |  | 	struct usb_hcd			*hcd; | 
					
						
							| 
									
										
										
										
											2013-03-30 12:53:51 +02:00
										 |  |  | 	struct dentry			*debugfs; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | static inline struct ci_role_driver *ci_role(struct ci_hdrc *ci) | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:47 +03:00
										 |  |  | { | 
					
						
							|  |  |  | 	BUG_ON(ci->role >= CI_ROLE_END || !ci->roles[ci->role]); | 
					
						
							|  |  |  | 	return ci->roles[ci->role]; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | static inline int ci_role_start(struct ci_hdrc *ci, enum ci_role role) | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:47 +03:00
										 |  |  | { | 
					
						
							|  |  |  | 	int ret; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	if (role >= CI_ROLE_END) | 
					
						
							|  |  |  | 		return -EINVAL; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	if (!ci->roles[role]) | 
					
						
							|  |  |  | 		return -ENXIO; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	ret = ci->roles[role]->start(ci); | 
					
						
							|  |  |  | 	if (!ret) | 
					
						
							|  |  |  | 		ci->role = role; | 
					
						
							|  |  |  | 	return ret; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | static inline void ci_role_stop(struct ci_hdrc *ci) | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:47 +03:00
										 |  |  | { | 
					
						
							|  |  |  | 	enum ci_role role = ci->role; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	if (role == CI_ROLE_END) | 
					
						
							|  |  |  | 		return; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	ci->role = CI_ROLE_END; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	ci->roles[role]->stop(ci); | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | /******************************************************************************
 | 
					
						
							|  |  |  |  * REGISTERS | 
					
						
							|  |  |  |  *****************************************************************************/ | 
					
						
							|  |  |  | /* register size */ | 
					
						
							|  |  |  | #define REG_BITS   (32)
 | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /* register indices */ | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | enum ci_hw_regs { | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 	CAP_CAPLENGTH, | 
					
						
							|  |  |  | 	CAP_HCCPARAMS, | 
					
						
							|  |  |  | 	CAP_DCCPARAMS, | 
					
						
							|  |  |  | 	CAP_TESTMODE, | 
					
						
							|  |  |  | 	CAP_LAST = CAP_TESTMODE, | 
					
						
							|  |  |  | 	OP_USBCMD, | 
					
						
							|  |  |  | 	OP_USBSTS, | 
					
						
							|  |  |  | 	OP_USBINTR, | 
					
						
							|  |  |  | 	OP_DEVICEADDR, | 
					
						
							|  |  |  | 	OP_ENDPTLISTADDR, | 
					
						
							|  |  |  | 	OP_PORTSC, | 
					
						
							|  |  |  | 	OP_DEVLC, | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:47 +03:00
										 |  |  | 	OP_OTGSC, | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 	OP_USBMODE, | 
					
						
							|  |  |  | 	OP_ENDPTSETUPSTAT, | 
					
						
							|  |  |  | 	OP_ENDPTPRIME, | 
					
						
							|  |  |  | 	OP_ENDPTFLUSH, | 
					
						
							|  |  |  | 	OP_ENDPTSTAT, | 
					
						
							|  |  |  | 	OP_ENDPTCOMPLETE, | 
					
						
							|  |  |  | 	OP_ENDPTCTRL, | 
					
						
							|  |  |  | 	/* endptctrl1..15 follow */ | 
					
						
							|  |  |  | 	OP_LAST = OP_ENDPTCTRL + ENDPT_MAX / 2, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /**
 | 
					
						
							|  |  |  |  * hw_read: reads from a hw register | 
					
						
							|  |  |  |  * @reg:  register index | 
					
						
							|  |  |  |  * @mask: bitfield mask | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This function returns register contents | 
					
						
							|  |  |  |  */ | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | static inline u32 hw_read(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask) | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | { | 
					
						
							| 
									
										
										
										
											2012-07-07 22:56:40 +08:00
										 |  |  | 	return ioread32(ci->hw_bank.regmap[reg]) & mask; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /**
 | 
					
						
							|  |  |  |  * hw_write: writes to a hw register | 
					
						
							|  |  |  |  * @reg:  register index | 
					
						
							|  |  |  |  * @mask: bitfield mask | 
					
						
							|  |  |  |  * @data: new value | 
					
						
							|  |  |  |  */ | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | static inline void hw_write(struct ci_hdrc *ci, enum ci_hw_regs reg, | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 			    u32 mask, u32 data) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	if (~mask) | 
					
						
							| 
									
										
										
										
											2012-07-07 22:56:40 +08:00
										 |  |  | 		data = (ioread32(ci->hw_bank.regmap[reg]) & ~mask) | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 			| (data & mask); | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2012-07-07 22:56:40 +08:00
										 |  |  | 	iowrite32(data, ci->hw_bank.regmap[reg]); | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /**
 | 
					
						
							|  |  |  |  * hw_test_and_clear: tests & clears a hw register | 
					
						
							|  |  |  |  * @reg:  register index | 
					
						
							|  |  |  |  * @mask: bitfield mask | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This function returns register contents | 
					
						
							|  |  |  |  */ | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | static inline u32 hw_test_and_clear(struct ci_hdrc *ci, enum ci_hw_regs reg, | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 				    u32 mask) | 
					
						
							|  |  |  | { | 
					
						
							| 
									
										
										
										
											2012-07-07 22:56:40 +08:00
										 |  |  | 	u32 val = ioread32(ci->hw_bank.regmap[reg]) & mask; | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 
 | 
					
						
							| 
									
										
										
										
											2012-07-07 22:56:40 +08:00
										 |  |  | 	iowrite32(val, ci->hw_bank.regmap[reg]); | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 	return val; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /**
 | 
					
						
							|  |  |  |  * hw_test_and_write: tests & writes a hw register | 
					
						
							|  |  |  |  * @reg:  register index | 
					
						
							|  |  |  |  * @mask: bitfield mask | 
					
						
							|  |  |  |  * @data: new value | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This function returns register contents | 
					
						
							|  |  |  |  */ | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | static inline u32 hw_test_and_write(struct ci_hdrc *ci, enum ci_hw_regs reg, | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 				    u32 mask, u32 data) | 
					
						
							|  |  |  | { | 
					
						
							| 
									
										
										
										
											2012-07-07 22:56:40 +08:00
										 |  |  | 	u32 val = hw_read(ci, reg, ~0); | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 
 | 
					
						
							| 
									
										
										
										
											2012-07-07 22:56:40 +08:00
										 |  |  | 	hw_write(ci, reg, mask, data); | 
					
						
							| 
									
										
										
										
											2013-03-30 12:53:55 +02:00
										 |  |  | 	return (val & mask) >> __ffs(mask); | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | int hw_device_reset(struct ci_hdrc *ci, u32 mode); | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | int hw_port_test_set(struct ci_hdrc *ci, u8 mode); | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 
 | 
					
						
							| 
									
										
										
										
											2013-06-24 14:46:36 +03:00
										 |  |  | u8 hw_port_test_get(struct ci_hdrc *ci); | 
					
						
							| 
									
										
										
										
											2012-05-11 17:25:46 +03:00
										 |  |  | 
 | 
					
						
							|  |  |  | #endif	/* __DRIVERS_USB_CHIPIDEA_CI_H */
 |