| 
									
										
										
										
											2012-02-02 20:02:32 -02:00
										 |  |  | /*
 | 
					
						
							|  |  |  |  *  Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * The code contained herein is licensed under the GNU General Public | 
					
						
							|  |  |  |  * License. You may obtain a copy of the GNU General Public License | 
					
						
							|  |  |  |  * Version 2 or later at the following locations: | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * http://www.opensource.org/licenses/gpl-license.html
 | 
					
						
							|  |  |  |  * http://www.gnu.org/copyleft/gpl.html
 | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | #include <linux/io.h>
 | 
					
						
							| 
									
										
										
										
											2012-09-13 21:01:00 +08:00
										 |  |  | 
 | 
					
						
							|  |  |  | #include "common.h"
 | 
					
						
							| 
									
										
										
										
											2012-02-02 20:02:32 -02:00
										 |  |  | #include "crmregs-imx3.h"
 | 
					
						
							| 
									
										
										
										
											2012-09-13 15:51:15 +08:00
										 |  |  | #include "devices/devices-common.h"
 | 
					
						
							| 
									
										
										
										
											2012-09-14 14:14:45 +08:00
										 |  |  | #include "hardware.h"
 | 
					
						
							| 
									
										
										
										
											2012-02-02 20:02:32 -02:00
										 |  |  | 
 | 
					
						
							|  |  |  | /*
 | 
					
						
							|  |  |  |  * Set cpu low power mode before WFI instruction. This function is called | 
					
						
							|  |  |  |  * mx3 because it can be used for mx31 and mx35. | 
					
						
							|  |  |  |  * Currently only WAIT_MODE is supported. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode) | 
					
						
							|  |  |  | { | 
					
						
							| 
									
										
										
										
											2012-04-03 12:42:27 +02:00
										 |  |  | 	int reg = __raw_readl(mx3_ccm_base + MXC_CCM_CCMR); | 
					
						
							| 
									
										
										
										
											2012-02-02 20:02:32 -02:00
										 |  |  | 	reg &= ~MXC_CCM_CCMR_LPM_MASK; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 	switch (mode) { | 
					
						
							|  |  |  | 	case MX3_WAIT: | 
					
						
							|  |  |  | 		if (cpu_is_mx35()) | 
					
						
							|  |  |  | 			reg |= MXC_CCM_CCMR_LPM_WAIT_MX35; | 
					
						
							| 
									
										
										
										
											2012-04-03 12:42:27 +02:00
										 |  |  | 		__raw_writel(reg, mx3_ccm_base + MXC_CCM_CCMR); | 
					
						
							| 
									
										
										
										
											2012-02-02 20:02:32 -02:00
										 |  |  | 		break; | 
					
						
							|  |  |  | 	default: | 
					
						
							|  |  |  | 		pr_err("Unknown cpu power mode: %d\n", mode); | 
					
						
							|  |  |  | 		return; | 
					
						
							|  |  |  | 	} | 
					
						
							|  |  |  | } |