2012-03-28 18:30:01 +01:00
|
|
|
#ifndef __ASM_ARM_SWITCH_TO_H
|
|
|
|
|
#define __ASM_ARM_SWITCH_TO_H
|
|
|
|
|
|
|
|
|
|
#include <linux/thread_info.h>
|
|
|
|
|
|
2013-05-13 11:39:50 +01:00
|
|
|
/*
|
|
|
|
|
* For v7 SMP cores running a preemptible kernel we may be pre-empted
|
|
|
|
|
* during a TLB maintenance operation, so execute an inner-shareable dsb
|
|
|
|
|
* to ensure that the maintenance completes in case we migrate to another
|
|
|
|
|
* CPU.
|
|
|
|
|
*/
|
|
|
|
|
#if defined(CONFIG_PREEMPT) && defined(CONFIG_SMP) && defined(CONFIG_CPU_V7)
|
|
|
|
|
#define finish_arch_switch(prev) dsb(ish)
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-03-28 18:30:01 +01:00
|
|
|
/*
|
|
|
|
|
* switch_to(prev, next) should switch from task `prev' to `next'
|
|
|
|
|
* `prev' will never be the same as `next'. schedule() itself
|
|
|
|
|
* contains the memory barrier to tell GCC not to cache `current'.
|
|
|
|
|
*/
|
|
|
|
|
extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *);
|
|
|
|
|
|
|
|
|
|
#define switch_to(prev,next,last) \
|
|
|
|
|
do { \
|
|
|
|
|
last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \
|
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
|
|
#endif /* __ASM_ARM_SWITCH_TO_H */
|
