92 lines
		
	
	
	
		
			2.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			92 lines
		
	
	
	
		
			2.2 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
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								/*
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								 * intc2.c  -- support for the 2nd INTC controller of the 525x
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								 *
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								 * (C) Copyright 2012, Steven King <sfking@fdwdc.com>
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								 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
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								 *
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								 * This file is subject to the terms and conditions of the GNU General Public
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								 * License.  See the file COPYING in the main directory of this archive
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								 * for more details.
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								 */
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								#include <linux/types.h>
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								#include <linux/init.h>
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								#include <linux/kernel.h>
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								#include <linux/interrupt.h>
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								#include <linux/irq.h>
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								#include <linux/io.h>
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								#include <asm/coldfire.h>
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								#include <asm/mcfsim.h>
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								static void intc2_irq_gpio_mask(struct irq_data *d)
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								{
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									u32 imr = readl(MCFSIM2_GPIOINTENABLE);
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									u32 type = irqd_get_trigger_type(d);
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									int irq = d->irq - MCF_IRQ_GPIO0;
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									if (type & IRQ_TYPE_EDGE_RISING)
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										imr &= ~(0x001 << irq);
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									if (type & IRQ_TYPE_EDGE_FALLING)
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										imr &= ~(0x100 << irq);
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									writel(imr, MCFSIM2_GPIOINTENABLE);
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								}
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								static void intc2_irq_gpio_unmask(struct irq_data *d)
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								{
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									u32 imr = readl(MCFSIM2_GPIOINTENABLE);
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									u32 type = irqd_get_trigger_type(d);
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									int irq = d->irq - MCF_IRQ_GPIO0;
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									if (type & IRQ_TYPE_EDGE_RISING)
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										imr |= (0x001 << irq);
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									if (type & IRQ_TYPE_EDGE_FALLING)
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										imr |= (0x100 << irq);
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									writel(imr, MCFSIM2_GPIOINTENABLE);
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								}
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								static void intc2_irq_gpio_ack(struct irq_data *d)
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								{
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									u32 imr = 0;
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									u32 type = irqd_get_trigger_type(d);
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									int irq = d->irq - MCF_IRQ_GPIO0;
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									if (type & IRQ_TYPE_EDGE_RISING)
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										imr |= (0x001 << irq);
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									if (type & IRQ_TYPE_EDGE_FALLING)
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										imr |= (0x100 << irq);
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									writel(imr, MCFSIM2_GPIOINTCLEAR);
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								}
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								static int intc2_irq_gpio_set_type(struct irq_data *d, unsigned int f)
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								{
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									if (f & ~IRQ_TYPE_EDGE_BOTH)
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										return -EINVAL;
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									return 0;
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								}
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								static struct irq_chip intc2_irq_gpio_chip = {
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									.name		= "CF-INTC2",
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									.irq_mask	= intc2_irq_gpio_mask,
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									.irq_unmask	= intc2_irq_gpio_unmask,
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									.irq_ack	= intc2_irq_gpio_ack,
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									.irq_set_type	= intc2_irq_gpio_set_type,
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								};
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								static int __init mcf_intc2_init(void)
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								{
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									int irq;
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									/* set the interrupt base for the second interrupt controller */
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									writel(MCFINTC2_VECBASE, MCFINTC2_INTBASE);
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									/* GPIO interrupt sources */
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									for (irq = MCF_IRQ_GPIO0; (irq <= MCF_IRQ_GPIO6); irq++) {
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										irq_set_chip(irq, &intc2_irq_gpio_chip);
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										irq_set_handler(irq, handle_edge_irq);
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									}
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									return 0;
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								}
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								arch_initcall(mcf_intc2_init);
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